公开(公告)号：US20040264153A1

公开(公告)日：2004-12-30

申请号：US10603048

申请日：2003-06-24

Inventor： Jason J. Payne ,  Mark W. Gailus ,  Leon M. Khilchenko ,  Huilin Ren

IPC: H01R012/16

CPC classification number: H01R13/6477 ,  H01R12/714 ,  H01R13/514 ,  H01R13/6471 ,  H01R13/6587 ,  H05K1/0219 ,  H05K1/112 ,  H05K3/429 ,  H05K2201/09381 ,  H05K2201/09627 ,  H05K2201/09709 ,  H05K2201/10189

Abstract: In the preferred embodiment, there is disclosed a printed circuit board having a surface providing a mating interface to which is electrically connected an electrical connector having signal conductors and ground conductors. The printed circuit board includes a plurality of stacked dielectric layers, with a conductor disposed on at least one of the plurality of dielectric layers. The mating interface includes a plurality of conductive vias aligned in a plurality of rows, with the plurality of conductive vias extending through at least a portion of the plurality of dielectric layers, at least one of the plurality of conductive vias intersecting the conductor. The plurality of conductive vias includes signal conductor connecting conductive vias and ground conductor connecting conductive vias. For each of the plurality of rows of the conductive vias, there are at least twice as many ground conductor connecting conductive vias as signal conductor connecting conductive vias and the conductive vias are positioned relative to one another so that for each signal conductor connecting conductive via, there are ground conductor connecting conductive vias adjacent either side of the signal conductor connecting conductive via.

Abstract translation: 在优选实施例中，公开了一种印刷电路板，其具有提供配合接口的表面，电连接器具有信号导体和接地导体。 印刷电路板包括多个堆叠的电介质层，其中导体设置在多个电介质层中的至少一个上。 配合接口包括以多行排列的多个导电通孔，多个导电通孔延伸穿过多个电介质层的至少一部分，多个导电通孔中的至少一个与导体相交。 多个导电通孔包括连接导电通孔的信号导体和连接导电通孔的接地导体。 对于导电通孔的多行中的每一行，存在至少两倍的接地导体，其连接导电通孔，作为连接导电通孔的信号导体，并且导电通孔相对于彼此定位，使得对于连接导电通孔的每个信号导体， 有接地导体连接导电通孔，邻近信号导体的任一侧连接导电通孔。

公开(公告)号：US06831528B2

公开(公告)日：2004-12-14

申请号：US10026459

申请日：2001-12-27

Applicant: Yasushi Nagata ,  Tomoyuki Iwasaki ,  Yuki Sato ,  Mitsuru Miyake ,  Takeo Yasuho

Inventor： Yasushi Nagata ,  Tomoyuki Iwasaki ,  Yuki Sato ,  Mitsuru Miyake ,  Takeo Yasuho

IPC: H01P110

CPC classification number: H03K17/76 ,  H01L23/49822 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01P1/15 ,  H05K1/0243 ,  H05K1/141 ,  H05K3/3442 ,  H05K2201/09381 ,  Y02P70/613 ,  H01L2924/00

Abstract: In a high-frequency switching module for use mainly in a communications apparatus and a high-frequency apparatus equipped with the same, the high-frequency switching module has a group of high-frequency terminals provided on the mounting side surface of a multi-layer assembly of which the lateral sides are formed as no-electrode provided sides excluding the high-frequency terminals. Thus, the high-frequency switching module and the high-frequency apparatus equipped with the same are less susceptible to the external effect.

Abstract translation: 在主要用于通信装置的高频开关模块和配备有该高频装置的高频装置中，高频开关模块具有设置在多层的安装侧表面上的一组高频端子 其侧面形成为不包括高频端子的无电极提供侧的组装。 因此，高频开关模块和配备有高频开关模块的高频装置不易受到外部影响。

公开(公告)号：US20040225807A1

公开(公告)日：2004-11-11

申请号：US09791810

申请日：2001-02-26

Inventor： Michael W. Leddige ,  James A. McCall

IPC: G06F013/38 ,  G06F013/40

CPC classification number: H05K1/117 ,  H05K1/0237 ,  H05K1/116 ,  H05K3/366 ,  H05K3/429 ,  H05K2201/044 ,  H05K2201/09381 ,  H05K2201/09781 ,  H05K2201/10189

Abstract: A method is provided for designing a computer assembly. This may include obtaining a design of the computer assembly having a transmission line and a connection portion, and matching an impedance value of the transmission line to an impedance value of the connection portion so as to obtain a desired filter characteristic. A computer assembly may also be provided that includes a motherboard, a module and a transmission line. A connection transition may be designed such that an impedance of the transmission line matches an impedance of the connection transition and to obtain a desired filter characteristic.

Abstract translation: 提供了一种用于设计计算机组件的方法。 这可以包括获得具有传输线和连接部分的计算机组件的设计，并且将传输线的阻抗值与连接部分的阻抗值相匹配，以便获得期望的滤波器特性。 还可以提供一种包括主板，模块和传输线的计算机组件。 可以设计连接转换，使得传输线的阻抗与连接转变的阻抗匹配并获得期望的滤波器特性。

公开(公告)号：US20040159946A1

公开(公告)日：2004-08-19

申请号：US10775703

申请日：2004-02-10

Inventor： Stephen Moxham ,  William Stephenson

IPC: H01L023/488

CPC classification number: H01L23/13 ,  H01L23/3114 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/4985 ,  H01L2924/0002 ,  H05K1/111 ,  H05K1/113 ,  H05K1/116 ,  H05K3/3452 ,  H05K2201/09381 ,  H05K2201/094 ,  H05K2201/09436 ,  H05K2201/09509 ,  H05K2201/09781 ,  H05K2201/0979 ,  H05K2201/099 ,  H05K2201/10734 ,  Y02P70/611 ,  Y10T29/49155 ,  H01L2924/00

Abstract: A method and apparatus for supporting a microelectronic substrate. The apparatus can include a microelectronic substrate and a support member carrying the microelectronic substrate. The apparatus can further include a first connection structure carried by the support member. The first connection structure can have a first bond site configured to receive a flowable conductive material, and can further have at least two first elongated members connected and extending outwardly from the first bond site. Each first elongated member can be configured to receive at least a portion of the flowable conductive material from the first bond site, with none of the first elongated members being electrically coupled to the microelectronic substrate. The assembly can further include a second connection structure that is electrically coupled to the microelectronic substrate and that can include second elongated members extending away from a second bond site. The number of second elongated members can be equal to the number of first elongated members.

Abstract translation: 一种用于支撑微电子衬底的方法和装置。 该装置可以包括微电子衬底和承载微电子衬底的支撑构件。 该装置还可以包括由支撑构件承载的第一连接结构。 第一连接结构可以具有构造成接收可流动的导电材料的第一接合位置，并且还可以具有连接并从第一接合位置向外延伸的至少两个第一细长构件。 每个第一细长构件可以被构造成从第一接合位置接收可流动的导电材料的至少一部分，而第一细长构件没有一个电耦合到微电子衬底。 组件还可以包括电耦合到微电子衬底的第二连接结构，并且可以包括远离第二接合位置延伸的第二细长构件。 第二细长构件的数量可以等于第一细长构件的数量。

公开(公告)号：US06771485B2

公开(公告)日：2004-08-03

申请号：US10378976

申请日：2003-03-05

Applicant: Hideki Yokoyama ,  Atsushi Takeda

Inventor： Hideki Yokoyama ,  Atsushi Takeda

IPC: H01G4228

CPC classification number: H01G2/065 ,  B05B1/08 ,  B05C1/027 ,  B05C11/025 ,  H01C1/148 ,  H01C17/281 ,  H01G4/232 ,  H01G13/006 ,  H05K3/3442 ,  H05K2201/09381 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613 ,  Y10T29/435

Abstract: A ceramic capacitor having a ceramic body and terminal electrodes, the ceramic body being substantially a rectangular parallelopiped in shape, the terminal electrodes being provided at the two ends of the ceramic body in the length direction, each terminal electrode being provided to cover one end face of the ceramic body in the length direction, part of the two surfaces in the width direction, and part of the two surfaces in the thickness direction, wherein, when the length of the ceramic body is L1 and the maximum lengths of the terminal electrodes at the two surfaces of the ceramic body in the width direction are L3 and L4, 0≦|(L4−L3|/L1≦0.0227 is satisfied. One surface among the two surfaces of the ceramic body in the width direction is the paste introduction side in the roller coating, while the other surface is the paste escape side in the roller coating.

公开(公告)号：US06762503B2

公开(公告)日：2004-07-13

申请号：US10230962

申请日：2002-08-29

Applicant: Teck Kheng Lee

Inventor： Teck Kheng Lee

IPC: H01L2348

CPC classification number: H05K1/112 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05552 ,  H01L2224/05572 ,  H01L2224/131 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/351 ,  H05K3/28 ,  H05K2201/09381 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09663 ,  H05K2201/0969 ,  H01L2224/13099 ,  H01L2924/00

Abstract: A solder ball pad for mounting and connecting of electronic devices and, more particularly, apparatus and methods providing an improved solder ball pad structure on a substrate, such as a printed circuit board (“PCB”) or a semiconductor die, while enabling better use of the spaces between adjacent solder ball pads and at the same time providing increased surface area for bonding to a solder ball. Substrates, electronic device assemblies and systems incorporating the invention are also disclosed. The inventive solder ball pad structure comprises a metal pad layer that is partially exposed by an aperture in an insulative mask layer, but not exposing any surrounding substrate surface, an optional metallic or polymer interface layer formed onto at least a portion of the exposed area of the metal pad layer and onto at least a portion of a sidewall of the solder mask formed by the aperture as well as extending onto the top surface of the solder mask, a copper layer formed onto the interface layer (if used), and extending up the vertical wall and out over the top surface of the solder mask, followed by nickel and gold layers to enhance the wettability of the resulting solder ball pad surface.

Abstract translation: 一种用于安装和连接电子器件的焊球垫，更具体地，在诸如印刷电路板（“PCB”）或半导体管芯之类的衬底上提供改进的焊球焊盘结构的设备和方法，同时能够更好地使用 的相邻焊球之间的空间，并且同时提供用于粘合到焊球的增加的表面积。 还公开了基板，电子装置组件和结合本发明的系统。 本发明的焊球焊盘结构包括金属焊盘层，其通过绝缘掩模层中的孔部分地暴露，但不暴露任何周围的衬底表面，任选的金属或聚合物界面层形成在暴露区域的至少一部分上 所述金属焊盘层并且在由所述孔形成的所述焊料掩模的侧壁的至少一部分上并且延伸到所述焊接掩模的顶表面上，形成在所述界面层上的铜层（如果使用）并且向上延伸 垂直的壁和超过焊接面的顶面，然后是镍和金层，以增强所得到的焊球表面的润湿性。

公开(公告)号：US20040108135A1

公开(公告)日：2004-06-10

申请号：US10682780

申请日：2003-10-09

Inventor： Takeshi Ashida

IPC: H01L023/488

CPC classification number: H01L23/50 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/11822 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/83101 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K1/111 ,  H05K3/284 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/09381 ,  H05K2201/09772 ,  H05K2201/0989 ,  H05K2201/10734 ,  H05K2201/10977 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In a circuit board including a pad for mounting a ball grid array and a wiring, a mounting structure of the ball grid array, an electro-optic device, and an electronic device, the circuit board includes a pad for mounting the ball grid array, a wiring for connecting the pad and an external terminal, and a soldering resist having an opening portion exposing the pad and the wiring.

Abstract translation: 在包括用于安装球栅阵列的焊盘和布线的电路板，球栅阵列的安装结构，电光器件和电子器件中，电路板包括用于安装球栅阵列的焊盘， 用于连接焊盘和外部端子的布线，以及具有露出焊盘和布线的开口部分的焊接抗蚀剂。

公开(公告)号：US20040020972A1

公开(公告)日：2004-02-05

申请号：US10627710

申请日：2003-07-28

Inventor： Yoshiyuki Miyajima

IPC: B23K031/00

CPC classification number: H05K1/116 ,  B23K1/0016 ,  B23K2101/42 ,  H05K1/0201 ,  H05K3/3447 ,  H05K3/3452 ,  H05K2201/062 ,  H05K2201/09381 ,  H05K2201/0969 ,  H05K2201/0989

Abstract: Disclosed is an improved printed circuit board having circuit patterns printed thereon. It has a plurality of composite lands each including a first land having a terminal hole made at its center for inserting the terminal of a selected electric or electronic part or device, and a plurality of second lands each being contiguous to and extending outwards from the first land. The areas contiguous to the contours of the first and second lands have no conductive foils such as copper foils to expose the substrate surface of the printed circuit board. The exposed areas are effective to confine the thermal energy in the limited areas for soldering. And the composite land shape defines a ridged cone like solder lump, which can fixedly grip the terminal of the part or device.

Abstract translation: 公开了一种改进的印刷电路板，其上印有电路图案。 它具有多个复合凸台，每个复合凸台包括具有在其中心形成的端子孔的第一凸台，用于插入所选择的电气或电子部件或装置的端子，以及多个第二凸台，每个第二凸台与第一凸台相邻并向外延伸 土地。 与第一和第二焊盘的轮廓相邻的区域没有导电箔，例如铜箔，以露出印刷电路板的基板表面。 暴露的区域有效地将热能限制在有限的焊接区域。 并且复合地面形状限定了一个像脊状的圆锥状的焊料块，它可以固定地夹住零件或装置的端子。

公开(公告)号：US20030201123A1

公开(公告)日：2003-10-30

申请号：US10135132

申请日：2002-04-30

Inventor： Kris Kistner

IPC: H05K001/11

CPC classification number: H05K1/116 ,  H05K1/0219 ,  H05K1/0222 ,  H05K3/429 ,  H05K2201/09381 ,  H05K2201/09618 ,  H05K2201/09718 ,  H05K2201/09809

Abstract: A connector pad includes projections extending radially outwardly from an inner portion of the pad to help stabilize and reinforce the pad. The added stability allows the radial thickness of an inner portion of the pad to be reduced. This decreases the surface area of the pad and reduces the opportunity for capacitive build up to occur relative to an associated conductive plane in a circuit board.

Abstract translation: 连接器垫包括从垫的内部部分径向向外延伸的突起，以帮助稳定和加强垫。 增加的稳定性允许减小垫的内部的径向厚度。 这降低了焊盘的表面积，并且减少了相对于电路板中的相关联的导电平面发生电容积累的机会。

公开(公告)号：US20030176015A1

公开(公告)日：2003-09-18

申请号：US10329810

申请日：2002-12-27

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Joon Ho Yoon ,  Yong Chil Choi ,  Suk Su Bae

IPC: H01L021/44 ,  H01L021/48 ,  H01L021/50 ,  H01L023/48

CPC classification number: H05K3/3442 ,  H01L21/78 ,  H01L23/3114 ,  H01L24/05 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/04042 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19043 ,  H05K2201/09381 ,  H05K2201/10166 ,  Y02P70/613 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Disclosed are a chip scale package and a method of fabricating the chip scale package. The chip scale package comprises a first and a second conductive layers formed on insulating layer and spaced from each other by a designated distance so as to be connected to each of two terminals, a third conductive layer formed on the second surface of the chip so as to be connected to the terminal of the second surface of the chip, and electrode surfaces formed on each of designated side surfaces of the first, the second, and the third conductive layers. The chip scale package is miniaturized in the whole package size. Further, the method of fabricating the chip scale package does not require a wire-bonding step or a via hole forming step, thereby simplifying the fabrication process of the chip scale package and improving the reliability of the chip scale package.

Abstract translation: 公开了一种芯片级封装和一种制造芯片级封装的方法。 芯片级封装包括形成在绝缘层上的第一和第二导电层，彼此隔开指定距离，以便连接到两个端子中的每一个;形成在芯片的第二表面上的第三导电层，以便 连接到芯片的第二表面的端子，以及形成在第一，第二和第三导电层的每个指定侧表面上的电极表面。 芯片尺寸封装在整个封装尺寸上小型化。 此外，制造芯片级封装的方法不需要引线键合步骤或通孔形成步骤，从而简化了芯片级封装的制造工艺，并提高了芯片级封装的可靠性。