公开(公告)号：US5217849A

公开(公告)日：1993-06-08

申请号：US837104

申请日：1992-02-18

Applicant: Takeshi Chonan ,  Yoshihiro Hirota ,  Yuko Kudo

Inventor： Takeshi Chonan ,  Yoshihiro Hirota ,  Yuko Kudo

IPC: H01L21/48 ,  H01L23/495 ,  H05K1/03 ,  H05K3/00 ,  H05K3/10 ,  H05K3/40

CPC classification number: H05K3/002 ,  H01L21/4846 ,  H01L23/49572 ,  H05K3/4092 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0346 ,  H05K2201/0154 ,  H05K2201/0166 ,  H05K3/108

Abstract: A two-layer film carrier for TAB is made from a substrate prepared by forming a copper layer on a polyimide film by additive plating. A photoresist layer is formed on the copper layer, and another photoresist layer on the polyimide film. Both of the photoresist layers are simultaneously exposed to light through a mask applied to each of them to define a desired pattern. The exposed portions of the photoresist layer on the copper layer are subjected to development and postbaking, whereby selected portions of the copper layer are exposed. The exposed portions of the copper layer are additive plated with copper, whereby leads are formed. The exposed portions of the photoresist layer on the polyimide film are subjected to development and postbaking, whereby selected portions of the polyimide film are exposed. The remaining portions of the photoresist layer are removed from the copper layer and the underlying copper layer is etched. The exposed portions of the polyimide film are etched, and the remaining portions of the photoresist layer are removed from the polyimide film.

Abstract translation: 用于TAB的双层膜载体由通过添加电镀在聚酰亚胺膜上形成铜层而制备的基板制成。 在铜层上形成光致抗蚀剂层，在聚酰亚胺膜上形成另一个光致抗蚀剂层。 通过施加到其中的每一个的掩模，两个光致抗蚀剂层同时暴露于光以限定期望的图案。 对铜层上的光致抗蚀剂层的暴露部分进行显影和后烘烤，由此露出铜层的选定部分。 铜层的露出部分用铜添加电镀，由此形成引线。 对聚酰亚胺膜上的光致抗蚀剂层的暴露部分进行显影和后烘烤，由此暴露聚酰亚胺膜的选定部分。 光致抗蚀剂层的其余部分从铜层去除并且下面的铜层被蚀刻。 蚀刻聚酰亚胺膜的露出部分，将光刻胶层的其余部分从聚酰亚胺膜中除去。

公开(公告)号：US5091339A

公开(公告)日：1992-02-25

申请号：US557427

申请日：1990-07-23

Applicant: David H. Carey

Inventor： David H. Carey

IPC: H01L21/311 ,  H01L21/48 ,  H01L21/768 ,  H01L23/485 ,  H05K3/00 ,  H05K3/10 ,  H05K3/38 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46

CPC classification number: H01L21/76817 ,  H01L21/31144 ,  H01L21/486 ,  H01L21/76804 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/76811 ,  H01L21/76813 ,  H01L23/485 ,  H05K3/0032 ,  H05K3/0041 ,  H05K3/005 ,  H01L2221/1031 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K2201/0166 ,  H05K2201/09563 ,  H05K2203/0108 ,  H05K2203/025 ,  H05K2203/0554 ,  H05K2203/0574 ,  H05K2203/1189 ,  H05K3/0023 ,  H05K3/0035 ,  H05K3/107 ,  H05K3/388 ,  H05K3/4076 ,  H05K3/422 ,  H05K3/4644 ,  H05K3/4661 ,  Y10S438/94 ,  Y10S438/945

Abstract: Channels extending partially through and vias extending completely through an insulating layer in an electrical interconnect such as a substrate or integrated circuit can be formed in a relatively few steps with low cost etching and patterning techniques. The channels and vias can then be filled with an electrical conductor in a relatively few steps. In one embodiment a non-erodible hard mask exposing the vias and channels is placed over a polyimide layer, an erodible soft mask exposing the vias but covering the channels is placed over the hard mask, and a plasma etch is applied. The via regions are etched until the soft mask completely erodes and then both the via and channel regions are etched to provide partially etched channels and fully etched vias. Thereafter a seed layer is deposited over the interconnect, and an electrically conductive layer is electrolytically deposited over the seed layer substantially filling the channels and vias. The interconnect surface is then planarized by polishing until the electrical conductor remains only in the channels and vias.

Abstract translation: 可以在相对较少的步骤中以低成本的蚀刻和图案化技术形成通过部分延伸的通孔和完全延伸穿过例如基板或集成电路的电互连中的绝缘层的通孔。 然后可以以相对较少的步骤在通道和通孔中填充电导体。 在一个实施例中，将通孔和通道暴露的不可侵蚀的硬掩模放置在聚酰亚胺层上，暴露通孔但覆盖通道的可侵蚀的软掩模置于硬掩模上，并施加等离子体蚀刻。 蚀刻通孔区域直到软掩模完全侵蚀，然后蚀刻通孔区和通道区，以提供部分蚀刻的通道和完全蚀刻的通孔。 此后，种子层沉积在互连上，并且导电层电解沉积在种子层上，基本上填充通道和通孔。 然后通过抛光将互连表面平坦化，直到电导体仅保留在通道和通孔中。

公开(公告)号：US4929491A

公开(公告)日：1990-05-29

申请号：US265688

申请日：1988-11-01

Applicant: Shin Kawakami ,  Satoshi Haruyama ,  Hirotaka Okonogi

Inventor： Shin Kawakami ,  Satoshi Haruyama ,  Hirotaka Okonogi

IPC: H05K3/28 ,  H05K3/34

CPC classification number: H05K3/287 ,  H05K3/3452 ,  H05K2201/0116 ,  H05K2201/0166 ,  H05K2203/0588 ,  H05K3/3447 ,  Y10S428/901 ,  Y10T428/24802 ,  Y10T428/249953 ,  Y10T428/31511

Abstract: The present invention relates to a printed wiring board, and more particularly to a solder resist film applied on the printed wiring board, and to solder resist printing ink utilized to form such solder resist film.

公开(公告)号：US4551488A

公开(公告)日：1985-11-05

申请号：US625963

申请日：1984-06-29

Applicant: Edward J. Leech ,  Frank D. Russo

Inventor： Edward J. Leech ,  Frank D. Russo

IPC: B23K35/22 ,  C09D5/00 ,  H05K3/28 ,  C08L63/00 ,  C08L63/02 ,  C08L63/04

CPC classification number: B23K35/224 ,  C09D5/008 ,  H05K3/285 ,  H05K2201/0166 ,  H05K2201/0209 ,  H05K2203/1105 ,  Y10S428/901

Abstract: A resinous protective coating useful in adhering plastics to metallic substrates. The protective coating is particularly useful as a solder mask and in the manufacture of printed circuit boards with circuit patterns having a resolution of at least 0.25 mm lines and spaces thereon. The protective coating comprises resins dissolved in solvents, wherein the coating, upon being subjected to heat, goes from a liquid or soft "gel-like" state into a solid phase without bleeding. The protective coating is resistant to copper, nickel and gold electroplating baths, adheres to insulating substrates, adhesive coated base materials as well as metallic substrates and is capable of withstanding the thermal shock of dip soldering.

Abstract translation: 用于将塑料粘附到金属基材上的树脂保护涂层。 保护涂层作为焊接掩模特别有用，并且在印刷电路板的制造中具有电路图案，其分辨率至少为0.25mm，并且其间具有空间。 保护涂层包括溶解在溶剂中的树脂，其中经受热后的涂层从液体或软的“凝胶状”状态进入固相而不出血。 保护涂层耐铜，镍和金电镀浴，粘附到绝缘基材，粘合剂涂覆的基材和金属基材上，并能够承受浸焊的热冲击。

公开(公告)号：US4510276A

公开(公告)日：1985-04-09

申请号：US103600

申请日：1979-12-14

Applicant: Edward J. Leech ,  Frank D. Russo

Inventor： Edward J. Leech ,  Frank D. Russo

IPC: C09D5/00 ,  H05K3/00 ,  H05K3/28 ,  C08L63/00 ,  C08L63/10

CPC classification number: H05K3/0076 ,  C09D5/008 ,  H05K3/285 ,  H05K2201/0166 ,  H05K2201/0209 ,  H05K2203/1105 ,  Y10S428/901

Abstract: A resinous protective coating useful in adhering plastics to metallic substrates. The protective coating is particularly useful as a solder mask and in the manufacture of printed circuit boards with circuit patterns having a resolution of at least 0.25 mm lines and spaces thereon. The protective coating comprises resins dissolved in solvents, wherein the coating, upon being subjected to heat, goes from a liquid or soft "gel-like" state into a solid phase without bleeding. The protective coating is resistant to copper, nickel and gold electroplating baths, adheres to insulating substrates, adhesive coated base materials as well as metallic substrates and is capable of withstanding the thermal shock of dip soldering.

Abstract translation: 用于将塑料粘附到金属基材上的树脂保护涂层。 保护涂层作为焊接掩模特别有用，并且在印刷电路板的制造中具有电路图案，其分辨率至少为0.25mm，并且其间具有空间。 保护涂层包括溶解在溶剂中的树脂，其中经受热后的涂层从液体或软的“凝胶状”状态进入固相而不出血。 保护涂层耐铜，镍和金电镀浴，粘附到绝缘基材，粘合剂涂覆的基材和金属基材上，并能够承受浸焊的热冲击。

公开(公告)号：US4470872A

公开(公告)日：1984-09-11

申请号：US495911

申请日：1983-05-18

Applicant: Michio Sudo ,  Hitoshi Miura

Inventor： Michio Sudo ,  Hitoshi Miura

IPC: C23F1/00 ,  C23F1/02 ,  G03F7/40 ,  H01L21/306 ,  H05K3/06 ,  H01L21/308

CPC classification number: H05K3/061 ,  C23F1/02 ,  G03F7/40 ,  H05K2201/0166 ,  H05K2203/0369 ,  H05K2203/0597

Abstract: A metal member to be etched is subjected to chemical etching through a mask having a predetermined pattern whereafter that portion of the mask overhanging a side-etched portion resulting from the etching is bent down to be joined by an adhesive binder to the side wall of the side-etched portion to form an etching-resistant layer on the side wall. Then the metal member is subjected again to etching through the etching-resistant layer and the mask.

Abstract translation: 要蚀刻的金属构件通过具有预定图案的掩模进行化学蚀刻，然后将由蚀刻产生的侧蚀刻部分突出的掩模部分向下弯曲以通过粘合剂粘合剂连接到 侧蚀刻部分，以在侧壁上形成耐蚀刻层。 然后，通过耐蚀刻层和掩模再次对金属构件进行蚀刻。

公开(公告)号：US4372800A

公开(公告)日：1983-02-08

申请号：US223402

申请日：1981-01-08

Applicant: Masayuki Oizumi ,  Masakazu Uekita ,  Masana Goto ,  Ichiro Azumi ,  Shoji Uozumi ,  Masaharu Abe ,  Yasuo Fushiki ,  Minoru Isshiki ,  Kunio Kawasaki

Inventor： Masayuki Oizumi ,  Masakazu Uekita ,  Masana Goto ,  Ichiro Azumi ,  Shoji Uozumi ,  Masaharu Abe ,  Yasuo Fushiki ,  Minoru Isshiki ,  Kunio Kawasaki

IPC: B32B37/00 ,  B29C57/00 ,  B29C63/00 ,  B29C67/00 ,  B29C70/00 ,  B29C70/50 ,  B32B15/08 ,  B32B27/04 ,  B32B38/08 ,  D21H25/06 ,  H05K1/03 ,  H05K3/02 ,  C09J5/02

CPC classification number: B32B38/08 ,  B29C70/50 ,  B32B27/04 ,  D21H25/06 ,  H05K1/0346 ,  H05K1/0366 ,  H05K2201/0145 ,  H05K2201/0166 ,  H05K2201/0284 ,  H05K2201/0293 ,  H05K2203/1545 ,  H05K3/022 ,  Y10S428/901 ,  Y10T156/1085 ,  Y10T29/49124 ,  Y10T442/3431 ,  Y10T442/3528 ,  Y10T442/656 ,  Y10T442/67

Abstract: A continuous process for producing reinforced resin laminates comprising the steps of impregnating a fibrous substrate with a liquid resin which is free of volatile solvent and is capable of curing without generating liquid and gaseous byproducts, laminating a plurality of the resin-impregnated substrates into a unitary member, sandwiching the laminate between a pair of covering sheets, and curing the laminate between said pair of covering sheets without applying appreciable pressure. The improvement comprises adjusting the final resin content in said resin impregnated substrate at 10 to 90% by weight based on the total weight of said impregnated substrate.

公开(公告)号：US3691007A

公开(公告)日：1972-09-12

申请号：US3691007D

申请日：1969-08-14

Applicant: MICA CORP THE

Inventor： PAVLOU JAMES

IPC: H05K1/16 ,  H05K3/24 ,  H05K3/38 ,  B01K3/00 ,  C23B5/48

CPC classification number: H05K3/384 ,  H05K1/167 ,  H05K3/241 ,  H05K2201/0116 ,  H05K2201/0166 ,  H05K2201/0355 ,  H05K2201/0373 ,  H05K2203/0361 ,  H05K2203/0723 ,  H05K2203/0769 ,  Y10T428/12396 ,  Y10T428/12444 ,  Y10T428/12451 ,  Y10T428/12535 ,  Y10T428/12569 ,  Y10T428/12778 ,  Y10T428/12903 ,  Y10T428/3154 ,  Y10T428/31703

Abstract: THE PRESENT PATENT DESCRIBES A PRINTED CIRCUIT BOARD MATERIAL COMPRISING A RIGID PLASTIC SUBSTRATE, A RESISTIVE LAYER CARRIED ON SAID SUBSTRATE AND A CONDUCTIVE FILM CARRIED ON SAID RESISTIVE LAYER; THE IMPROVEMENT WHEREIN THE RESISTIVE LAYER IS APPLIED TO A PREFORMED CONDUCTIVE LAYER THROUGH A POROUS, POLYMERIC MEMBERANE.

公开(公告)号：US11903133B2

公开(公告)日：2024-02-13

申请号：US17955683

申请日：2022-09-29

Applicant: Zhuhai ACCESS Semiconductor Co., Ltd

Inventor： Xianming Chen ,  Lei Feng ,  Gao Huang ,  Benxia Huang ,  Yejie Hong

IPC: H05K1/18 ,  H05K3/00 ,  H05K1/03 ,  H05K1/11 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K1/186 ,  H05K1/0366 ,  H05K1/113 ,  H05K3/0035 ,  H05K3/429 ,  H05K3/4661 ,  H05K2201/0129 ,  H05K2201/0166 ,  H05K2201/032 ,  H05K2201/09509 ,  H05K2203/061 ,  H05K2203/308

Abstract: A method for manufacturing a structure for embedding and packaging multiple devices by layer includes preparing a polymer supporting frame, mounting a first device in a first device placement mouth frame to form a first packaging layer, forming a first circuit layer and a second circuit layer, forming a second conductive copper pillar layer and a second sacrificial copper pillar layer, forming a second insulating layer on the first circuit layer, and forming a third insulating layer on the second circuit layer, forming a second device placement mouth frame vertically overlapped with the first device placement mouth frame, mounting a second device and a third device in the second device placement mouth frame to form a second packaging layer, forming a third circuit layer on the second insulating layer. A terminal of the second device and a terminal of the third device are respectively communicated with the third circuit layer.

公开(公告)号：US20180139852A1

公开(公告)日：2018-05-17

申请号：US15351066

申请日：2016-11-14

Applicant: International Business Machines Corporation

Inventor： Bruce J. CHAMBERLIN ,  Scott B. KING ,  Joseph KUCZYNSKI ,  David J. RUSSELL

IPC: H05K3/40 ,  H05K3/22 ,  H05K3/46 ,  H05K1/11 ,  H05K1/09

CPC classification number: H05K3/4076 ,  H05K1/09 ,  H05K1/116 ,  H05K3/002 ,  H05K3/0038 ,  H05K3/0047 ,  H05K3/22 ,  H05K3/422 ,  H05K3/429 ,  H05K3/4644 ,  H05K2201/0166 ,  H05K2201/0209 ,  H05K2201/0347 ,  H05K2201/09372 ,  H05K2201/095 ,  H05K2201/09581 ,  H05K2203/0723 ,  H05K2203/0793 ,  H05K2203/10 ,  H05K2203/11 ,  H05K2203/1184

Abstract: In some embodiments, methods include drilling one or a plurality of PTHs with any industrial grade drill to fabricate holes with positive etch back, flooding the PTHs with a dilute solution of an acrylate monomer/oligomer containing an appropriate level of peroxide initiator, polymerizing the acrylate, and then rising the PTHs with the solvent used in the formulation of the acrylate material. In one embodiment, the printed circuit board may include a substrate comprising a plurality of metal layers separated by a plurality of insulating layers; a plurality of plated through holes formed in the substrate, each plated through hole comprising: recesses formed at each insulating layer, copper lands between the recesses, a polymer coating in each recess, and a metal layer lining the plated through hole.