公开(公告)号：US20030098514A1

公开(公告)日：2003-05-29

申请号：US10340331

申请日：2003-01-09

Inventor： Todd O. Bolken ,  Cary J. Baerlocher ,  David J. Corisis ,  Chad A. Cobbley

IPC: H01L023/28

CPC classification number: H01L21/561 ,  H01L21/565 ,  H01L23/3107 ,  H01L24/32 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/30107 ,  H05K3/303 ,  H05K3/305 ,  H05K3/3436 ,  H05K2201/10568 ,  H05K2201/10734 ,  H05K2201/10977 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: A ball grid array assembly includes a package cover that encapsulates a die and a portion of a substrate to which the die is attached, including an edge of the substrate. Encapsulation of the substrate edge by the cover reduces penetration of moisture or other contaminants into the substrate. The cover includes a rib that extends to contact a circuit board to which the ball grid array assembly is connected. With such a rib, planarity between the circuit board and the substrate is maintained during soldering.

Abstract translation: 球栅阵列组件包括包封模具和包括模具附接到其上的基板的一部分的封装盖，包括基板的边缘。 通过盖子封装衬底边缘可以减少水分或其他污染物渗透到衬底中。 该盖包括延伸以接触球栅阵列组件所连接的电路板的肋。 使用这样的肋，在焊接期间保持电路板和基板之间的平坦度。

公开(公告)号：US20020175333A1

公开(公告)日：2002-11-28

申请号：US10201768

申请日：2002-07-22

Inventor： Shih-Yi Wang

IPC: H01L027/15

CPC classification number: H01L33/62 ,  H01L2224/48091 ,  H01L2924/12041 ,  H01L2924/3025 ,  H05K3/303 ,  H05K2201/10106 ,  H05K2201/10568 ,  H05K2203/167 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A photoelectric structure for surface mounting on a circuit board having a plurality of insertion holes includes at least a pair of fixation pins integrally extended downwards from a periphery of the mounting photoelectric element, and a pair of bended connections integrally extended downwards from a periphery of the mounting photoelectric element such that they are connected with the circuit board by welding, so as to facilitate the other pair of fixation pins to be inserted into the insertion holes of the circuit board for locating securely the photoelectric element for use in Surface Mount Device, SMD, and for enhancing effectively the position of the detection point as well as the degree of precision of the light emitting signal.

Abstract translation: 用于表面安装在具有多个插入孔的电路板上的光电结构包括从安装光电元件的周边向下一体地延伸的至少一对固定销，以及从所述安装光电元件的周边向下整体延伸的一对弯曲连接 安装光电元件，使其通过焊接与电路板连接，以便于另一对固定销插入电路板的插孔中，以安全地定位用于表面贴装器件的光电元件，SMD ，并且有效地提高检测点的位置以及发光信号的精度。

公开(公告)号：US06440775B2

公开(公告)日：2002-08-27

申请号：US09885000

申请日：2001-06-21

Applicant: Theodore A. Khoury

Inventor： Theodore A. Khoury

IPC: H01L2144

CPC classification number: H05K3/366 ,  H01L23/13 ,  H01L2224/48091 ,  H01L2924/10253 ,  H01R13/514 ,  H05K1/142 ,  H05K2201/048 ,  H05K2201/09172 ,  H05K2201/10446 ,  H05K2201/10568 ,  H05K2203/041 ,  H05K2203/049 ,  H05K2203/167 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An integrated circuit (IC) having a plurality of IC modules, each IC module having attachment surfaces to which elements of the IC are attached, and each IC module having interlocking edges adjacent to the attachment surface. The interlocking edges of adjacent IC modules are interlocked to form a structural connection between the IC modules. The interlocking edges are a plurality of teeth and recesses, which are arranged in rows. The teeth are securely received by a respective recess in an adjacent interlocking edge to create a structural connection between adjacent IC modules. In addition, the interlocking edges can be a ridge member or a ridge recess, where the ridge member or ridge recess is securely received by a respective ridge recess or ridge member of an adjacent IC module to create a structural connection between the IC modules. The interconnection edge can also be a combination of the ridge member, ridge recess, and/or the rows of teeth and recesses. The attachment surfaces of adjacent IC modules can be co-planar and non-planar, depending on the shape desired. The elements on the IC modules communicate using external pathways and/or internal pathways using conventional wire-bond techniques or using conductive layers within the IC module. The IC module is formed of conventional Si wafers. Using this configuration, an IC can be constructed that utilizes less real estate, fits in non-planar spaces in a housing, and has improved speed due to reduced pathway lengths.

Abstract translation: 一种具有多个IC模块的集成电路（IC），每个IC模块具有连接IC的元件的附接表面，并且每个IC模块具有与附接表面相邻的互锁边缘。 相邻IC模块的互锁边缘互锁，形成IC模块之间的结构连接。 互锁边缘是排成行的多个齿和凹槽。 齿通过相邻的互锁边缘中的相应凹槽被牢固地接收，以在相邻的IC模块之间产生结构连接。 此外，互锁边缘可以是脊部件或脊部凹部，其中脊部件或脊部凹部被相邻IC模块的相应脊部凹部或脊部构件牢固地接收，以在IC模块之间形成结构连接。 互连边缘还可以是脊部件，脊部凹部和/或齿排和凹槽的组合。 取决于所需的形状，相邻IC模块的附接表面可以是共面的和非平面的。 IC模块上的元件使用常规引线键合技术或在IC模块内使用导电层，使用外部路径和/或内部路径进行通信。 IC模块由常规的Si晶片形成。 使用这种配置，可以构造出利用较少的空间，适合于壳体中的非平面空间并且由于减小的路径长度而具有改进的速度的IC。

公开(公告)号：US06400033B1

公开(公告)日：2002-06-04

申请号：US09585506

申请日：2000-06-01

Applicant: Robert F. Darveaux

Inventor： Robert F. Darveaux

IPC: H01L2940

CPC classification number: H01L24/81 ,  H01L23/10 ,  H01L24/75 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/303 ,  H05K3/3436 ,  H05K2201/10568 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2201/2018 ,  H05K2201/2036 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A method and apparatus for reinforcing the solder connections between a semiconductor device and a substrate includes the provision of a rigid frame having a central opening through it, a planar top surface, a bottom surface opposite and parallel to the top surface, and a thickness between the two surfaces to equal to the height of the solder connections. The top surface of the frame is attached to the bottom surface of the semiconductor device at the peripheral edges thereof and outside of a plurality of input/output terminals thereon. The bottom surface of the frame is attached to the top surface of the substrate. The frame reinforces the solder connections between a C4-mounted semiconductor die or a C5-mounted semiconductor package and a substrate against the stresses acting on the connections with bending of the PCB.

Abstract translation: 一种用于加强半导体器件和衬底之间的焊料连接的方法和装置包括提供刚性框架，其具有通过其的中心开口，平面顶表面，与顶表面相对并平行的底表面， 两个表面等于焊料连接的高度。 框架的顶面在其外围边缘处和其上的多个输入/输出端子的外部附接到半导体器件的底表面。 框架的底面附着到基板的顶面。 该框架加强了C4安装的半导体管芯或C5安装的半导体封装和基板之间的焊接连接，以抵抗作用在PCB上弯曲的连接上的应力。

公开(公告)号：US06343940B1

公开(公告)日：2002-02-05

申请号：US09596437

申请日：2000-06-19

Applicant: Theodore A. Khoury ,  Robert Edward Aldaz ,  Yu Zhou

Inventor： Theodore A. Khoury ,  Robert Edward Aldaz ,  Yu Zhou

IPC: H01R909

CPC classification number: G01R1/06716 ,  G01R1/045 ,  G01R1/07307 ,  H01L23/13 ,  H01L2224/49175 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01R13/2407 ,  H01R13/514 ,  H05K1/142 ,  H05K2201/048 ,  H05K2201/09172 ,  H05K2201/10446 ,  H05K2201/10568 ,  H05K2203/041 ,  H05K2203/049 ,  H05K2203/167 ,  H01L2924/00

Abstract: A contact structure having a contact substrate and a plurality of contactors is a block of a large contact structure or a contactor assembly for establishing electrical connection with contact targets. The contact structure is formed of a contact substrate and a plurality of contactors in which each of the contactors has a curved portion for exerting a spring force in a vertical direction. The contact substrate has engagement mechanism at outer edges thereof so as to connect other contact substrates at any desired edges to establish the contactor assembly with desired size, shape and number of contactors.

Abstract translation: 具有接触基板和多个接触器的接触结构是用于建立与接触目标的电连接的大接触结构的块或接触器组件。 接触结构由接触基板和多个接触器形成，其中每个接触器具有用于在垂直方向上施加弹簧力的弯曲部分。 接触衬底在其外边缘处具有接合机构，以便在任何期望的边缘处连接其它接触衬底，以建立具有所需尺寸，形状和数量的接触器的接触器组件。

公开(公告)号：US06281844B1

公开(公告)日：2001-08-28

申请号：US09433794

申请日：1999-11-03

Applicant: Walter Kodim ,  Frank Bäuerlein

Inventor： Walter Kodim ,  Frank Bäuerlein

IPC: H01Q138

CPC classification number: H01Q9/0407 ,  H01Q19/10 ,  H05K1/0243 ,  H05K3/341 ,  H05K2201/0373 ,  H05K2201/10568 ,  H05K2201/10969 ,  H05K2201/2036 ,  Y02P70/613

Abstract: The invention relates to an electrical component (CO) as well as a device (DEV) comprising such an electrical component (CO) and an electric circuit module (MO). A ground plane (4) of the component (CO) and a ground plane (2) of the circuit module (MO) are brought into contact via projections (4″) provided on the ground plane (4) of the component (CO) and/or on the ground plane of the circuit module (MO). The provision of the projections (4″) and the recesses (4′) therebetween provide heat sinks between the projections (4″) when they are soldered to the ground plane (2) of the circuit module (MO). Through-holes (8′) and additional non-ground conductors (2′) can be provided between pads (14) of the ground plane (2) of the circuit module (MO) allowing an efficient use of the available space. The invention is particularly useful when a patch antenna needing a large ground plane is connected to a multilayer circuit board. Another embodiment of the invention comprises a plurality of spacer elements which are arranged between the ground planes (2, 4) of the circuit module (MO) and of the component (CO), such that the ground planes (2, 4) can be kept flat. This allows a design of the configuration of the ground plane of the circuit module (MO) independently from a configuration of the component (CO).

Abstract translation: 本发明涉及电气部件（CO）以及包括这种电气部件（CO）和电路模块（MO））的装置（DEV）。 组件（CO）的接地平面（4）和电路模块（MO）的接地平面（2）通过设置在部件（CO）的接地平面（4）上的突起（4“）接触 ）和/或在电路模块（MO）的接地平面上。 当它们被焊接到电路模块（MO）的接地平面（2）时，其间提供突起（4“）和凹部（4'）在突起（4”）之间提供散热器。 可以在电路模块（MO）的接地平面（2）的焊盘（14）之间提供通孔（8'）和附加的非接地导体（2'），从而有效地利用可用空间。 当将需要大型接地层的贴片天线连接到多层电路板时，本发明特别有用。 本发明的另一实施例包括布置在电路模块（MO）的接地平面（2,4）和部件（CO）之间的多个间隔元件，使得接地平面（2,4）可以是 保持平坦 这允许独立于组件（CO）的配置来设计电路模块（MO）的接地平面的配置。

公开(公告)号：US06205646B1

公开(公告)日：2001-03-27

申请号：US09217429

申请日：1998-12-21

Applicant: David H. Thibado

Inventor： David H. Thibado

IPC: H01F706

CPC classification number: H05K3/303 ,  H01F27/292 ,  H05K13/0409 ,  H05K2201/10568 ,  H05K2203/0195 ,  H05K2203/082 ,  Y02P70/613 ,  Y10T29/4902 ,  Y10T29/49071 ,  Y10T29/49144 ,  Y10T29/49149

Abstract: An air-wound, coil-type, passive inductor includes a surface which allows the coil to be picked-up using a vacuum probe of a head of a pick-an-place machine and the surface does not interfere with adjusting the spacing between the loops of the coil for tuning the coil after the coil is attached to a circuit board. Terminal ends of the coil are placed on solder paste on interconnection pads on the circuit board, then the board is heated to reflow the solder, and then washed to remove the flux contained in the solder paste. The surface may be adapted to be removed or at least degraded by the heating, or the washing, or afterwards by a mechanical method of removal without damaging the coil.

Abstract translation: 空气缠绕的线圈型无源电感器包括允许使用拾取机器的头部的真空探针拾取线圈的表面，并且该表面不会干扰调整间隔 在线圈附接到电路板之后用于调谐线圈的线圈的环路。 将线圈的端子放置在电路板上的互连焊盘上的焊膏上，然后将板加热以回流焊料，然后洗涤以除去焊膏中所含的焊剂。 表面可以适于通过加热或洗涤而被去除或至少降解，或之后通过机械去除方法而不损坏线圈。

公开(公告)号：US06198172B1

公开(公告)日：2001-03-06

申请号：US09026584

申请日：1997-02-20

Applicant: Jerrold L. King ,  Leland R. Nevill

Inventor： Jerrold L. King ,  Leland R. Nevill

IPC: H01L23544

CPC classification number: H05K3/303 ,  G01R31/2851 ,  G01R31/2884 ,  H05K2201/10568 ,  H05K2201/10689 ,  H05K2203/0195 ,  Y02P70/613

Abstract: An improved semiconductor chip package capable of independently aligning with testing equipment during the manufacturing phase of electrical testing. Independent alignment is realized by directly connecting the semiconductor chip package to the test alignment apparatus by fitting together two substantially conforming surfaces, one on the chip package and one on the alignment apparatus. The conforming surfaces are arranged so that only one matable position is achievable. The substantially conforming surfaces equate to three substantially conical indentations on the chip package and three substantially conical protrusions or protuberances of substantially conforming size and depth extending from the alignment apparatus. Once fitted, the three protrusions suspend the semiconductor chip in a substantially horizontal plane so that electrical test contacts, also substantially in a horizontal plane, may be easily contacted with the conductive leads extending generally horizontally and co-planar from the semiconductor chip.

Abstract translation: 改进的半导体芯片封装，能够在电气测试制造阶段与测试设备独立对齐。 通过将两个基本上一致的表面（一个在芯片封装上）和一个在对准装置上装配在一起，将半导体芯片封装直接连接到测试对准装置，实现独立对准。 配合表面被布置成仅可实现一个可配合的位置。 基本上一致的表面等同于芯片封装上的三个基本上圆锥形的凹口，以及从对准装置延伸的基本上一致的尺寸和深度的三个基本上圆锥形的突起或突起。 一旦安装，三个突起将半导体芯片悬挂在基本上水平的平面中，使得电测试接触（也基本上在水平面）可以容易地与从半导体芯片大致水平并共面延伸的导电引线接触。

公开(公告)号：US6137062A

公开(公告)日：2000-10-24

申请号：US076048

申请日：1998-05-11

Applicant: John Zimmerman

Inventor： John Zimmerman

IPC: H01L23/498 ,  H05K3/30 ,  H05K3/34 ,  H05K1/16 ,  H05R9/09

CPC classification number: H05K3/3436 ,  H01L23/49816 ,  H05K3/303 ,  H01L2224/16237 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/16152 ,  H05K2201/0379 ,  H05K2201/09472 ,  H05K2201/09827 ,  H05K2201/10568 ,  H05K2201/10734 ,  H05K2201/2036 ,  H05K2203/041 ,  Y02P70/613

Abstract: A ball grid array for a multilayer ceramic package 500 is disclosed. Package 500 contains dielectric multilayer substrates 502 having transmission lines 504 deposited therebetween and at least a first of the substrates having receptacles 506 therein each complementarily configured to respectively receive a set of solder balls 508. Contacts 510 within the receptacles 506 connect transmission lines 504 to solder balls 508. Terminal pads 512 are deposited on a base substrate 514 substantially in registration and aligned with the solder balls 508 to define an electrical interconnection. A method of manufacturing a multilayer ceramic package 500 with a ball grid array is also disclosed which involves orienting package 500 so receptacles 506 face upward and flooding a major surface with solder balls 508. Subsequently, solder balls 508 that did not enter receptacles 506 are removed resulting in a low profile package with minimum height above a circuit board.

Abstract translation: 公开了一种用于多层陶瓷封装500的球栅阵列。 封装500包含电介质多层衬底502，其具有沉积在其间的传输线504，并且至少第一衬底具有插座506，其中每个互补构造成分别接收一组焊球508.容器506内的接触件510将传输线504连接到焊料 端子焊盘512沉积在基本基板514上，基本上对齐并与焊球508对齐以限定电互连。 还公开了一种制造具有球栅阵列的多层陶瓷封装500的方法，其包括定向封装500，使得插座506朝上并且用焊球508浸渍主表面。随后，去除未进入插座506的焊球508 导致在电路板上方具有最小高度的薄型封装。

公开(公告)号：US6060780A

公开(公告)日：2000-05-09

申请号：US804718

申请日：1997-02-21

Applicant: Tameharu Ohta ,  Tomohito Kunda

Inventor： Tameharu Ohta ,  Tomohito Kunda

IPC: G01P1/02 ,  H01L25/16 ,  H05K1/03 ,  H05K1/11 ,  H05K3/30 ,  H05K3/34 ,  H01L23/12

CPC classification number: G01P1/023 ,  H01L25/165 ,  H05K3/3436 ,  H05K3/3442 ,  H01L2224/05554 ,  H01L2224/48137 ,  H01L2224/49175 ,  H01L2924/01046 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/19041 ,  H05K1/0306 ,  H05K1/111 ,  H05K2201/09045 ,  H05K2201/09381 ,  H05K2201/094 ,  H05K2201/09781 ,  H05K2201/10083 ,  H05K2201/10454 ,  H05K2201/10568 ,  H05K2201/10727 ,  H05K2201/10969 ,  H05K2201/2036 ,  H05K2203/306 ,  H05K3/303 ,  Y02P70/613

Abstract: A surface mount type semiconductor package is mounted on a printed board by bonding, by means of solder bumps signal electrodes, electrically connected to respective terminals of a semiconductor chip incorporated in the package, with lands provided on the printed board. On a mount surface of the package, there are provided auxiliary electrodes formed as electrodes which are not electrically connected to the respective terminals of the semiconductor chip and have a thickness greater than that of the signal electrodes. As a result, solder thickness is secured for the solder bumps between each signal electrode and corresponding land by the difference in thickness between the auxiliary electrode and the signal electrode.

Abstract translation: 表面安装型半导体封装通过焊接凸起信号电极，通过与设置在封装中的半导体芯片的各个端子电连接到印刷电路板上的焊盘而结合而安装在印刷电路板上。 在封装的安装表面上，提供了形成为不与半导体芯片的各个端子电连接并且具有大于信号电极的厚度的电极的辅助电极。 结果，通过辅助电极和信号电极之间的厚度差，确保每个信号电极和相应焊盘之间的焊料凸块的焊料厚度。