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公开(公告)号:US4490690A
公开(公告)日:1984-12-25
申请号:US370789
申请日:1982-04-22
Applicant: Hirosuki Suzuki
Inventor: Hirosuki Suzuki
CPC classification number: H01P3/085 , H05K1/0219 , H05K1/0393 , H05K2201/0116 , H05K2201/015 , H05K2201/09618 , H05K2201/09672 , H05K2201/09736 , H05K3/28
Abstract: A stripline cable is provided comprising a dielectric layer and a plurality of sets of narrow signal conductors and wider ground conductors which are disposed in confronting relation to each other with the dielectric layer sandwiched therebetween. The signal and ground conductors are alternately arranged transversely of the conductors. The dielectric layer is preferably made of porous polytetrafluoroethylene resin. With this arrangement, crosstalk in the stripline can be greatly reduced and signals can be transmitted at higher speeds over the stripline.
Abstract translation: 提供了一种带状电缆,其包括电介质层和多组窄信号导体和较宽的接地导体,它们彼此相对地设置,其间夹有介电层。 信号和接地导体交替布置在导体的横向上。 电介质层优选由多孔聚四氟乙烯树脂制成。 通过这种布置,可以大大减少带状线中的串扰,并且可以以更高的速度在带状线上传输信号。
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公开(公告)号:US2812501A
公开(公告)日:1957-11-05
申请号:US41416554
申请日:1954-03-04
Applicant: SANDERS ASSOCIATES INC
Inventor: SOMMERS DONALD J
CPC classification number: H01P3/085 , H05K1/0219 , H05K3/429 , H05K2201/09618
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公开(公告)号:US12063737B2
公开(公告)日:2024-08-13
申请号:US17921778
申请日:2021-04-26
Applicant: LG INNOTEK CO., LTD.
Inventor: Hae Sik Kim , Jee Heum Paik
CPC classification number: H05K1/0296 , H04N23/687 , H05K1/116 , H05K2201/0939 , H05K2201/09618 , H05K2201/10151 , H05K2201/10287
Abstract: A circuit board according to an embodiment includes an insulating layer; and a lead pattern portion disposed on the insulating layer, wherein the lead pattern portion includes: a first portion disposed on the insulating layer; and a second portion extending from one end of the first portion; wherein the first portion is disposed overlapping the insulating layer in a vertical direction, wherein the second portion is disposed in an outer region of the insulating layer and does not overlap the insulating layer; and wherein the lead pattern portion has a centerline average roughness in a range of 0.05 μm to 0.5 μm or a 10-point average roughness in a range of 1.0 μm to 5.0 μm.
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公开(公告)号:US20240098897A1
公开(公告)日:2024-03-21
申请号:US18469675
申请日:2023-09-19
Applicant: IBIDEN CO., LTD.
Inventor: Yoshio MIZUTANI
CPC classification number: H05K1/113 , H05K3/0094 , H05K2201/0959 , H05K2201/096 , H05K2201/09618
Abstract: A wiring substrate includes an insulating layer having through holes, a first conductor layer formed on first surface of the insulating layer, a second conductor layer formed on second surface of the insulating layer, and interlayer conductors formed along wall surfaces surrounding the through holes such that each interlayer conductor has a film-like shape and is connecting the first and second conductor layers. The interlayer conductors include first conductors formed in first region of the insulating layer and second conductors formed in second region of the insulating layer at density higher than density of the first conductors, and a thickness of each first interlayer conductor in its end part is substantially same as or larger than a thickness of each second conductor in its end part and a thickness of each first conductor in its center part is larger than a thickness of each second conductor in its center part.
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公开(公告)号:US20240008178A1
公开(公告)日:2024-01-04
申请号:US18253892
申请日:2021-10-29
Applicant: NITTO DENKO CORPORATION
Inventor: Shusaku SHIBATA , Takahiro IKEDA , Teppei NIINO
CPC classification number: H05K1/113 , H05K3/44 , H05K2201/09481 , H05K2201/09554 , H05K2201/09618 , H05K2201/09609 , H05K2201/0979 , H05K1/056
Abstract: A wiring circuit board includes a metal supporting board; an insulating layer; and a conductive layer in this order in a thickness direction. The conductive layer includes a terminal portion, and a tail line portion extending from the terminal portion. The terminal portion has a via portion that penetrates the insulating layer in the thickness direction and is connected to the metal supporting board. The tail line portion has a base end portion that has a width different from a width of the terminal portion in a direction orthogonal to the extending direction of the tail line portion and that is connected with the terminal portion; and a second via portion that penetrates the insulating layer in the thickness direction and that is connected to the metal supporting board.
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公开(公告)号:US11800638B2
公开(公告)日:2023-10-24
申请号:US17992161
申请日:2022-11-22
Applicant: Smith & Nephew PLC
Inventor: Ben Alan Askem , Fernando Bettani , Alberto Fasan , Allan Kenneth Frazer Grugeon Hunt , Felix Clarence Quintanar
CPC classification number: H05K1/0257 , A61M1/74 , A61M1/80 , A61M1/84 , A61M1/90 , A61M1/96 , H05K1/0259 , H05K1/115 , H05K1/181 , H05K9/0067 , A61M1/78 , A61M1/962 , A61M1/982 , A61M1/985 , A61M2205/0233 , A61M2205/15 , A61M2205/18 , A61M2205/502 , A61M2205/8206 , A61M2209/088 , H05K2201/093 , H05K2201/09354 , H05K2201/09618
Abstract: Embodiments of negative pressure wound therapy systems and methods are disclosed. In one embodiment, an apparatus includes a housing, negative pressure source, circuit board, and one or more controllers. The circuit board can be supported by the housing and include a conductive pathway extending around at least part of a perimeter of a first side of the circuit board. The conductive pathway can be electrically coupled to an electrical ground for the circuit board. The one or more controllers can be mounted on the circuit board and activate and deactivate the negative pressure source.
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公开(公告)号:US20190231939A1
公开(公告)日:2019-08-01
申请号:US16334124
申请日:2017-09-26
Applicant: Smith & Nephew PLC
Inventor: Ben Alan Askem , Fernando Bettani , Alberto Fasan , Allan Kenneth Frazer Grugeon Hunt , Felix Clarence Quintanar
CPC classification number: A61M1/0023 , A61M1/0066 , A61M1/0088 , A61M2205/0233 , A61M2205/15 , A61M2205/18 , A61M2205/502 , A61M2205/8206 , A61M2209/088 , H05K1/0257 , H05K1/0259 , H05K1/115 , H05K1/181 , H05K9/0067 , H05K2201/093 , H05K2201/09354 , H05K2201/09618
Abstract: Embodiments of negative pressure wound therapy systems and methods are disclosed. In one embodiment, an apparatus includes a housing, negative pressure source, circuit board, and one or more controllers. The circuit board can be supported by the housing and include a conductive pathway extending around at least part of a perimeter of a first side of the circuit board. The conductive pathway can be electrically coupled to an electrical ground for the circuit board. The one or more controllers can be mounted on the circuit board and activate and deactivate the negative pressure source.
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公开(公告)号:US20180323140A1
公开(公告)日:2018-11-08
申请号:US16036084
申请日:2018-07-16
Applicant: Renesas Electronics Corporation
Inventor: Hiroki SHIBUYA
IPC: H01L23/528 , H01L23/522 , H01L23/66 , H05K1/02 , H01L23/498 , H05K3/28
CPC classification number: H01L23/528 , H01L23/49838 , H01L23/5226 , H01L23/66 , H01L2223/6616 , H01L2223/6677 , H05K1/0224 , H05K3/284 , H05K2201/09618 , H05K2201/10098
Abstract: This invention provides an electronic device with improved reliability. The electronic device has a wiring board with a back-surface ground pattern formed at the back surface of the board. The back-surface ground pattern is provided with a notch overlapping a region of an upper wiring layer at which a board member is exposed and which is encircled by a wide pattern, the notch permitting the release of water vapor from the region.
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公开(公告)号:US09949361B1
公开(公告)日:2018-04-17
申请号:US15146577
申请日:2016-05-04
Applicant: Scientific Components Corporation
Inventor: Aaron Vaisman
CPC classification number: H01P5/085 , H01P5/028 , H01P5/10 , H05K1/0245 , H05K1/0251 , H05K2201/09609 , H05K2201/09618
Abstract: A balun device comprises an input microstrip, a first output microstrip, a second output microstrip, and a junction comprising a conductive termination of the input microstrip, the first output microstrip, and the second output microstrip, whereby an input signal provided to the input microstrip will propagate through the first output microstrip as a first output signal and through the second output microstrip as a second output signal, wherein the phase of the first output signal is identical to the phase of the input signal, and wherein the junction inverts the phase of the second output signal relative to the phase of the input signal and the first output signal.
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公开(公告)号:US20180068942A1
公开(公告)日:2018-03-08
申请号:US15626120
申请日:2017-06-17
Applicant: Renesas Electronics Corporation
Inventor: Hiroki SHIBUYA
IPC: H01L23/528 , H01L23/66 , H01L23/522
CPC classification number: H01L23/528 , H01L23/49838 , H01L23/5226 , H01L23/66 , H01L2223/6616 , H01L2223/6677 , H05K1/0224 , H05K3/284 , H05K2201/09618 , H05K2201/10098
Abstract: This invention provides an electronic device with improved reliability. The electronic device has a wiring board with a back-surface ground pattern formed at the back surface of the board. The back-surface ground pattern is provided with a notch from which a board member is exposed.
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