公开(公告)号：US20190008033A1

公开(公告)日：2019-01-03

申请号：US16025641

申请日：2018-07-02

Applicant: INKTEC CO., LTD.

Inventor： KWANG-CHOON CHUNG ,  BYUNG WOONG MOON

IPC: H05K1/02 ,  H05K1/11 ,  H01B7/08 ,  H05K3/42

CPC classification number: H05K1/0219 ,  H01B7/08 ,  H01R12/79 ,  H05K1/028 ,  H05K1/115 ,  H05K1/118 ,  H05K3/422 ,  H05K3/425 ,  H05K9/0098 ,  H05K2201/0154 ,  H05K2201/0715 ,  H05K2201/093 ,  H05K2201/09609 ,  H05K2201/09681 ,  H05K2203/072

Abstract: The present disclosure relates a printed circuit board having an EMI shielding function. In an example embodiment, the printed circuit board includes a substrate, a signal unit disposed on the substrate, a ground unit disposed in parallel with the signal unit, an insulation layer disposed above the substrate and covering the signal unit and the ground unit, an EMI shielding layer disposed on the insulation layer and under the substrate, respectively, and a shielding bridge passing through the substrate and the insulation layer at opposite sides of the signal unit and electrically connecting the EMI shielding layer disposed on the insulation layer to the EMI shielding layer disposed under the substrate.

公开(公告)号：US20180246601A1

公开(公告)日：2018-08-30

申请号：US15958388

申请日：2018-04-20

Applicant: Japan Display Inc.

Inventor： Hayato Kurasawa ,  Keisuke Asada ,  Tatsuya Ide ,  Koji Ishizaki

IPC: G06F3/044 ,  G06F3/041 ,  H05K1/02 ,  H05K1/14

CPC classification number: G06F3/044 ,  G02F1/13338 ,  G06F3/0412 ,  G06F2203/04108 ,  G06F2203/04112 ,  H05K1/028 ,  H05K1/117 ,  H05K1/147 ,  H05K3/28 ,  H05K3/361 ,  H05K2201/09263 ,  H05K2201/09663 ,  H05K2201/09681 ,  H05K2201/0969 ,  H05K2201/09727 ,  H05K2201/10128

Abstract: According to one embodiment, a detection device includes a substrate, detection electrode, terminal formed of a metal material, lead, coating layer, conductive adhesion layer, and circuit board. The lead connects the electrode and the terminal. The coating layer covers the electrode and the lead, and partly covers the terminal. The adhesion layer covers a part of the terminal exposed from the coating layer and covers a part of the coating layer. The circuit board is connected to the terminal with the adhesion layer interposed therebetween. At least in an overlapping area where the adhesion layer covers the coating layer, an area of the metal material per unit area is smaller than that of the other area of the terminal.

公开(公告)号：US20180110119A1

公开(公告)日：2018-04-19

申请号：US15845288

申请日：2017-12-18

Applicant: FUJIFILM Corporation

Inventor： Hiroshige NAKAMURA ,  Tadashi KURIKI

IPC: H05K1/02 ,  G06F3/044

CPC classification number: H05K1/0296 ,  G06F3/044 ,  G06F2203/04103 ,  G06F2203/04112 ,  H05K2201/09681

Abstract: A conductive component includes a first electrode pattern made of metal thin wires, the first electrode pattern including a plurality of first conductive patterns that extend in a first direction and are alternated with first non-conductive patterns. Each first conductive pattern includes break parts in portions other than intersection parts of the thin metal wires. The conductive component further includes a second electrode pattern made of thin metal wires, the second electrode pattern including a plurality of second conductive patterns that extend in a second direction orthogonal to the first direction and are alternated with second non-conductive patterns. Each second conductive pattern includes break parts in portions other than intersection parts of thin metal wires

公开(公告)号：US20180018040A1

公开(公告)日：2018-01-18

申请号：US15548740

申请日：2016-02-05

Applicant: DONGWOO FINE-CHEM CO., LTD.

Inventor： Byung Hoon SONG ,  Dong Ki KEUM ,  Dae Chul PARK

IPC: G06F3/044

CPC classification number: G06F3/044 ,  G06F3/041 ,  G06F2203/04103 ,  G06F2203/04112 ,  H01B1/02 ,  H01B1/124 ,  H01B1/22 ,  H05K1/095 ,  H05K2201/0108 ,  H05K2201/0215 ,  H05K2201/026 ,  H05K2201/09681 ,  H05K2201/10151

Abstract: A conductive sheet according to an aspect of the present invention includes a first nanostructure and a second nanostructure disposed to intersect each other. A thickness of an intersect region of the first nanostructure and the second nanostructure is 0.6 to 0.9 times the sum of thicknesses of non-intersection regions of the first nanostructure and the second nanostructure.

公开(公告)号：US20170290155A1

公开(公告)日：2017-10-05

申请号：US15628430

申请日：2017-06-20

Applicant: INTEL CORPORATION

Inventor： Adel A. Elsherbini ,  Ravindranath Mahajan ,  John S. Guzek ,  Nitin A. Deshpande

IPC: H05K1/14 ,  H01L25/00 ,  H05K1/02 ,  H01L23/498 ,  H01L23/552 ,  H01L25/065

CPC classification number: H05K1/147 ,  H01L23/13 ,  H01L23/49833 ,  H01L23/552 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K3/361 ,  H05K2201/09245 ,  H05K2201/09681 ,  Y10T29/49126

Abstract: Embodiments of the present disclosure are directed towards electro-magnetic interference (EMI) shielding techniques and configurations. In one embodiment, an apparatus includes a first substrate, a die having interconnect structures coupled with the first substrate to route input/output (I/O) signals between the die and the first substrate and a second substrate coupled with the first substrate, wherein the die is disposed between the first substrate and the second substrate and at least one of the first substrate and the second substrate include traces configured to provide electro-magnetic interference (EMI) shielding for the die. Other embodiments may be described and/or claimed.

公开(公告)号：US09742086B2

公开(公告)日：2017-08-22

申请号：US14916612

申请日：2014-09-04

Applicant: FUJIKURA LTD. ,  DDK Ltd.

Inventor： Yuki Ishida ,  Masayuki Suzuki ,  Yuki Nakano ,  Harunori Urai ,  Norifumi Nagae

IPC: H01R12/78 ,  H01R12/88 ,  H05K1/02 ,  H05K1/11 ,  H01R12/77

CPC classification number: H01R12/78 ,  H01R12/772 ,  H01R12/88 ,  H05K1/0219 ,  H05K1/0224 ,  H05K1/028 ,  H05K1/111 ,  H05K1/118 ,  H05K2201/09236 ,  H05K2201/09445 ,  H05K2201/09681 ,  H05K2201/09709 ,  H05K2201/10189 ,  H05K2201/2009

Abstract: A printed wiring board (1) includes: a base substrate (3); a plurality of pads (15a, 17a) for electrical connection that are disposed at one surface side of the base substrate (3) and at a connection end portion (13) to be connected with another electronic component (50); wirings (9, 11) that are connected with the pads (15a, 17a); and engageable parts (28, 29) that are formed at side edge parts of the connection end portion (13) and are to be engaged with engagement parts (58) of the other electronic component (50) in the direction of disconnection. The flexible printed wiring board (1) further includes reinforcement layers (31, 32) that are disposed at the other surface side of the base substrate (3) and at a frontward side with respect to the engageable parts (28, 29) when viewed in the direction of connection with the other electronic component, and that are formed integrally with the wirings (9).

公开(公告)号：US20170212620A1

公开(公告)日：2017-07-27

申请号：US15483247

申请日：2017-04-10

Applicant: Japan Display Inc.

Inventor： Hayato Kurasawa ,  Keisuke Asada ,  Tatsuya Ide ,  Koji Ishizaki

IPC: G06F3/044 ,  H05K1/02 ,  H05K1/14 ,  G06F3/041

CPC classification number: G06F3/044 ,  G02F1/13338 ,  G06F3/0412 ,  G06F2203/04108 ,  G06F2203/04112 ,  H05K1/028 ,  H05K1/117 ,  H05K1/147 ,  H05K3/28 ,  H05K3/361 ,  H05K2201/09263 ,  H05K2201/09663 ,  H05K2201/09681 ,  H05K2201/0969 ,  H05K2201/09727 ,  H05K2201/10128

Abstract: According to one embodiment, a detection device includes a substrate, detection electrode, terminal formed of a metal material, lead, coating layer, conductive adhesion layer, and circuit board. The lead connects the electrode and the terminal. The coating layer covers the electrode and the lead, and partly covers the terminal. The adhesion layer covers a part of the terminal exposed from the coating layer and covers a part of the coating layer. The circuit board is connected to the terminal with the adhesion layer interposed therebetween. At least in an overlapping area where the adhesion layer covers the coating layer, an area of the metal material per unit area is smaller than that of the other area of the terminal.

公开(公告)号：US20170181273A1

公开(公告)日：2017-06-22

申请号：US15379778

申请日：2016-12-15

Applicant: Fujitsu Technology Solutions Intellectual Property GmbH

Inventor： Wilhelm Neukam

IPC: H05K1/02 ,  H05K1/03 ,  H05K3/20 ,  H05K7/14

CPC classification number: H05K1/0275 ,  H05K1/0284 ,  H05K1/03 ,  H05K3/20 ,  H05K5/0208 ,  H05K7/1427 ,  H05K2201/0388 ,  H05K2201/07 ,  H05K2201/09154 ,  H05K2201/09681

Abstract: An assembly includes a carrier and an electrically conductive mesh, wherein the carrier includes a side surface with an edge, the electrically conductive mesh is attached to the side surface and extends over the edge of the side surface, and the edge has a radius at least as big as a minimal bending radius of electric lines of the electrically conductive mesh.

公开(公告)号：US09656912B2

公开(公告)日：2017-05-23

申请号：US14967348

申请日：2015-12-13

Applicant: Tsinghua University ,  HON HAI PRECISION INDUSTRY CO., LTD.

Inventor： Yuan-Hao Jin ,  Qun-Qing Li ,  Shou-Shan Fan

IPC: H05K1/00 ,  C03C17/09 ,  C23C14/20 ,  C23C14/58 ,  C23C16/06 ,  C23C16/56 ,  C23C30/00 ,  C23F4/00 ,  G06F3/044 ,  G06F3/047 ,  H05K1/02 ,  H05K1/03 ,  H05K1/09

CPC classification number: B32B15/08 ,  B32B5/028 ,  B32B2307/202 ,  C03C17/09 ,  C03C2217/252 ,  C03C2217/253 ,  C03C2217/255 ,  C03C2218/15 ,  C03C2218/33 ,  C03C2218/34 ,  C23C14/20 ,  C23C14/5826 ,  C23C14/5873 ,  C23C16/06 ,  C23C16/56 ,  C23C30/00 ,  C23F4/00 ,  G06F3/044 ,  G06F3/047 ,  G06F2203/04103 ,  G06F2203/04112 ,  H01B1/026 ,  H01B1/16 ,  H05K1/0274 ,  H05K1/028 ,  H05K1/03 ,  H05K1/09 ,  H05K2201/026 ,  H05K2201/0323 ,  H05K2201/0364 ,  H05K2201/09681

Abstract: The disclosure relates to a metal nanowire film. The metal nanowire film includes a substrate and a number of first metal nanowire bundles located on the substrate. The number of first metal nanowire bundles are parallel with and spaced from each other. Each of the number of first metal nanowire bundles includes a number of first metal nanowires parallel with each other. The first distance between adjacent two of the number of first metal nanowires is less than the second distance between adjacent two of the number of first metal nanowire bundles.

公开(公告)号：US20170092635A1

公开(公告)日：2017-03-30

申请号：US15378947

申请日：2016-12-14

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Hayato MASUBUCHI ,  Naoki KIMURA ,  Manabu MATSUMOTO ,  Toyota MORIMOTO

IPC: H01L25/18 ,  H01L27/115 ,  H05K3/30 ,  H01L23/528 ,  H05K1/02 ,  H01L23/498 ,  H01L25/00

CPC classification number: H01L25/18 ,  G11C5/02 ,  H01L23/3121 ,  H01L23/3142 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5286 ,  H01L23/552 ,  H01L23/562 ,  H01L25/0655 ,  H01L25/50 ,  H01L27/115 ,  H01L2924/0002 ,  H05K1/0225 ,  H05K1/0271 ,  H05K1/0298 ,  H05K1/181 ,  H05K3/305 ,  H05K2201/09136 ,  H05K2201/09681 ,  H05K2201/10159 ,  Y02P70/613 ,  H01L2924/00

Abstract: According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.