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公开(公告)号：US20170367191A1
公开(公告)日：2017-12-21
申请号：US15691313
申请日：2017-08-30
Applicant: Avary Holding (Shenzhen) Co., Limited. , HongQiSheng Precision Electronics (QinHuangDao) Co ., Ltd. , GARUDA TECHNOLOGY CO., LTD
Inventor： WEI-SHUO SU
CPC classification number: H05K3/244 , H05K3/108 , H05K3/427 , H05K2201/0154 , H05K2201/0338 , H05K2201/09736 , H05K2201/098 , H05K2203/0723 , H05K2203/1394
Abstract: A printed circuit board includes a base layer, a first conductive pattern, and a first surface treatment patterned layer formed on a portion of a surface of the first conductive pattern. The first conductive pattern includes a first copper foil layer on one side of the base layer and a first conductive layer on a portion of a surface of the first copper foil layer. The first conductive pattern which is covered by the first surface treatment patterned layer has sidewalls obliquely tilted with respect to the base layer. The first conductive pattern covered with the first surface treatment patterned layer has a cross section that is trapezoidal shaped, and a width which gradually decreases from the base layer to the first conductive layer.
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132.发明申请公开(公告)号：US20170213636A1
公开(公告)日：2017-07-27
申请号：US15483679
申请日：2017-04-10
Applicant: General Electric Company
Inventor： Alan Carroll Lovell , Mark Eugene Shepard , Andrew David McArthur , Qin Chen , Todd David Greenleaf
CPC classification number: H01F27/2885 , H01F17/0013 , H01F27/24 , H01F27/2804 , H01F41/0206 , H01F41/043 , H01F41/32 , H01F2017/008 , H01F2027/2809 , H01F2027/2819 , H05K1/0224 , H05K1/0254 , H05K1/0256 , H05K1/144 , H05K1/165 , H05K3/46 , H05K2201/0715 , H05K2201/09672 , H05K2201/098 , Y10T29/4902 , Y10T29/49073
Abstract: A device includes a printed circuit board (PCB). The device may also include a high voltage coil disposed on the PCB and a low voltage coil disposed on the PCB. Further, a conductive shield forms a three-dimensional enclosure around the high voltage coil and confines an electric field generated by the device to the PCB.
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公开(公告)号：US20170135205A1
公开(公告)日：2017-05-11
申请号：US15410116
申请日：2017-01-19
Applicant: Murata manufacturing Co., Ltd.
Inventor： Takahiro Sumi , Takahiro Oka , Yoshitake Yamagami
CPC classification number: H05K1/0306 , H05K1/09 , H05K1/115 , H05K3/0044 , H05K3/1291 , H05K3/22 , H05K3/4038 , H05K3/4061 , H05K3/4629 , H05K3/4647 , H05K2201/0175 , H05K2201/09563 , H05K2201/098 , H05K2201/09809 , H05K2203/1126
Abstract: A ceramic wiring board that includes a ceramic insulator and a via-conductor. The ceramic insulator includes a crystalline constituent and an amorphous constituent. The via-conductor includes a metal and an oxide. The crystalline constituent and the oxide include at least one metal element in common. A tubular region having a thickness of 5 μm adjoins and surrounds the via-conductor and has a higher concentration of the metal element than the ceramic insulator.
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公开(公告)号：US20170055347A1
公开(公告)日：2017-02-23
申请号：US15241714
申请日：2016-08-19
Applicant: LG INNOTEK CO., LTD.
Inventor： Jung Ho Hwang , Han Su Lee , Dae Young Choi , Soon Gyu Kwon , Dong Hun Jeong , In Ho Jeong , Kil Dong Son , Sang Hwa Kim , Sang Young Lee , Jae Hoon Jeon , Jin Hak Lee , Yun Mi Bae
CPC classification number: H05K3/188 , H05K1/0298 , H05K1/09 , H05K3/002 , H05K3/108 , H05K3/244 , H05K2201/0347 , H05K2201/098 , H05K2203/0548 , H05K2203/0588 , H05K2203/0723 , H05K2203/1184
Abstract: Disclosed are a printed circuit board and a method of manufacturing the printed circuit board. The printed circuit board includes an insulating layer, and a circuit pattern formed on the insulating layer, wherein the circuit pattern includes a first circuit pattern formed on the insulating layer and including a corner portion of an upper portion which has a predetermined curvature and a second circuit pattern formed on the first circuit pattern and configured to cover an upper surface of the first circuit pattern including the corner portion.
Abstract translation: 公开了印刷电路板和制造印刷电路板的方法。 印刷电路板包括绝缘层和形成在绝缘层上的电路图案，其中电路图案包括形成在绝缘层上并包括具有预定曲率的上部的角部的第一电路图案， 电路图案形成在第一电路图案上并且被配置为覆盖包括拐角部分的第一电路图案的上表面。
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公开(公告)号：US09538651B2
公开(公告)日：2017-01-03
申请号：US14820978
申请日：2015-08-07
Applicant: IBIDEN CO., LTD.
Inventor： Yasushi Inagaki , Kota Noda
CPC classification number: H05K1/111 , H05K1/0271 , H05K1/0296 , H05K1/09 , H05K1/115 , H05K3/007 , H05K3/06 , H05K3/061 , H05K3/188 , H05K3/202 , H05K3/205 , H05K3/4007 , H05K3/4069 , H05K2201/0302 , H05K2201/0341 , H05K2201/0367 , H05K2201/09563 , H05K2201/098 , H05K2203/06 , Y02P70/611
Abstract: A printed wiring board includes an insulating layer, a first conductor layer embedded into a first surface of the insulating layer and including connecting portions to connect an electronic component, a second conductor layer projecting from a second surface of the insulating layer, a solder resist layer covering the first conductor layer and having an opening structure exposing the connecting portions, a barrier metal layer formed on the connecting portions such that the barrier layer is projecting from the first surface of the insulating layer, and metal posts formed on the barrier layer such that the metal posts are positioned on the connecting portions, respectively. Each metal post has width which is greater than width of a respective connecting portion, and the barrier metal layer includes a metal material which is different from a metal material forming the metal posts and a metal material forming the first conductor layer.
Abstract translation: 印刷布线板包括绝缘层，第一导体层，其嵌入绝缘层的第一表面中，并且包括用于连接电子部件的连接部分，从绝缘层的第二表面突出的第二导体层，阻焊层 覆盖第一导体层并具有露出连接部分的开口结构，形成在连接部分上的阻挡金属层，使得阻挡层从绝缘层的第一表面突出，以及形成在阻挡层上的金属柱，使得 金属柱分别位于连接部分上。 每个金属柱的宽度大于相应连接部分的宽度，并且阻挡金属层包括与形成金属柱的金属材料不同的金属材料和形成第一导体层的金属材料。
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Patent Agency Ranking
公开(公告)号：US20160254241A1
公开(公告)日：2016-09-01
申请号：US15007663
申请日：2016-01-27
Applicant: FUJITSU LIMITED
Inventor： Yoshinobu MAENO , Kinuko MISHIRO
IPC: H01L23/00 , H01L23/498
CPC classification number: H05K1/111 , H01L23/49811 , H01L2224/16238 , H01L2224/81385 , H01L2924/15311 , H01L2924/15313 , H05K3/3436 , H05K2201/098 , Y02P70/611 , Y02P70/613
Abstract: A printed circuit board includes: a substrate; a first electrode formed on the substrate; a protrusion member formed on the first electrode and extending from a central portion of the first electrode towards an outer peripheral portion of the first electrode; and a solder covering the first electrode and the protrusion member and connecting the first electrode to a second electrode of a component mounted on the substrate.
Abstract translation: 印刷电路板包括：基板; 形成在所述基板上的第一电极; 形成在所述第一电极上并从所述第一电极的中心部朝向所述第一电极的外周部延伸的突出部件; 以及覆盖所述第一电极和所述突出部件并且将所述第一电极连接到安装在所述基板上的部件的第二电极的焊料。
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公开(公告)号：US20160242285A1
公开(公告)日：2016-08-18
申请号：US15044380
申请日：2016-02-16
Applicant: IBIDEN CO., LTD.
Inventor： Takayuki Katsuno , Yuki Ito , Takeshi Furusawa , Takema Adachi
CPC classification number: H05K1/0271 , H05K3/007 , H05K3/025 , H05K3/188 , H05K3/244 , H05K2201/0338 , H05K2201/0344 , H05K2201/098 , H05K2203/1184
Abstract: A printed wiring board includes a resin insulating layer having recess portions formed on first surface, a first conductor layer formed in the recess portions and including pads positioned to mount an electronic component, conductive pillars formed on the pads, respectively, and formed to mount the electronic component onto the resin insulating layer, a second conductor layer formed on second surface of the resin insulating layer on the opposite side with respect to the first surface, and a via conductor formed in the resin insulating layer such that the via conductor is penetrating through the resin insulating layer and connecting the first and second conductor layers. The pillars is formed such that each of the pads has an exposed surface exposed from a respective one of the conductive pillars, and the pads are formed such that the exposed surface is recessed from the first surface of the resin insulating layer.
Abstract translation: 印刷电路板包括具有形成在第一表面上的凹部的树脂绝缘层，形成在凹部中的第一导体层，并且包括分别安装电子部件的焊盘，形成在焊盘上的导电柱，并形成为安装 电子部件到树脂绝缘层上，在相对于第一表面的相对侧的树脂绝缘层的第二表面上形成的第二导体层和形成在树脂绝缘层中的通孔导体，使得通孔导体穿透 树脂绝缘层并连接第一和第二导体层。 柱形成为使得每个焊盘具有从相应的一个导电柱露出的暴露表面，并且焊盘被形成为使得暴露的表面从树脂绝缘层的第一表面凹陷。
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公开(公告)号：US09357643B2
公开(公告)日：2016-05-31
申请号：US14305779
申请日：2014-06-16
Applicant: KABUSHIKI KAISHA TOSHIBA , TOSHIBA MATERIALS CO., LTD.
Inventor： Keiichi Yano , Hiromasa Kato , Kimiya Miyashita , Takayuki Naba
CPC classification number: H05K1/09 , C04B37/026 , C04B2235/96 , C04B2235/9607 , C04B2237/125 , C04B2237/126 , C04B2237/127 , C04B2237/343 , C04B2237/366 , C04B2237/368 , C04B2237/407 , C04B2237/704 , C04B2237/706 , C04B2237/708 , C04B2237/86 , C04B2237/88 , H01L23/3735 , H01L29/1608 , H01L2924/0002 , H05K1/0306 , H05K3/38 , H05K2201/098 , H05K2201/09827 , Y10T428/24488 , H01L2924/00
Abstract: A ceramic/copper circuit board of an embodiment includes a ceramic substrate and first and second copper plates bonded to surfaces of the ceramic substrate via bonding layers containing active metal elements. In cross sections of end portions of the first and second copper plates, a ratio (C/D) of an area C in relation to an area D is from 0.2 to 0.6. The area C is a cross section area of a portion protruded toward an outer side direction of the copper plate from a line AB, and the area D is a cross section area of a portion corresponding to a right-angled triangle whose hypotenuse is the line AB. R-shape sections are provided at edges of upper surfaces of the first and second copper plates, and lengths F of the R-shape sections are 100 μm or less.
Abstract translation: 实施方式的陶瓷/铜电路板包括陶瓷基板和通过包含活性金属元素的粘结层与陶瓷基板的表面接合的第一和第二铜板。 在第一和第二铜板的端部的横截面中，面积C相对于面积D的比率（C / D）为0.2至0.6。 区域C是从线AB向铜板的外侧方向突出的部分的截面积，区域D为对应于斜边三角形的部分的横截面积，斜边三角形的斜边为线 AB。 在第一铜板和第二铜板的上表面的边缘处设置有R形截面，R形截面的长度F为100μm以下。
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公开(公告)号：US09332642B2
公开(公告)日：2016-05-03
申请号：US14481188
申请日：2014-09-09
Applicant: Panasonic Corporation
Inventor： Shingo Yoshioka , Hiroaki Fujiwara , Hiromitsu Takashita , Tsuyoshi Takeda
CPC classification number: H05K1/119 , H01L2224/81385 , H05K1/0284 , H05K1/0373 , H05K1/111 , H05K3/0014 , H05K3/0032 , H05K3/0044 , H05K3/0076 , H05K3/0079 , H05K3/0085 , H05K3/107 , H05K3/185 , H05K3/4007 , H05K2201/0209 , H05K2201/0224 , H05K2201/0233 , H05K2201/0239 , H05K2201/0376 , H05K2201/0769 , H05K2201/09227 , H05K2201/09472 , H05K2201/09736 , H05K2201/09745 , H05K2201/098 , H05K2201/09972 , H05K2203/0108 , H05K2203/013 , H05K2203/0143 , H05K2203/0228 , H05K2203/0264 , H05K2203/0285 , H05K2203/0565 , H05K2203/0706 , H05K2203/0776 , H05K2203/1163 , Y02P70/611
Abstract: One aspect of the present invention relates to a circuit board including an insulating base substrate; and a circuit layer that is formed of a conductor and that is provided on the surface of the insulating base substrate, wherein the insulating base substrate has a smooth surface having a surface roughness Ra of 0.5 μm or less, and the conductor is at least partially embedded in a wiring groove formed in the surface of the insulating base substrate.
Abstract translation: 本发明的一个方面涉及一种包括绝缘基底的电路板; 以及电路层，其由导体形成，并且设置在所述绝缘基底基板的表面上，其中所述绝缘基底具有表面粗糙度Ra为0.5μm以下的平滑表面，并且所述导体至少部分地 嵌入形成在绝缘性基板的表面的布线槽。
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公开(公告)号：US20160050761A1
公开(公告)日：2016-02-18
申请号：US14535301
申请日：2014-11-06
Applicant: Tzyy-Jang Tseng , Chien-Nan Wu
Inventor： Tzyy-Jang Tseng , Chien-Nan Wu
CPC classification number: H05K3/0029 , H05K1/0209 , H05K3/045 , H05K3/28 , H05K2201/0376 , H05K2201/098 , H05K2203/025 , H05K2203/072
Abstract: A method of manufacturing a substrate structure is provided. An insulation substrate having an upper surface is provided. A portion of the upper surface of the insulation substrate is irradiated by a first laser beam so as to form a first intaglio pattern. The first laser beam is IR laser beam or fiber laser beam. The first intaglio pattern has a modification surface. A first metal layer is formed on the upper surface of the insulation substrate, and covers the upper surface of the insulation layer and the modification surface of the first intaglio pattern, and fills up the first intaglio pattern. A grinding process is performed on the first metal layer so as to expose the upper surface of the insulation substrate and define a first patterned circuit layer. A first upper surface of the first patterned circuit layer is aligned with the upper surface of the insulation substrate.
Abstract translation: 提供一种制造衬底结构的方法。 提供具有上表面的绝缘基板。 绝缘基板的上表面的一部分被第一激光束照射，以形成第一凹版图案。 第一激光束是IR激光束或光纤激光束。 第一个凹版图案具有修饰面。 第一金属层形成在绝缘基板的上表面上，并且覆盖绝缘层的上表面和第一凹版图案的修改表面，并填满第一凹版图案。 在第一金属层上进行研磨处理，以露出绝缘基板的上表面并限定第一图案化电路层。 第一图案化电路层的第一上表面与绝缘基板的上表面对准。
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