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    UHF ground interconnects
    131.
    发明申请
    UHF ground interconnects 失效
    UHF接地互连

    公开(公告)号：US20020153167A1

    公开(公告)日：2002-10-24

    申请号：US09839151

    申请日：2001-04-23

    Inventor： Peter A. Miller

    IPC: H05K001/11

    CPC classification number: H05K1/115 ,  H05K1/0219 ,  H05K1/0222 ,  H05K3/429 ,  H05K2201/09809

    Abstract: A via on a printed circuit board having a circuit has a first interconnect and a second interconnect located about at least a portion of the first interconnect. The second interconnect connects to ground of the circuit and is coaxial and substantially concentric with the first interconnect and inductively coupled with the first interconnect. A method of electrically interconnecting at a via multiple layers on a printed circuit board to provide a common ground plane for a circuit is also provided. A high speed interconnection can be attained by allowing the ground return path for a circuit carried on multiple layers of a multilayer printed circuit board to remain coupled to the signal, thereby lowering ground inductance and maintaining signal integrity, even at UHF, while minimizing costs.

    Abstract translation: 具有电路的印刷电路板上的通孔具有位于第一互连的至少一部分周围的第一互连和第二互连。 第二互连件连接到电路的地，并且与第一互连同轴并基本上同心并且与第一互连电感耦合。 还提供了一种在印刷电路板上的多层电路上电互连以提供用于电路的公共接地平面的方法。 通过允许承载在多层印刷电路板的多层上的电路的接地返回路径保持耦合到信号，从而降低接地电感并维持信号完整性，甚至在UHF下，同时最小化成本，可以实现高速互连。

    Low cost, large scale RF hybrid package for simple assembly onto mixed signal printed wiring boards
    134.
    发明授权
    Low cost, large scale RF hybrid package for simple assembly onto mixed signal printed wiring boards 失效
    低成本，大规模RF混合封装，可以简单的组装到混合信号印刷电路板上

    公开(公告)号：US06417747B1

    公开(公告)日：2002-07-09

    申请号：US09935496

    申请日：2001-08-23

    Applicant: Timothy E. Dearden ,  Jeffrey J. Stitt ,  Clifton Quan

    Inventor： Timothy E. Dearden ,  Jeffrey J. Stitt ,  Clifton Quan

    IPC: H01P100

    CPC classification number: H05K1/0243 ,  H01L23/66 ,  H01L2223/6622 ,  H01L2224/16 ,  H01L2924/01079 ,  H01L2924/15312 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K3/305 ,  H05K3/306 ,  H05K3/325 ,  H05K2201/09472 ,  H05K2201/09809 ,  H05K2201/10348 ,  H05K2201/10371 ,  H05K2201/10575 ,  H05K2201/10689 ,  H05K2203/1147

    Abstract: An RF interconnect is incorporated in RF module packages for direct attachment onto a multi-layer PWB using compressible center conductor (fuzz button) interconnects. The module has circuitry operating at microwave frequencies. The module package includes a metal housing including a metal bottom wall structure. The module includes a plurality of RF interconnects, which provide RF interconnection between the package and the PWB. Each interconnect includes a feedthrough center pin protruding through an opening formed in the metal bottom wall, with isolation provided by a dielectric feedthrough insulator. The center pin is surrounded with a ring of shield pins attached to the external surface of the bottom wall of the module housing. The pins are insertable in holes formed in the PWB, and make contact with fuzz button interconnects disposed in the holes. Circuitry connects the fuzz button interconnects to appropriate levels of the PWB for grounding and RF signal conduction.

    Abstract translation: RF互连结合在RF模块封装中，以使用可压缩中心导体（Fuzz按钮）互连直接连接到多层PWB上。 该模块具有以微波频率工作的电路。 模块封装包括金属外壳，其包括金属底壁结构。 该模块包括多个RF互连，其在封装和PWB之间提供RF互连。 每个互连件包括穿过形成在金属底壁中的开口突出的馈通中心销，由隔离绝缘子提供隔离。 中心销被围绕着一个安装在模块壳体底壁外表面的屏蔽销圈。 销可插入形成在PWB中的孔中，并与布置在孔中的绒头按钮互连接触。 电路将毛绒按钮互连连接到PWB的适当级别，用于接地和RF信号传导。

    RF electronics assembly with shielded interconnect
    135.
    发明授权
    RF electronics assembly with shielded interconnect 有权
    射频电子组件与屏蔽互连

    公开(公告)号：US06411523B1

    公开(公告)日：2002-06-25

    申请号：US09718819

    申请日：2000-11-22

    Applicant: James Hiram Roberson ,  William Kerr Veitschegger ,  Ken Wong

    Inventor： James Hiram Roberson ,  William Kerr Veitschegger ,  Ken Wong

    IPC: H05K714

    CPC classification number: H05K9/0015 ,  H05K1/0219 ,  H05K1/14 ,  H05K3/0061 ,  H05K3/3447 ,  H05K3/36 ,  H05K2201/09809 ,  H05K2201/10303

    Abstract: An electronics assembly incorporating an interconnect includes a conductive gasket disposed between a first printed circuit board and a second printed circuit board. The gasket surrounds, and thereby shields, the interconnect while providing an RF ground connection between the two boards with a controlled RF impedance. The second printed circuit board may serve as a connector board for a plurality of modules, or other printed circuit boards, to be coupled thereto. Each module is individually covered with a separate lid. Methods for manufacturing and assembling structures according to the invention are also provided.

    Abstract translation: 包括互连的电子组件包括设置在第一印刷电路板和第二印刷电路板之间的导电垫片。 垫圈围绕并由此屏蔽互连，同时在两个板之间提供受RF射频阻抗的RF接地连接。 第二印刷电路板可以用作多个模块或其它印刷电路板的连接板，以与其耦合。 每个模块单独盖上一个单独的盖子。 还提供了根据本发明的制造和组装结构的方法。

    Multilayer wiring board, semiconductor device and methods for manufacturing such multilayer wiring board and semiconductor device
    138.
    发明申请
    Multilayer wiring board, semiconductor device and methods for manufacturing such multilayer wiring board and semiconductor device 失效
    多层布线基板，半导体装置及制造这种多层布线基板及半导体装置的方法

    公开(公告)号：US20010038145A1

    公开(公告)日：2001-11-08

    申请号：US09848799

    申请日：2001-05-04

    Inventor： Naohiro Mashino

    IPC: H01L023/10 ,  H01L023/34

    CPC classification number: H01L23/49822 ,  H01L23/642 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/053 ,  H05K1/056 ,  H05K1/141 ,  H05K1/162 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/09509 ,  H05K2201/09554 ,  H05K2201/09809 ,  H05K2203/0315

    Abstract: A multilayer wiring board comprises: a metal substrate as a core, a condenser dielectric layer formed to cover the metal layer, and a condenser electrode metal layer formed to cover the condenser dielectric layer, so that a condenser is defined by the metal substrate, the condenser and the condenser electrode metal layer. The condenser dielectric layer is provided with a first contact hole to communicate with the metal substrate and the condenser electrode metal layer is provided with a second contact hole to communicate with the first contact hole, the diameter of the second contact hole being larger than that of the first contact hole. An insulating layer is formed on the condenser electrode metal layer and is provided with a via hole to communicate with the metal substrate through the second and first contact holes. A metal substrate contact metal layer formed on an inner wall of the via hole, so that the metal substrate contact metal layer comes into electrical contact with the metal substrate.

    Abstract translation: 多层布线板包括：作为芯的金属基板，形成为覆盖金属层的电容器电介质层，以及形成为覆盖电容器电介质层的电容器电极金属层，由金属基板限定冷凝器， 冷凝器和电容器电极金属层。 电容电介质层设置有与金属基板连通的第一接触孔，并且电容器电极金属层设置有与第一接触孔连通的第二接触孔，第二接触孔的直径大于 第一接触孔。 绝缘层形成在电容器电极金属层上，并且设置有通孔，以通过第二和第一接触孔与金属基板连通。 金属基板接触金属层形成在通孔的内壁上，金属基板接触金属层与金属基板电接触。

    Surface mountable coaxial solder interconnect and method
    139.
    发明授权
    Surface mountable coaxial solder interconnect and method 失效
    表面贴装同轴焊接互连及方法

    公开(公告)号：US06239385B1

    公开(公告)日：2001-05-29

    申请号：US09031864

    申请日：1998-02-27

    Applicant: Matthew K. Schwiebert ,  Ron Barnett ,  Geary L. Chew ,  Gerald J. Gleason ,  Dean B. Nicholson

    Inventor： Matthew K. Schwiebert ,  Ron Barnett ,  Geary L. Chew ,  Gerald J. Gleason ,  Dean B. Nicholson

    IPC: H01R1204

    CPC classification number: H05K1/025 ,  H01L2223/6622 ,  H01P5/085 ,  H01R24/50 ,  H05K1/0222 ,  H05K1/113 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/4644 ,  H05K2201/09618 ,  H05K2201/09809 ,  H05K2203/0113 ,  H05K2203/0338 ,  H05K2203/043 ,  Y02P70/613

    Abstract: A surface mountable coaxial solder interconnect. The invention provides a small, low-cost, passively self-aligning, high-frequency electronic interconnect adapted to mass production and method. The invention includes a substrate, a signal conductor, and an annular conductor. The substrate incorporates an annular pad and a signal pad substantially centered within the annular pad. The signal conductor includes reflowed solder and is wetted to the signal pad. Similarly, the annular conductor includes reflowed solder and is wetted to the annular pad. The invention may also provide a second substrate substantially parallel to the first substrate that includes a second annular pad and a second signal pad substantially centered within the second annular pad. In such a case, the signal conductor is also wetted to the second signal pad, and, similarly, the annular conductor is also wetted to the second annular pad. The method of the invention includes obtaining a mask and a substrate. The mask obtained defines a center cavity and an annular cavity surrounding the center cavity, and may also define an outer cavity in fluidic communication with the annular cavity. The substrate obtained includes a solder-wettable signal pad, and a solder-wettable annular pad surrounding the signal pad. The mask is then filled with solder paste and aligned with the substrate such that the center cavity of the mask is in registry with the signal pad. The solder paste is then reflowed, generating solder wetting the solder-wettable signal pad and the solder-wettable annular pad.

    Abstract translation: 可表面安装的同轴焊接互连。 本发明提供了适用于批量生产和方法的小型，低成本，被动自对准的高频电子互连。 本发明包括基板，信号导体和环形导体。 衬底包括环形垫和基本上位于环形垫内的信号垫。 信号导体包括回流焊料并被润湿到信号焊盘。 类似地，环形导体包括回流焊料并被润湿到环形垫。 本发明还可以提供基本上平行于第一基板的第二基板，该第二基板包括第二环形垫和基本上位于第二环形垫内的第二信号垫。 在这种情况下，信号导体也被润湿到第二信号焊盘，并且类似地，环形导体也被润湿到第二环形焊盘。 本发明的方法包括获得掩模和基底。 获得的掩模限定了中心空腔和围绕中心空腔的环形空腔，并且还可以限定与环形空腔流体连通的外部空腔。 获得的基板包括可焊接润湿信号焊盘和围绕信号焊盘的可焊接润湿的环形焊盘。 然后将掩模用焊膏填充并与衬底对准，使得掩模的中心腔与信号垫对准。 然后将焊膏回流，产生焊料润湿可焊接润湿的信号垫和可焊接润湿的环形垫。

    Via structure
    140.
    发明授权
    Via structure 失效
    通过结构

    公开(公告)号：US6091027A

    公开(公告)日：2000-07-18

    申请号：US994937

    申请日：1997-12-19

    Applicant: Hjalmar Hesselbom ,  Peter Bodo

    Inventor： Hjalmar Hesselbom ,  Peter Bodo

    IPC: H01L23/12 ,  H01L21/48 ,  H01L23/48 ,  H01L23/52 ,  H01L23/538 ,  H01L23/66 ,  H01L25/065 ,  H05K3/40 ,  H05K3/46 ,  H05K1/03

    CPC classification number: H01L23/5384 ,  H01L21/486 ,  H01L23/481 ,  H01L23/5389 ,  H01L23/66 ,  H01L25/0652 ,  H05K3/403 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/3011 ,  H05K2201/09645 ,  H05K2201/09809 ,  H05K2201/09827 ,  H05K3/4644

    Abstract: A via structure is obtained by etching a through-hole in a substrate on the via location and placing transmission lines on declining or sloping sidewalls of the hole. The lines continue to conductors on the other surface of the substrate through vias located in a free portion of a thin film structure at the bottom side of the substrate. The free portion is so strong and large, that several vias can be made therein for connection to a plurality of parallel lines forming e.g. a bus structure. The large free portion can be additionally supported by a thick support layer applied on top of the layers in the hole. By applying an isolated ground plane and a dielectric layer between the substrate and the transmission lines, the transmission lines on the sloping sidewalls of the via hole structure can be made impedance matched. The sloping sidewalls of the via hole can easily be obtained using a V-groove etch for a monocrystalline Si-substrate. The via structure obtained is especially well suited for data transmission buses, which do not need to reduce their transmission line density through the via structure.

    Abstract translation: 通过蚀刻通孔位置上的衬底中的通孔并将传输线放置在孔的下降或倾斜的侧壁上来获得通孔结构。 这些线通过位于衬底底部的薄膜结构的自由部分中的通孔继续导通在衬底的另一表面上。 自由部分是如此强大和大，可以在其中制造若干通孔，以连接到多条平行线， 总线结构。 大的自由部分可以另外由施加在孔中的层的顶部上的厚的支撑层支撑。 通过在衬底和传输线之间施加隔离的接地平面和电介质层，可以使通孔结构的倾斜侧壁上的传输线阻抗匹配。 通孔的倾斜侧壁可以使用用于单晶Si衬底的V沟槽蚀刻来获得。 获得的通孔结构特别适用于不需要通过通孔结构降低其传输线密度的数据传输总线。

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