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    Wiring structure of a substrate
    141.
    发明授权
    Wiring structure of a substrate 有权
    基板的接线结构

    公开(公告)号：US08089005B2

    公开(公告)日：2012-01-03

    申请号：US12077175

    申请日：2008-03-17

    Applicant: Seisei Oyamada

    Inventor： Seisei Oyamada

    IPC: H05K1/11

    CPC classification number: H05K1/0219 ,  H05K1/0224 ,  H05K1/0243 ,  H05K1/025 ,  H05K1/162 ,  H05K2201/09336

    Abstract: A wiring structure of a substrate adapted to mount a plurality of integrated circuits has a signal wire for connecting the integrated circuits to each other, first and second power supply layers faced to each other, and return path wires arranged generally in parallel to the signal wire. One of the return path wires has opposite terminal ends connected to the first power supply layer (Vcc layer). The other return path wire has opposite terminal ends connected to the second power supply layer (GND layer).

    Abstract translation: 适于安装多个集成电路的基板的布线结构具有用于将集成电路彼此连接的信号线，彼此面对的第一和第二电源层以及大致平行于信号线布置的返回路径布线 。 一个返回路径线具有连接到第一电源层（Vcc层）的相对的终端。 另一个返回路径线具有连接到第二电源层（GND层）的相对端部。

    Circuit substrate and method for fabricating inductive circuit
    142.
    发明授权
    Circuit substrate and method for fabricating inductive circuit 有权
    电路基板和制造感应电路的方法

    公开(公告)号：US08049116B2

    公开(公告)日：2011-11-01

    申请号：US12175720

    申请日：2008-07-18

    Applicant: Pao-Nan Lee ,  Chi-Tsung Chiu

    Inventor： Pao-Nan Lee ,  Chi-Tsung Chiu

    IPC: H05K1/16 ,  H01F21/00

    CPC classification number: H05K1/165 ,  H01F41/045 ,  H05K1/0237 ,  H05K1/029 ,  H05K3/28 ,  H05K2201/09254 ,  H05K2201/09336 ,  H05K2201/09727 ,  H05K2201/0989 ,  H05K2203/107 ,  H05K2203/171 ,  H05K2203/173 ,  H05K2203/175 ,  Y10T29/4902 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49156

    Abstract: A circuit substrate including a laminated layer, an embedded electronic device, at least a circuit structure, and a solder mask layer is provided. The embedded electronic device is disposed within the laminated layer. The circuit structure is disposed on a surface of the laminated layer and is connected between a reference plane and the embedded electronic device. In addition, the solder mask layer is disposed on the surface of the laminated layer and exposes a portion of the circuit structure. The circuit structure has a specific layout by which a circuit trace with an adjustable length can be formed by disconnecting or connecting the exposed portion of the circuit structure.

    Abstract translation: 提供了包括层压层，嵌入式电子器件，至少电路结构和焊料掩模层的电路基板。 嵌入式电子设备设置在层叠层内。 电路结构设置在层叠层的表面上，并且连接在参考平面和嵌入式电子设备之间。 此外，焊料掩模层设置在层压层的表面上并暴露电路结构的一部分。 电路结构具有通过断开或连接电路结构的暴露部分可以形成具有可调节长度的电路迹线的特定布局。

    Rain sensor embedded on printed circuit board
    146.
    发明授权
    Rain sensor embedded on printed circuit board 有权
    雨传感器嵌入印刷电路板上

    公开(公告)号：US07830267B2

    公开(公告)日：2010-11-09

    申请号：US12076239

    申请日：2008-03-14

    Applicant: Vijayen S. Veerasamy

    Inventor： Vijayen S. Veerasamy

    IPC: G08B21/00

    CPC classification number: B60S1/0825 ,  B32B17/10036 ,  B32B17/10174 ,  B32B17/10761 ,  B32B17/10788 ,  B60S1/0822 ,  B60S1/087 ,  G01D5/2405 ,  H05K1/0218 ,  H05K1/0219 ,  H05K1/0298 ,  H05K1/162 ,  H05K1/189 ,  H05K3/0058 ,  H05K2201/0715 ,  H05K2201/09336 ,  H05K2201/09663

    Abstract: A system and/or method for sensing the presence of moisture (e.g., rain) and/or other material(s) on a window such as a vehicle window (e.g., vehicle windshield, sunroof or backlite). In certain example embodiments, a plurality of sensing capacitors are supported by a window such as a vehicle windshield, the capacitors each having a different field and/or pattern. A sensing circuit outputs an analog signal that is based on and/or related to the capacitances of one or more of the sensing capacitors. In certain example embodiments, a flexible printed circuit board (PCB) mountable in or on a vehicle window is provided. First and second sensing circuits are formed on opposing sides of the flexible PCB, with each said sensing circuit comprising a plurality of different fractal structures. A ground plane is located between the first and second sensing circuits, with the ground plane being arranged so as to decouple the first and second capacitor arrays and to shield the first capacitor array from fields emanating from the second capacitor array and vice versa. The electronic device is configured to detect moisture on an exterior surface of the vehicle window, humidity on an interior surface of the vehicle window, and EMI.

    Abstract translation: 用于感测窗户（例如车辆窗户（例如车辆挡风玻璃，天窗或背衬））上的湿气（例如雨）和/或其他材料的存在的系统和/或方法。 在某些示例性实施例中，多个感测电容器由诸如车辆挡风玻璃的窗户支撑，每个电容器具有不同的场和/或图案。 感测电路输出基于和/或与一个或多个感测电容器的电容相关的模拟信号。 在某些示例性实施例中，提供可安装在车窗中或其上的柔性印刷电路板（PCB）。 第一和第二感测电路形成在柔性PCB的相对侧上，每个所述感测电路包括多个不同的分形结构。 接地平面位于第一感测电路和第二感测电路之间，其中接地平面布置成使第一和第二电容器阵列去耦，并且使第一电容器阵列与从第二电容器阵列发出的场屏蔽起来，反之亦然。 电子设备被配置为检测车窗外表面的湿度，车窗内表面的湿度和EMI。

    Wiring structure of a substrate
    147.
    发明申请
    Wiring structure of a substrate 有权
    基板的接线结构

    公开(公告)号：US20090229866A1

    公开(公告)日：2009-09-17

    申请号：US12077175

    申请日：2008-03-17

    Applicant: Seisei Oyamada

    Inventor： Seisei Oyamada

    IPC: H05K1/03

    CPC classification number: H05K1/0219 ,  H05K1/0224 ,  H05K1/0243 ,  H05K1/025 ,  H05K1/162 ,  H05K2201/09336

    Abstract: A wiring structure of a substrate adapted to mount a plurality of integrated circuits has a signal wire for connecting the integrated circuits to each other, first and second power supply layers faced to each other, and return path wires arranged generally in parallel to the signal wire. One of the return path wires has opposite terminal ends connected to the first power supply layer (Vcc layer). The other return path wire has opposite terminal ends connected to the second power supply layer (GND layer).

    Abstract translation: 适于安装多个集成电路的基板的布线结构具有用于将集成电路彼此连接的信号线，彼此面对的第一和第二电源层以及大致平行于信号线布置的返回路径布线 。 一个返回路径线具有连接到第一电源层（Vcc层）的相对的终端。 另一个返回路径线具有连接到第二电源层（GND层）的相对端部。

    FLEXIBLE PRINTED CIRCUIT BOARD
    149.
    发明申请
    FLEXIBLE PRINTED CIRCUIT BOARD 有权
    柔性印刷电路板

    公开(公告)号：US20090078452A1

    公开(公告)日：2009-03-26

    申请号：US11951290

    申请日：2007-12-05

    Applicant: YU-CHANG PAI ,  SHOU-KUO HSU ,  CHIEN-HUNG LIU

    Inventor： YU-CHANG PAI ,  SHOU-KUO HSU ,  CHIEN-HUNG LIU

    IPC: H05K1/00 ,  H01P3/08

    CPC classification number: H05K1/0245 ,  H05K1/0393 ,  H05K2201/09236 ,  H05K2201/09318 ,  H05K2201/09336 ,  H05K2201/09672

    Abstract: An exemplary FPCB includes a differential pair consisting of a first transmission line and a second transmission line, a signal layer with the first transmission line arranged therein, a ground layer having a void which includes the area beneath the first transmission line, and a dielectric layer lying between the signal layer and the ground layer. The second transmission line is arranged in the ground layer offset from the first transmission line in the horizontal direction. The FPCB can transmit high speed signals.

    Abstract translation: 示例性FPCB包括由第一传输线和第二传输线组成的差分对，其中布置有第一传输线的信号层，具有包括第一传输线下面的区域的空隙的接地层，以及介电层 位于信号层和接地层之间。 第二传输线布置在沿水平方向偏离第一传输线的接地层中。 FPCB可以传输高速信号。

    PRINTED CIRCUIT BOARD
    150.
    发明申请
    PRINTED CIRCUIT BOARD 失效
    印刷电路板

    公开(公告)号：US20090056983A1

    公开(公告)日：2009-03-05

    申请号：US11941979

    申请日：2007-11-19

    Applicant: Chien-Hung Liu ,  Shou-Kuo Hsu ,  Yu-Chang Pai

    Inventor： Chien-Hung Liu ,  Shou-Kuo Hsu ,  Yu-Chang Pai

    IPC: H05K1/02

    CPC classification number: H05K1/0245 ,  H05K1/0298 ,  H05K2201/09236 ,  H05K2201/09336 ,  H05K2201/09672 ,  Y10S439/941

    Abstract: A printed circuit board (PCB) includes first and second signal layers sandwiching a dielectric layer therebetween and a first differential pair and a second differential pair each having a positive differential trace and a negative differential trace. The positive differential traces of the two differential pairs are disposed within the first signal layer. The negative differential traces of the two differential pairs are disposed within the second signal layer. The positive differential trace of the first differential pair is defined at the left side of the positive differential trace of the second differential pair. The negative differential trace of the first differential pair is defined at the right side of the negative differential trace of the second differential pair.

    Abstract translation: 印刷电路板（PCB）包括夹在其间的电介质层的第一和第二信号层，以及分别具有正差分迹线和负差分迹线的第一差分对和第二差分对。 两个差分对的正差分迹线设置在第一信号层内。 两个差分对的负差分迹线设置在第二信号层内。 第一差分对的正差分迹线被定义在第二差分对的正差分迹线的左侧。 第一差分对的负差分迹线被限定在第二差分对的负差分迹线的右侧。

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