公开(公告)号：US20080191956A1

公开(公告)日：2008-08-14

申请号：US12109521

申请日：2008-04-25

Applicant: Kunihiro WATANABE

Inventor： Kunihiro WATANABE

IPC: H01Q1/52

CPC classification number: H01Q1/526 ,  H01L24/48 ,  H01L25/162 ,  H01L2223/6677 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/181 ,  H01L2924/19106 ,  H01L2924/3025 ,  H01Q9/0485 ,  H01Q23/00 ,  H05K1/0218 ,  H05K1/141 ,  H05K3/284 ,  H05K2201/0715 ,  H05K2201/09772 ,  H05K2201/10242 ,  H05K2203/1572 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In a high-frequency module, an antenna device is disposed on a first principal surface of a second substrate, a first principal surface of a first substrate and a second principal surface of the second substrate face each other and are connected to each other by conductive connecting members, electronic components including an IC chip are mounted on the first principal surface of the first substrate, ground electrodes are disposed on the first and second substrates, the conductive connecting members are connected to a ground potential, and thus the IC chip is surrounded by the ground electrodes of the first and second substrates and the conductive connecting members.

Abstract translation: 在高频模块中，天线装置设置在第二基板的第一主表面上，第一基板的第一主表面和第二基板的第二主表面彼此面对并且通过导电 连接构件，包括IC芯片的电子部件安装在第一基板的第一主表面上，接地电极设置在第一和第二基板上，导电连接构件连接到接地电位，因此IC芯片被包围 通过第一和第二基板的接地电极和导电连接构件。

公开(公告)号：US07379307B2

公开(公告)日：2008-05-27

申请号：US11466843

申请日：2006-08-24

Applicant: Hiroyuki Imamura ,  Nozomi Shimoishizaka

Inventor： Hiroyuki Imamura ,  Nozomi Shimoishizaka

IPC: H05K7/00

CPC classification number: H01L23/49838 ,  H01L23/49816 ,  H01L2924/0002 ,  H05K1/0271 ,  H05K1/0393 ,  H05K1/111 ,  H05K3/005 ,  H05K3/242 ,  H05K2201/09254 ,  H05K2201/09281 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/10674 ,  H05K2203/175 ,  Y02P70/611 ,  H01L2924/00

Abstract: A wiring board includes: an insulating base; a plurality of conductive wirings; and bumps formed on the conductive wirings, respectively. The conductive wirings can be connected with electrode pads of a semiconductor element via the bumps. The conductive wirings include a connection terminal portion at an end portion opposite to the other end portion where the bumps are formed, and at the connection terminal portion, the conductive wirings can be connected with an external component. The conductive wirings include first conductive wirings and second conductive wirings, on which the bumps are formed respectively at a semiconductor element mounting region. The first conductive wirings extend from the bumps to the connection terminal portion. The second conductive wirings extend beyond the semiconductor element mounting region from the bumps but do not reach the connection terminal portion. End portions of the second conductive wirings extending beyond the semiconductor element mounting region are separated electrically from the first conductive wirings by a cutting portion formed at a boundary region with the first conductive wirings. Irrespective of the state of operating electrode pads of a semiconductor element to be mounted, the bumps can be arranged at constant intervals.

Abstract translation: 布线板包括：绝缘基底; 多个导电布线; 和形成在导电配线上的凸块。 导电布线可以通过凸块与半导体元件的电极焊盘连接。 导电布线包括在与形成凸块的另一端部相对的端部处的连接端子部分，并且在连接端子部分处，导电布线可以与外部部件连接。 导电布线包括第一导电布线和第二导电布线，凸块分别形成在半导体元件安装区域上。 第一导电布线从凸块延伸到连接端子部分。 第二导电布线从凸块延伸超出半导体元件安装区域，但不到达连接端子部分。 延伸超过半导体元件安装区域的第二导电配线的端部通过与第一导电布线形成在边界区域处的切割部分与第一导电布线电隔离。 不管要安装的半导体元件的操作电极焊盘的状态如何，可以以恒定的间隔布置凸点。

公开(公告)号：US07339262B2

公开(公告)日：2008-03-04

申请号：US10900211

申请日：2004-07-28

Applicant: Dae-Woo Son ,  Sa-Yoon Kang ,  Kwan-Jai Lee

Inventor： Dae-Woo Son ,  Sa-Yoon Kang ,  Kwan-Jai Lee

IPC: H01L23/495

CPC classification number: H01L23/552 ,  H01L23/4985 ,  H01L23/50 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K1/0393 ,  H05K2201/09772 ,  H05K2201/10681 ,  Y10T29/49121 ,  H01L2224/05599

Abstract: A tape circuit substrate and semiconductor apparatus employing the same, and a method for forming a tape circuit substrate may reduce or eliminate electromagnetic interference (EMI) and provide a substrate or apparatus which can supply a more stable power supply voltage. The tape circuit substrate may include an insulation film and a wiring pattern formed on the insulation film to define an electronic device-mounting region and including a ground electrode. The tape circuit substrate may include a ground electrode pattern formed at the electronic device-mounting region so as to be insulated from the wiring pattern, except where the ground electrode pattern is connected to the ground electrode.

Abstract translation: 带状电路基板和使用该电路基板的半导体装置以及形成带状电路基板的方法可以减少或消除电磁干扰（EMI），并提供能够提供更稳定的电源电压的基板或装置。 带状电路基板可以包括形成在绝缘膜上的绝缘膜和布线图案，以限定电子器件安装区域并且包括接地电极。 磁带电路基板可以包括形成在电子器件安装区域处的接地电极图案，以便除了接地电极图案连接到接地电极之外与布线图案绝缘。

公开(公告)号：US07265445B2

公开(公告)日：2007-09-04

申请号：US11088110

申请日：2005-03-23

Applicant: Dolly Wu ,  Charles Parkhurst

Inventor： Dolly Wu ,  Charles Parkhurst

IPC: H01L23/34

CPC classification number: H05K3/341 ,  H01L23/36 ,  H01L23/50 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K1/181 ,  H05K2201/09663 ,  H05K2201/09772 ,  H05K2201/10522 ,  H05K2201/10689 ,  H05K2201/10969 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00

Abstract: An IC package includes a package body of non-conductive material. A conductive heat-sink pad includes an interior pad portion located within an interior of the package body. An exterior pad portion is located external to the package body. The exterior pad portion includes at least two pad pieces that are spaced apart to define at least one channel that separates the at least two pad pieces, the at least two pad pieces being electrically connected with each other. The at least two pad pieces may be flush with an underside surface of the package body or one or more of the pad pieces may extend outwardly from the package body.

Abstract translation: IC封装包括非导电材料的封装体。 导电散热垫包括位于封装主体内部的内部焊盘部分。 外部衬垫部分位于包装体的外部。 外部衬垫部分包括至少两个衬垫片，其间隔开以限定分开至少两个垫片的至少一个通道，所述至少两个垫片彼此电连接。 至少两个垫块可以与包装体的下侧表面齐平，或者一个或多个垫片可以从包装体向外延伸。

公开(公告)号：US07245024B2

公开(公告)日：2007-07-17

申请号：US11040726

申请日：2005-01-21

Applicant: Frederick F. Kuhlman ,  Brentt C. Duff ,  Michael J. Pepples ,  Raymond B. Anton ,  Daniel R. Harshbarger

Inventor： Frederick F. Kuhlman ,  Brentt C. Duff ,  Michael J. Pepples ,  Raymond B. Anton ,  Daniel R. Harshbarger

IPC: H01L23/52 ,  H01L23/48 ,  H01L29/40 ,  H01L23/34

CPC classification number: H05K3/3452 ,  H05K1/181 ,  H05K3/3442 ,  H05K3/3489 ,  H05K2201/09772 ,  H05K2201/09909 ,  H05K2201/10022 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

Abstract: An electronic assembly includes a substrate and at least one surface mounted electronic component. The substrate includes a first side and a second side opposite the first side. The first side of the substrate includes a plurality of conductive traces formed thereon. The plurality of conductive traces includes a first conductive trace and a second conductive trace. The electronic component is electrically coupled between the first and second conductive traces. A component body of the electronic component is subject to interaction with a flux, which is utilized during electrical coupling of the electronic component to the first and second conductive traces, to form a current leakage path. The substrate is configured to prevent the formation of the current leakage path.

Abstract translation: 电子组件包括基板和至少一个表面安装的电子部件。 基板包括与第一侧相对的第一侧和第二侧。 基板的第一面包括形成在其上的多个导电迹线。 多个导电迹线包括第一导电迹线和第二导电迹线。 电子部件电耦合在第一和第二导电迹线之间。 电子部件的组件主体经受与焊剂的相互作用，焊剂在电子部件与第一和第二导电迹线的电耦合期间被利用，以形成电流泄漏路径。 衬底被配置为防止形成电流泄漏路径。

公开(公告)号：US07242087B2

公开(公告)日：2007-07-10

申请号：US11058810

申请日：2005-02-15

Applicant: Akira Nakano ,  Yoshiomi Tsuji ,  Yoshinari Higa

Inventor： Akira Nakano ,  Yoshiomi Tsuji ,  Yoshinari Higa

IPC: H01L23/12

CPC classification number: H05K1/162 ,  G11B5/40 ,  G11B5/486 ,  H01L2224/16 ,  H05K1/113 ,  H05K1/189 ,  H05K3/28 ,  H05K2201/0317 ,  H05K2201/09763 ,  H05K2201/09772 ,  H05K2201/10674

Abstract: A flexible printed circuit board includes a substrate layer composed of insulating material, a protection circuit of a thin-film capacitor element, the protection circuit including a first wiring layer on the substrate layer, a dielectric layer, and a counter electrode layer. At least a portion of each of the first wiring layer and the counter electrode layer serves as a terminal. The front surface of each of the first wiring layer and the counter electrode layer, except the terminal portion, is covered with an insulating coating.

Abstract translation: 柔性印刷电路板包括由绝缘材料构成的衬底层，薄膜电容器元件的保护电路，保护电路包括在衬底层上的第一布线层，电介质层和对电极层。 第一布线层和对电极层的至少一部分用作端子。 除了端子部分之外，第一布线层和对电极层中的每一个的前表面被绝缘涂层覆盖。

公开(公告)号：US20070002551A1

公开(公告)日：2007-01-04

申请号：US11308052

申请日：2006-03-04

Applicant: CHIH-CHAN (Clay) GER

Inventor： CHIH-CHAN (Clay) GER

IPC: H05K1/11

CPC classification number: H05K1/141 ,  H01L2224/48091 ,  H01L2224/73257 ,  H05K1/0218 ,  H05K3/3442 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/10287 ,  H05K2201/10659 ,  H01L2924/00014

Abstract: A printed circuit board (PCB) assembly includes a first PCB (100) and a second PCB (200), respectively including first conductor trace lines (102) and second conductor trace lines (108) for providing electronic connections among a plurality of electronic components. The first PCB is disposed above the second PCB, and is parallel with the second PCB. The first PCB is electronically connected to the second PCB via at least one of the first conductor trace lines and the second conductor trace lines. A surface area of the first PCB is smaller than that of the second PCB. The second PCB is used as a primary circuit board for a layout of electronic components. Preferably, complex or high voltage circuits are disposed on the first PCB, and other circuits are disposed on the second PCB.

Abstract translation: 印刷电路板（PCB）组件包括第一PCB（100）和第二PCB（200），第一PCB（100）和第二PCB（200）分别包括第一导体迹线（102）和第二导体迹线（108），用于在多个电子部件 。 第一PCB设置在第二PCB上方，并与第二PCB平行。 第一PCB通过第一导体迹线和第二导体迹线中的至少一个电连接到第二PCB。 第一PCB的表面积小于第二PCB的表面积。 第二个PCB用作电子元件布局的主要电路板。 优选地，复合或高压电路设置在第一PCB上，并且其它电路设置在第二PCB上。

公开(公告)号：US20060214285A1

公开(公告)日：2006-09-28

申请号：US11088110

申请日：2005-03-23

Applicant: Dolly Wu ,  Charles Parkhurst

Inventor： Dolly Wu ,  Charles Parkhurst

IPC: H01L23/34

CPC classification number: H05K3/341 ,  H01L23/36 ,  H01L23/50 ,  H01L2924/0002 ,  H05K1/0203 ,  H05K1/181 ,  H05K2201/09663 ,  H05K2201/09772 ,  H05K2201/10522 ,  H05K2201/10689 ,  H05K2201/10969 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/00

Abstract: An IC package includes a package body of non-conductive material. A conductive heat-sink pad includes an interior pad portion located within an interior of the package body. An exterior pad portion is located external to the package body. The exterior pad portion includes at least two pad pieces that are spaced apart to define at least one channel that separates the at least two pad pieces, the at least two pad pieces being electrically connected with each other. The at least two pad pieces may be flush with an underside surface of the package body or one or more of the pad pieces may extend outwardly from the package body.

Abstract translation: IC封装包括非导电材料的封装体。 导电散热垫包括位于封装主体内部的内部焊盘部分。 外部衬垫部分位于包装体的外部。 外部衬垫部分包括至少两个衬垫片，其间隔开以限定分开至少两个垫片的至少一个通道，所述至少两个垫片彼此电连接。 至少两个垫块可以与包装体的下侧表面齐平，或者一个或多个垫片可以从包装体向外延伸。

公开(公告)号：US20060146495A1

公开(公告)日：2006-07-06

申请号：US11369840

申请日：2006-03-08

Applicant: Atsuko Tanaka ,  Masuo Ohnishi

Inventor： Atsuko Tanaka ,  Masuo Ohnishi

IPC: H05K7/20

CPC classification number: H05K1/0272 ,  G06F1/203 ,  H01L2924/0002 ,  H05K1/0209 ,  H05K2201/064 ,  H05K2201/09072 ,  H05K2201/09772 ,  H05K2201/09781 ,  H01L2924/00

Abstract: A fan housing of a fan unit includes a housing wall standing from the surface of a printed circuit board. The printed circuit board serves to establish the fan housing in cooperation with the housing wall. The fan housing further includes a ceiling wall connected to the housing wall. The ceiling wall extends along a datum plane parallel to the surface of the printed circuit board. A high speed airflow can be generated within the fan housing. The airflow promotes the heat radiation from the printed circuit board. An electrically conductive wiring pattern extending over the surface of the printed circuit board may further promote the heat radiation from the printed circuit board.

公开(公告)号：US07016198B2

公开(公告)日：2006-03-21

申请号：US10408951

申请日：2003-04-08

Applicant: John Thomas Fessler ,  Keith Bryan Hardin ,  Eric Wayne Westerfield

Inventor： John Thomas Fessler ,  Keith Bryan Hardin ,  Eric Wayne Westerfield

IPC: H05K7/06 ,  H05K9/00

CPC classification number: H05K1/0218 ,  H05K1/0231 ,  H05K1/0298 ,  H05K2201/0715 ,  H05K2201/09345 ,  H05K2201/09618 ,  H05K2201/09772 ,  H05K2201/10689

Abstract: A multi-layer printed circuit board (PCB) routes signal traces on internal signal layer(s) and includes power planes on the two outermost layers. The outer layers are maintained at the same non-ground voltage level, and are electrically connected by a series of vias that circumscribe signal traces on the internal layer(s). With a preferred maximum spacing of one-tenth the wavelength of electromagnetic energy generated by the signal traces, the vias, together with the outer power planes, contain electromagnetic energy within the PCB. One or more of the outer planes may include a second power plane area maintained at a different voltage. The two power plane areas are connected by decoupling capacitors, located proximate underlying signal traces that traverse the two power plane areas.

Abstract translation: 多层印刷电路板（PCB）在内部信号层上传送信号迹线，并且包括两个最外层的电源层。 外层保持在相同的非接地电压电平，并且通过一系列通孔来电连接，这些通孔围绕内层上的信号迹线。 通过由信号迹线产生的电磁能量波长的十分之一的优选最大间距，通孔与外部电源平面在PCB内包含电磁能。 一个或多个外平面可以包括维持在不同电压的第二电源平面区域。 两个电力平面区域通过去耦电容器连接，位于邻近穿过两个电源平面区域的底层信号迹线。