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161.发明授权公开(公告)号：US09546764B2
公开(公告)日：2017-01-17
申请号：US14809195
申请日：2015-07-25
Applicant: GrafTech International Holdings Inc.
IPC: F21V29/70 , F21K99/00 , F21V29/83 , H05K1/03 , F21V29/85 , H05B33/06 , H05B33/12 , H05K1/05 , H05K3/44 , H05K7/20 , H05K1/09 , H05K1/02 , H05K3/24
CPC classification number: F21K9/20 , F21V29/70 , F21V29/83 , F21V29/85 , H05B33/06 , H05B33/12 , H05K1/0203 , H05K1/0207 , H05K1/0209 , H05K1/032 , H05K1/036 , H05K1/0393 , H05K1/056 , H05K1/092 , H05K3/245 , H05K3/44 , H05K7/20127 , H05K7/20963 , H05K2201/0195 , H05K2201/0323 , H05K2201/0326 , H05K2201/0338 , H05K2201/10106 , H05K2201/10128 , H05K2201/10166 , H05K2201/1056 , H05K2201/10628
Abstract: A display device is provided. The display device includes a light engine having light emitting components mounted to a flexible circuit board having a flexible graphite substrate. The flexible circuit board includes a dielectric layer formed on the surface of the flexible graphite substrate and an electrically conductive layer formed on the surface of the dielectric. The high in-plane thermal conductivity graphite substrate provides enhanced heat transfer capability to effectively move of heat away from the light emitting components for improved cooling of the heat generated by the light emitting component and surrounding devices.
Abstract translation: 提供显示装置。 显示装置包括具有安装到具有柔性石墨基板的柔性电路板的发光部件的光引擎。 柔性电路板包括形成在柔性石墨基板的表面上的电介质层和形成在电介质表面上的导电层。 高的平面内导热石墨衬底提供增强的传热能力以有效地将热量从发光部件移开，以改善由发光部件和周围器件产生的热量的冷却。
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162.发明授权Flexible circuit board with graphite substrate and circuit arrangements using same 有权带石墨基板的柔性电路板和使用相同的电路布置公开(公告)号：US09546763B2
公开(公告)日：2017-01-17
申请号：US14809193
申请日：2015-07-25
Applicant: GrafTech International Holdings Inc.
IPC: H05K1/00 , F21K99/00 , F21V29/83 , H05K1/03 , F21V29/70 , F21V29/85 , H05B33/06 , H05B33/12 , H05K1/05 , H05K3/44 , H05K7/20 , H05K1/09 , H05K1/02 , H05K3/24
CPC classification number: F21K9/20 , F21V29/70 , F21V29/83 , F21V29/85 , H05B33/06 , H05B33/12 , H05K1/0203 , H05K1/0207 , H05K1/0209 , H05K1/032 , H05K1/036 , H05K1/0393 , H05K1/056 , H05K1/092 , H05K3/245 , H05K3/44 , H05K7/20127 , H05K7/20963 , H05K2201/0195 , H05K2201/0323 , H05K2201/0326 , H05K2201/0338 , H05K2201/10106 , H05K2201/10128 , H05K2201/10166 , H05K2201/1056 , H05K2201/10628
Abstract: A flexible circuit board having a flexible graphite substrate is provided. The flexible circuit board includes a dielectric layer formed on the surface of the flexible graphite substrate and an electrically conductive layer formed on the surface of the dielectric. Electronic components are mounted to the flexible circuit board to form a circuit arrangement. A thermally conductive conduit can be disposed in thermal and physical contact with a surface of the electronic component and the surface of the flexible graphite substrate to. The high in-plane thermal conductivity graphite substrate provides enhanced heat transfer capability to effectively move of heat away from the electronic components for improved cooling of the heat generating electronic component and surrounding devices.
Abstract translation: 提供了具有柔性石墨基板的柔性电路板。 柔性电路板包括形成在柔性石墨基板的表面上的电介质层和形成在电介质表面上的导电层。 电子部件安装到柔性电路板上以形成电路装置。 导热导管可以与电子部件的表面和柔性石墨基板的表面热物理接触地布置。 高平面导热石墨基板提供增强的传热能力，以有效地将热量从电子部件移开，以改善发热电子部件和周围装置的冷却。
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公开(公告)号：US20170013713A1
公开(公告)日：2017-01-12
申请号：US15274363
申请日：2016-09-23
Applicant: LAWRENCE LIVERMORE NATIONAL SECURITY, LLC
Inventor： Kedar G. Shah , Satinderpall S. Pannu , Vanessa Tolosa , Angela C. Tooker , Heeral J. Sheth , Sarah H. Felix , Terri L. Delima
CPC classification number: H05K1/11 , A61N1/05 , A61N1/0553 , H05K1/09 , H05K1/097 , H05K3/007 , H05K3/12 , H05K3/20 , H05K3/28 , H05K3/4007 , H05K2201/0338 , H05K2201/099 , Y10T29/49147
Abstract: Thicker electrodes are provided on microelectronic device using thermo-compression bonding. A thin-film electrical conducting layer forms electrical conduits and bulk depositing provides an electrode layer on the thin-film electrical conducting layer. An insulating polymer layer encapsulates the electrically thin-film electrical conducting layer and the electrode layer. Some of the insulating layer is removed to expose the electrode layer.
Abstract translation: 使用热压结合在微电子器件上提供较厚的电极。 薄膜导电层形成电导管，并且本体沉积在薄膜导电层上提供电极层。 绝缘聚合物层封装电薄膜导电层和电极层。 除去绝缘层中的一些以露出电极层。
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公开(公告)号：US20170013710A1
公开(公告)日：2017-01-12
申请号：US14849614
申请日：2015-09-10
Applicant: Subtron Technology Co., Ltd.
Inventor： Chin-Sheng Wang , Ching-Sheng Chen , Mei-Chin Chang , Ching-Ta Chen
CPC classification number: H05K1/09 , H05K1/111 , H05K3/181 , H05K3/188 , H05K3/244 , H05K2201/0338 , H05K2201/0344 , H05K2201/09472 , H05K2201/099 , H05K2203/072
Abstract: A circuit board includes a substrate, a patterned copper layer, a phosphorous-containing electroless plating palladium layer, an electroless plating palladium layer and an immersion plating gold layer. The patterned copper layer is disposed on the substrate. The phosphorous-containing electroless plating palladium layer is disposed on the patterned copper layer, wherein in the phosphorous-containing electroless plating palladium layer, a weight percentage of phosphorous is in a range from 4% to 6%, and a weight percentage of palladium is in a range from 94% to 96%. The electroless plating palladium layer is disposed on the phosphorous-containing electroless plating palladium layer, wherein in the electroless plating palladium layer, a weight percentage of palladium is 99% or more. The immersion plating gold layer is disposed on the electroless plating palladium layer.
Abstract translation: 电路板包括基板，图案化铜层，含磷化学镀钯层，无电镀钯层和浸镀金层。 图案化铜层设置在基板上。 含磷化学镀钯层设置在图案化的铜层上，其中，在含磷化学镀钯层中，磷的重量百分比为4〜6％，钯的重量百分比为 在94％至96％的范围内。 无电镀钯层配置在含磷化学镀钯层上，其中，在化学镀钯层中，钯的重量百分比为99％以上。 浸镀金层设置在化学镀钯层上。
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165.发明授权公开(公告)号：US09543128B2
公开(公告)日：2017-01-10
申请号：US14090203
申请日：2013-11-26
Applicant: MITSUBISHI MATERIALS CORPORATION
Inventor： Satoru Mori , Souhei Nonaka
CPC classification number: H01J37/3426 , H05K1/09 , H05K3/022 , H05K3/06 , H05K2201/0317 , H05K2201/0338 , Y10T428/1291
Abstract: A sputtering target for forming protective film according to the invention is used to form protective film on one surface or both surfaces of a Cu wiring film, and includes 8.0 to 11.0% by mass of Al, 3.0 to 5.0% by mass of Fe, 0.5 to 2.0% by mass of Ni and 0.5 to 2.0% by mass of Mn with a remainder of Cu and inevitable impurities. In addition, a laminated wiring film includes a Cu wiring film and protective film formed on one surface or both surfaces of the Cu wiring film, and the protective film is formed by using the above sputtering target.
Abstract translation: 根据本发明的用于形成保护膜的溅射靶用于在Cu布线膜的一个表面或两个表面上形成保护膜，并且包括8.0至11.0质量％的Al，3.0至5.0质量％的Fe，0.5 至2.0质量％的Ni和0.5〜2.0质量％的Mn，余量为Cu和不可避免的杂质。 此外，层叠布线膜包括Cu布线膜和形成在Cu布线膜的一个表面或两个表面上的保护膜，并且通过使用上述溅射靶形成保护膜。
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Patent Agency Ranking
公开(公告)号：US09538657B2
公开(公告)日：2017-01-03
申请号：US13538570
申请日：2012-06-29
Applicant: Radislav Alexandrovich Potyrailo , Cheryl Margaret Surman , Steven Yuehin Go , Yongjae Lee
Inventor： Radislav Alexandrovich Potyrailo , Cheryl Margaret Surman , Steven Yuehin Go , Yongjae Lee
IPC: H04Q5/22 , G08B13/14 , H05K1/16 , G01N27/02 , G01N27/327 , G01N33/487
CPC classification number: H05K1/16 , G01N27/026 , G01N27/3278 , G01N33/0031 , G01N33/48792 , H05K2201/0338 , H05K2201/09263 , H05K2201/10151 , Y10T29/4913
Abstract: A sensing system includes an inductor-capacitor-resistor (LCR) resonator sensor having a substrate, a plurality of first sensing elements mutually spaced apart and disposed on the substrate, and a sensing material film being disposed on a first sensing region of the corresponding first sensing element.
Abstract translation: 感测系统包括具有衬底的电感器 - 电容 - 电阻（LCR）谐振器传感器，多个相互间隔开并设置在衬底上的第一感测元件，感测材料膜设置在相应的第一感测区域的第一感测区域上 传感元件。
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公开(公告)号：US20160353582A1
公开(公告)日：2016-12-01
申请号：US14848517
申请日：2015-09-09
Applicant: FuKui Precision Component (Shenzhen) Co., Ltd. , HongQiSheng Precision Electronics (QinHuangDao) Co.,Ltd. , Zhen Ding Technology Co., Ltd.
Inventor： WEI-SHUO SU
CPC classification number: H05K3/244 , H05K3/108 , H05K3/427 , H05K2201/0154 , H05K2201/0338 , H05K2201/09736 , H05K2201/098 , H05K2203/0723 , H05K2203/1394
Abstract: The present disclosure relates to a method for manufacturing a printed circuit board. The method includes the steps as follows. First, a substrate including a base layer and a copper foil layer on a surface of the base layer is provided. Second, a conductive layer is formed on portions of the copper foil layer. Third, portions of the copper foil layer exposed from the conductive layer are removed by an etching process, and the conductive layer is thinner by the etching process. The reserved portions of the copper foil layer and the conductive layer forms a conductive pattern to obtain a printed circuit board without plating wires. A printed circuit board without plating wires made by the above method is also provided.
Abstract translation: 本公开涉及印刷电路板的制造方法。 该方法包括以下步骤。 首先，提供在基底层的表面上具有基底层和铜箔层的基板。 其次，在铜箔层的部分上形成导电层。 第三，通过蚀刻工艺去除从导电层露出的铜箔层的部分，并且通过蚀刻工艺使导电层更薄。 铜箔层和导电层的保留部分形成导电图案以获得没有电镀线的印刷电路板。 还提供了一种不用上述方法制成的电镀线的印刷电路板。
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公开(公告)号：US09510446B2
公开(公告)日：2016-11-29
申请号：US14506170
申请日：2014-10-03
Applicant: Tyco Electronics AMP Korea Ltd.
Inventor： Yang Yun Choi , Maeng Goun Youn
IPC: H05K1/09 , H05K1/02 , H05K3/42 , H05K1/11 , H05K3/10 , H05K3/46 , H05K3/02 , H05K3/24 , H05K3/06 , H05K3/38
CPC classification number: H05K1/09 , H05K1/0207 , H05K1/0209 , H05K3/022 , H05K3/06 , H05K3/244 , H05K3/383 , H05K3/427 , H05K2201/0323 , H05K2201/0338 , H05K2201/0355 , H05K2203/0723 , H05K2203/073 , H05K2203/1394 , Y10T29/302
Abstract: A printed circuit board is disclosed having a substrate with an insulating layer, aluminum foil layers disposed on both sides of the insulating layer, and a through-hole formed in the insulating layer and aluminum foil layers. A metal layer is disposed over an exposed surface of the insulating layer positioned along an inner surface of the through-hole. A zinc film is positioned on a surface of the aluminum foil. A metal film is disposed over the zinc film. A plating film is disposed on a surface of the metal film. A circuit pattern is etched through the aluminum foil and the plating film.
Abstract translation: 公开了一种印刷电路板，其具有具有绝缘层的基板，设置在绝缘层两侧的铝箔层，以及形成在绝缘层和铝箔层中的通孔。 金属层设置在沿着通孔的内表面定位的绝缘层的暴露表面上。 锌膜位于铝箔的表面上。 金属膜设置在锌膜上。 电镀膜设置在金属膜的表面上。 通过铝箔和镀膜蚀刻电路图案。
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公开(公告)号：US20160309583A1
公开(公告)日：2016-10-20
申请号：US15187827
申请日：2016-06-21
Applicant: 3M INNOVATIVE PROPERTIES COMPANY
Inventor： Manoj Nirmal , Stephen P. Maki , Jason C. Radel , Robert L. Brott , Donald J. McClure , Clark I. Bright
IPC: H05K1/02 , H05K1/03 , H05K1/09 , H05K1/11 , G02F1/1335 , G02F1/1343
CPC classification number: H05K1/0274 , G02F1/133502 , G02F1/133512 , G02F1/13439 , G02F1/13718 , G02F2001/133521 , G02F2203/34 , H05K1/032 , H05K1/053 , H05K1/056 , H05K1/09 , H05K1/115 , H05K2201/0108 , H05K2201/0338 , H05K2201/10136
Abstract: A conducting film or device electrode includes a substrate and two transparent or semitransparent conductive layers separated by a transparent or semitransparent intervening layer. The intervening layer includes electrically conductive pathways between the first and second conductive layers to help reduce interfacial reflections occurring between particular layers in devices incorporating the conducting film or electrode.
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公开(公告)号：US09468091B2
公开(公告)日：2016-10-11
申请号：US13960897
申请日：2013-08-07
Applicant: Chien-Cheng Wei , Wu-Hui Cheng
Inventor： Chien-Cheng Wei , Wu-Hui Cheng
CPC classification number: H05K1/0271 , H05K1/0265 , H05K1/0306 , H05K3/06 , H05K3/108 , H05K3/146 , H05K3/16 , H05K3/388 , H05K2201/0338 , H05K2201/09845 , H05K2203/058 , H05K2203/1476 , H05K2203/1572
Abstract: A stress-reduced circuit board includes an insulating substrate, and first and second electrically conductive layers which are stacked one upon the other, and which respectively have peripheral marginal regions that are configured in a stepped arrangement. The first electrically conductive layer is configured to have an area dimension larger than that of the second electrically conductive layer and a thickness not greater than that of the second electrically conductive layer so as to minimize stress caused by a difference in coefficients of thermal expansion between the insulating substrate and the first and second electrically conductive layers.
Abstract translation: 应力降低电路板包括绝缘基板以及彼此堆叠的第一和第二导电层，并且分别具有以阶梯式布置的周边边缘区域。 第一导电层被配置为具有比第二导电层的面积尺寸更大的面积尺寸，并且其厚度不大于第二导电层的厚度，以便使由于第二导电层之间的热膨胀系数的差异而引起的应力最小化 绝缘基板和第一和第二导电层。
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