公开(公告)号：US5837427A

公开(公告)日：1998-11-17

申请号：US693655

申请日：1996-08-09

Applicant: Se Meyung Hwang ,  Keon Yang Park ,  Young Hwan Shin

Inventor： Se Meyung Hwang ,  Keon Yang Park ,  Young Hwan Shin

IPC: H05K3/46 ,  H01L21/48 ,  H05K1/11 ,  H05K3/00 ,  G03C5/00 ,  B05D5/12

CPC classification number: H01L21/4857 ,  H05K1/115 ,  H05K3/0023 ,  H05K2201/0195 ,  H05K2201/09509 ,  H05K2201/09827 ,  H05K2201/09845 ,  H05K3/4644

Abstract: A method for manufacturing a build-up multi-layer printed circuit board is disclosed which is used in the mother board of a computer, camera-incorporated VTRs, MCMs (multi chip module), CSPs (chip size package) or portable phones. In the build-up multi-layer printed circuit board of the present invention, an inner-layer connecting state is improved. The multi-layer printed circuit board is manufactured by sequentially stacking insulating resin layers and circuit conductor layers based on a build-up method. That is, a first insulating resin layer is necessarily made to undergo an exposure and a development so as to form a first via hole 122. Then a second via hole 124 which is larger than the first via hole 122 is formed on a second insulating resin layer, thereby forming a final V shaped photo via hole 120. Thus build-up multi-layer printed circuit board is manufactured.

Abstract translation: 公开了一种用于制造积层多层印刷电路板的方法，其用于计算机的母板，配有相机的VTR，MCM（多芯片模块），CSP（芯片尺寸封装）或便携式电话。 在本发明的积层多层印刷电路板中，提高了内层连接状态。 多层印刷电路板通过基于积累方法依次堆叠绝缘树脂层和电路导体层来制造。 也就是说，必须使第一绝缘树脂层经受曝光和显影以形成第一通孔122.然后在第二绝缘树脂上形成大于第一通孔122的第二通孔124 从而形成最终的V形光通孔120.由此制造多层印刷电路板。

公开(公告)号：US5783865A

公开(公告)日：1998-07-21

申请号：US602423

申请日：1996-02-16

Applicant: Yutaka Higashiguchi ,  Mitsuo Inagaki ,  Makoto Totani ,  Yasuhiro Teshima ,  Hiroshi Iimura

Inventor： Yutaka Higashiguchi ,  Mitsuo Inagaki ,  Makoto Totani ,  Yasuhiro Teshima ,  Hiroshi Iimura

IPC: H01L23/12 ,  H01L21/60 ,  H01L23/13 ,  H01L23/498 ,  H05K1/11 ,  H05K3/34 ,  H05K3/42 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/81 ,  H01L23/13 ,  H01L23/49827 ,  H01L24/97 ,  H05K1/112 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L2224/75251 ,  H01L2224/81136 ,  H01L2224/8114 ,  H01L2224/81801 ,  H01L2224/97 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/181 ,  H05K2201/09827 ,  H05K2201/09845 ,  H05K2201/10234 ,  H05K2201/10734 ,  H05K2203/0455 ,  H05K3/3431 ,  H05K3/42

Abstract: A wiring substrate has a semiconductor device mounted thereonto, the semiconductor device having ball-shaped externally connecting parts. The wiring substrate includes through holes at positions corresponding to the ball-shaped externally connecting parts and electric conductors provided inside and around the through holes. Land portions of the electric conductors, at which the electric conductors are engaged with the externally connecting parts, includes sectional tapering portions, respectively. Further, the through holes have sectional tapering portions at edge portions in proximity to the land portions, respectively. The ball-shaped externally connecting parts of the semiconductor device are engaged with the land portions provided around the through holes of the wiring substrate and having the sectional tapering portions, respectively.

Abstract translation: 布线基板具有安装在其上的半导体器件，该半导体器件具有球形的外部连接部分。 布线基板在对应于球形外部连接部分的位置和设置在通孔内部和周围的电导体之间包括通孔。 电导体与外部连接部分接合的电导体的陆部分别包括截面渐缩部分。 此外，通孔分别在接合部分的边缘部分具有截面渐缩部分。 半导体器件的球形外部连接部分分别与设置在布线基板的通孔周围的接合部分接合并具有截面锥形部分。

公开(公告)号：US5699610A

公开(公告)日：1997-12-23

申请号：US474019

申请日：1995-06-07

Applicant: Yuzo Shimada ,  Takayuki Suyama ,  Yoshimasa Tanaka ,  Shinichi Hasegawa

Inventor： Yuzo Shimada ,  Takayuki Suyama ,  Yoshimasa Tanaka ,  Shinichi Hasegawa

IPC: H01L21/48 ,  H01L23/40 ,  H01L23/495 ,  H01L23/498 ,  H05K1/02 ,  H05K3/30 ,  H05K3/34 ,  H05K3/36 ,  H05K13/34

CPC classification number: H01L21/486 ,  H01L23/4006 ,  H01L23/49572 ,  H01L23/4985 ,  H01L24/01 ,  H05K3/301 ,  H05K3/363 ,  H01L2023/4043 ,  H01L2023/4056 ,  H01L2023/4062 ,  H01L2023/4087 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15787 ,  H05K1/0201 ,  H05K2201/062 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2201/10568 ,  H05K2201/10666 ,  H05K2201/10681 ,  H05K3/3457 ,  Y10T29/49144 ,  Y10T29/49165

Abstract: In a first step, a first substrate is prepared. The first substrate has a first surface, a second surface, and a through-hole therebetween. In a second step, a second substrate is prepared. The second substrate has a first surface, a second surface, and a pad on the first surface of the second substrate. In a third step, a solder is provided on the pad of the second substrate. In a fourth step, the through-hole of the first substrate is positioned on the solder. The second surface of the first substrate and the first surface of the second substrate face each other. In a fifth step, the solder is heated to flow the solder into the through-hole of the first substrate. In the sixth step, an appearance of the solder on the first surface of the first substrate may be confirmed for detection of a connection of the solder.

Abstract translation: 在第一步骤中，制备第一衬底。 第一基板具有第一表面，第二表面和它们之间的通孔。 在第二步骤中，制备第二衬底。 第二基板在第二基板的第一表面上具有第一表面，第二表面和焊盘。 在第三步骤中，在第二基板的焊盘上设置焊料。 在第四步骤中，第一基板的通孔位于焊料上。 第一基板的第二表面和第二基板的第一表面彼此面对。 在第五步骤中，焊料被加热以使焊料流入第一衬底的通孔中。 在第六步骤中，可以确认第一基板的第一表面上的焊料的外观，以检测焊料的连接。

公开(公告)号：US5661267A

公开(公告)日：1997-08-26

申请号：US404530

申请日：1995-03-15

Applicant: Harlan R. Isaak

Inventor： Harlan R. Isaak

IPC: H01L25/065 ,  H05K1/03 ,  H05K1/11 ,  H05K3/00 ,  H05K3/40

CPC classification number: H05K3/0094 ,  H01L25/0655 ,  H05K1/113 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K2201/0959 ,  H05K2201/09827 ,  H05K2203/121 ,  H05K3/4053 ,  Y10S29/022 ,  Y10T29/49128 ,  Y10T29/49144 ,  Y10T29/49165

Abstract: An alignment board for interfacing arrays of infrared detectors to a multi-layer module concerns an insulating board having a multiplicity of conductive vias with insulating sealing plugs and enlarged metallic pads that are attached to the ends of the vias. Preferably, an insulating layer is formed on opposing sides of the board. Openings are delineated in the layer coinciding with the metallic pads, and preferably solder contacts are deposited in the openings. A multi-layer module may be attached to one side of the alignment board using reflow solder processes. Then, arrays of infrared detectors may be attached to the opposing side of the alignment board using a lower-temperature reflow soldering process. The alignment board facilitates the interfacing and assembly of the focal plane of infrared detection systems.

Abstract translation: 用于将红外检测器阵列连接到多层模块的对准板涉及具有多个导电通孔的绝缘板，绝缘板具有连接到通孔端部的绝缘密封塞和扩大的金属垫。 优选地，在所述板的相对侧上形成绝缘层。 在与金属垫重合的层中描绘开口，并且优选地在开口中沉积焊接触点。 可以使用回流焊接工艺将多层模块附接到对准板的一侧。 然后，使用低温回流焊接工艺将红外检测器阵列附接到对准板的相对侧。 对准板有助于红外检测系统的焦平面的接口和组装。

公开(公告)号：US5163220A

公开(公告)日：1992-11-17

申请号：US773814

申请日：1991-10-09

Applicant: Robert J. Zeto ,  Otto J. Gregory ,  Richard C. Piekarz

Inventor： Robert J. Zeto ,  Otto J. Gregory ,  Richard C. Piekarz

IPC: H05K1/03 ,  H05K3/00 ,  H05K3/10 ,  H05K3/14

CPC classification number: H05K3/107 ,  H05K1/0306 ,  H05K2201/0326 ,  H05K2201/0376 ,  H05K2201/09036 ,  H05K2201/09827 ,  H05K3/002 ,  H05K3/143 ,  Y10T29/49155 ,  Y10T428/12076

Abstract: A method is provided of enhancing the electrical conductivity of indium-toxide electrode stripes in thin film electroluminescent display panels by using an electronic grade glass substrate for the thin film electroluminescent display panels and by the incorporation of a narrow and thick metal bus bar of high electrical conductivity trenched into and coplanar with the surface of the glass substrate and in electrical continuity with the indium-tin-oxide electrode.

Abstract translation: 提供了一种通过使用用于薄膜电致发光显示面板的电子级玻璃基板并且通过引入窄而厚的金属汇流条来提高薄膜电致发光显示面板中的铟锡氧化物电极条的导电性的方法 高导电性沟槽与玻璃基板的表面沟槽并与之共面，与铟锡氧化物电极电连通。

公开(公告)号：US5131141A

公开(公告)日：1992-07-21

申请号：US616757

申请日：1990-11-16

Applicant: Toshiyuki Kawaguchi

Inventor： Toshiyuki Kawaguchi

IPC: H05K1/00 ,  H05K1/09 ,  H05K1/11 ,  H05K3/32 ,  H05K3/40

CPC classification number: H05K3/4069 ,  H05K3/4084 ,  H05K1/0393 ,  H05K1/095 ,  H05K1/118 ,  H05K2201/0133 ,  H05K2201/091 ,  H05K2201/09827 ,  H05K2201/09981 ,  H05K2203/0195 ,  H05K2203/0221 ,  H05K2203/1461 ,  H05K3/32 ,  Y10S428/901 ,  Y10T29/49167

Abstract: The invention provides a reliable and productive method for the preparation of a double-sided flexible circuit board having two circuit patterns on the two surfaces of a flexible base film in which the two circuit patterns are electrically connected through an opening penetrating the base film. Different from conventional methods in which the electrical connection between two circuit patterns is obtained by filling the opening with an electroconductive paste, the electrical connection in the invention is obtained by (a) forming a first circuit pattern on one surface with a conductive paste which is then brought into a semi-cured condition, (b) punching the conductive layer and the base film with a needle to make an opening whereby the conductive layer is plastically deformed and protruded on the opposite surface through the opening and (c) providing the opposite surface with the second circuit pattern by printing so that the layer of the second circuit pattern can be in contact with the protruded portion of the first conductive layer.

Abstract translation: 本发明提供了一种制备双面柔性电路板的可靠和有效的方法，该双面柔性电路板在柔性基膜的两个表面上具有两个电路图案，其中两个电路图案通过穿透基膜的开口电连接。 与通过用导电浆料填充开口获得两个电路图案之间的电连接的常规方法不同，本发明中的电连接通过（a）在一个表面上形成第一电路图案，其中导电浆料是 然后进入半固化状态，（b）用针冲压导电层和基膜以形成开口，由此导电层通过开口塑性变形并在相对表面上突出，并且（c）提供相反的 通过印刷具有第二电路图案的表面，使得第二电路图案的层可以与第一导电层的突出部分接触。

公开(公告)号：US5049244A

公开(公告)日：1991-09-17

申请号：US464412

申请日：1990-01-12

Applicant: Yoshio Yarita ,  Yoshihiro Kawamura

Inventor： Yoshio Yarita ,  Yoshihiro Kawamura

IPC: H05K1/00 ,  H05K3/10 ,  H05K3/38 ,  H05K3/40 ,  H05K3/42

CPC classification number: H05K3/4076 ,  H05K3/108 ,  H05K3/403 ,  H05K3/426 ,  H05K1/0393 ,  H05K2201/0317 ,  H05K2201/09172 ,  H05K2201/09645 ,  H05K2201/09827 ,  H05K2203/0221 ,  H05K3/388

Abstract: Disclosed is a method of manufacturing a double-sided wiring substrate wherein fine wiring patterns having a low resistivity are formed on both surfaces of a substrate. An insulating substrate having upper, lower, and side surfaces is prepared. The inner wall of a through hole formed in the insulating substrate or a side edge portion of the substrate is used as the side surface. A thin metal film is formed on the entire surface of the insulating substrate including its side surface by a deposition. The insulating film is covered with a resist film except for a wiring pattern region to be formed, and plating is performed. When the resist film is removed, the thin metal film is exposed outside the wiring patterns formed by the thick metal film. Etching is performed for a short period of time to remove a surface layer of the thick metal film and exposed region of the thin metal film.

Abstract translation: 公开了一种制造双面布线基板的方法，其中在基板的两个表面上形成具有低电阻率的精细布线图案。 制备具有上表面，下表面和侧表面的绝缘基底。 在绝缘基板上形成的通孔的内壁或基板的侧边缘部分被用作侧面。 通过沉积在包括其侧表面的绝缘基板的整个表面上形成薄金属膜。 除了要形成的布线图案区域之外，绝缘膜被抗蚀剂膜覆盖，并进行电镀。 当去除抗蚀剂膜时，薄金属膜暴露在由厚金属膜形成的布线图案的外部。 进行蚀刻短时间以去除厚金属膜的表面层和金属薄膜的暴露区域。

公开(公告)号：US4980270A

公开(公告)日：1990-12-25

申请号：US71312

申请日：1987-07-09

Applicant: Jun Inasaka

Inventor： Jun Inasaka

IPC: H05K3/46 ,  H05K3/00

CPC classification number: H05K3/0023 ,  H05K2201/0195 ,  H05K2201/09509 ,  H05K2201/09827 ,  H05K3/4644

Abstract: A printed circuit comprising a substrate, a first conductive circuit pattern thereon and an insulator on the first conductive circuit pattern. The insulator has a via hole which extends down to and is tapered toward the first conductive circuit pattern. A second conductive circuit pattern is formed on the side wall of the via hole and on a portion of the first conductive circuit pattern. The tapered via hole allows the second conductive circuit pattern to ensure excellent electrical contact with the first conductive circuit pattern.

Abstract translation: 一种印刷电路，包括衬底，其上的第一导电电路图案和第一导电电路图案上的绝缘体。 绝缘体具有朝向第一导电电路图案向下延伸并逐渐变细的通孔。 在通孔的侧壁和第一导电电路图案的一部分上形成第二导电电路图案。 锥形通孔允许第二导电电路图案确保与第一导电电路图案的良好的电接触。

公开(公告)号：US4675784A

公开(公告)日：1987-06-23

申请号：US770874

申请日：1985-08-12

Applicant: Rolf Dahlberg ,  Tomas Dahlberg

Inventor： Rolf Dahlberg ,  Tomas Dahlberg

IPC: H05K1/02 ,  H05K1/05 ,  H05K3/00 ,  H05K3/28 ,  H05K3/38 ,  H05K7/20

CPC classification number: H05K1/0203 ,  H05K3/0061 ,  H05K1/053 ,  H05K2201/09554 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10303 ,  H05K2201/10553 ,  H05K2201/10689 ,  H05K2203/0315 ,  H05K3/28 ,  H05K3/386

Abstract: A printed circuit board having a supporting base element (1) of anodized aluminum. A glue film (4) is interposed between the supporting base element and a laminate layer (7) which has circuits (6a, 6b), the glue film sealing any pores in the anodic film of the supporting base element.

Abstract translation: PCT No.PCT / SE84 / 00415 Sec。 371日期1985年8月12日 102（e）日期1985年8月12日PCT提交1984年12月5日PCT公布。 出版物WO85 / 02750 日期：1985年6月20日。一种印刷电路板，其具有阳极氧化铝的支撑基体元件（1）。 在支撑基体元件和具有电路（6a，6b）的层压层（7）之间插入胶膜（4），胶膜密封支撑基体元件的阳极膜中的任何孔。

公开(公告)号：US4628527A

公开(公告)日：1986-12-09

申请号：US548798

申请日：1983-11-04

Applicant: Hans Henneberger ,  Walter Puchta

Inventor： Hans Henneberger ,  Walter Puchta

IPC: H01M2/10 ,  H04R25/00 ,  H04R25/02 ,  H05K1/18 ,  H05G1/04

CPC classification number: H05K1/184 ,  H01M2/1044 ,  H04R25/60 ,  H04R2225/021 ,  H04R25/65 ,  H05K2201/09827 ,  H05K2201/10166 ,  H05K2201/10568 ,  H05K2201/1059

Abstract: A miniature hearing aid (1) includes a microphone (12), a receiver (14) an amplifier (15), and a battery connectable via a contact (18), all of which are contained in a housing (2,3). The amplifier is constructed of a printed circuit board (20) and a plurality of components (21). In order to save space, the components (21) are countersunk in openings (24) in the circuit board (20) to reduce the vertical dimension of the amplifier. The openings (24) are used as temporary supports and for exact positioning for the components (21) by making them rectangular with cut off edges.

Abstract translation: 微型助听器（1）包括麦克风（12），接收器（14），放大器（15）和可经由触点（18）连接的电池，所有这些都被容纳在壳体2,3中。 放大器由印刷电路板（20）和多个部件（21）构成。 为了节省空间，组件（21）沉入电路板（20）中的开口（24）中，以减小放大器的垂直尺寸。 开口（24）用作临时支撑件，并且通过使其具有切割边缘的矩形，用于部件（21）的精确定位。