公开(公告)号：US20090283894A1

公开(公告)日：2009-11-19

申请号：US12464921

申请日：2009-05-13

Applicant: Jong-joo LEE ,  Seung-duk Baek

Inventor： Jong-joo LEE ,  Seung-duk Baek

IPC: H01L23/52 ,  H05K1/14

CPC classification number: H05K1/115 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L25/0657 ,  H01L2223/6616 ,  H01L2224/05573 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/3011 ,  H05K1/0222 ,  H05K1/0251 ,  H05K1/0263 ,  H05K3/429 ,  H05K2201/09636

Abstract: A semiconductor chip package includes a signal interconnection penetrating a semiconductor chip and transmitting a signal to the semiconductor chip and a power interconnection and a ground interconnection penetrating the semiconductor and supplying power and ground to the semiconductor chip. The power interconnection and the ground interconnection are arranged to neighbor each other adjacent to the signal interconnection.

Abstract translation: 半导体芯片封装包括穿透半导体芯片并将信号传输到半导体芯片的信号互连以及穿透半导体的电源互连和接地互连，并向半导体芯片供电和接地。 电源互连和接地互连被布置成邻近信号互连相邻。

公开(公告)号：US07615709B2

公开(公告)日：2009-11-10

申请号：US11978810

申请日：2007-10-30

Applicant: Joel R. Goergen

Inventor： Joel R. Goergen

IPC: H01R12/04 ,  H05K1/11

CPC classification number: H05K3/4688 ,  H05K1/0218 ,  H05K1/024 ,  H05K1/0243 ,  H05K1/0271 ,  H05K1/116 ,  H05K3/382 ,  H05K3/429 ,  H05K3/4626 ,  H05K3/4641 ,  H05K2201/0209 ,  H05K2201/044 ,  H05K2201/0723 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09318 ,  H05K2201/09327 ,  H05K2201/09354 ,  H05K2201/09381 ,  H05K2201/09454 ,  H05K2201/09636 ,  H05K2201/09663 ,  H05K2201/09718 ,  H05K2201/09781 ,  H05K2203/061 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49162 ,  Y10T29/49163 ,  Y10T29/49165

Abstract: A circuit board comprises signaling through-holes that pass through a plurality of layers, including signal trace and digital ground plane layers, and power reference plane layers. Clearances are set to achieve a desired impedance characteristic for the through-holes. At a power reference plane layer, the clearance is defined around multiple neighboring through-holes.

Abstract translation: 电路板包括通过多个层的信令通孔，包括信号迹线和数字接地层以及功率参考平面层。 设定间隙以实现通孔所需的阻抗特性。 在功率参考平面层上，间隙围绕多个相邻的通孔限定。

公开(公告)号：US07612634B2

公开(公告)日：2009-11-03

申请号：US11723359

申请日：2007-03-19

Applicant: Masashi Iwata

Inventor： Masashi Iwata

IPC: H03H9/70

CPC classification number: H05K1/0243 ,  H03H7/463 ,  H03H9/725 ,  H03H2001/0085 ,  H04B1/0057 ,  H05K1/0298 ,  H05K1/112 ,  H05K1/181 ,  H05K2201/09627 ,  H05K2201/09636 ,  H05K2201/1003 ,  H05K2201/10083

Abstract: A high frequency module incorporates a layered substrate. The layered substrate has a bottom surface and a top surface. Terminals are disposed on the bottom surface. SAW filters and inductors are mounted on the top surface. The layered substrate incorporates: a first conductor layer connecting the SAW filters to the inductors; a second conductor layer connected to the terminals and disposed at a location closer to the bottom surface than the first conductor layer; and a plurality of parallel signal paths each of which is formed using at least one through hole provided inside the layered substrate and each of which connects the first and second conductor layers to each other.

Abstract translation: 高频模块结合了层状衬底。 层状基板具有底面和顶面。 端子设置在底面。 SAW滤波器和电感器安装在顶面上。 层状衬底包括：将SAW滤波器连接到电感器的第一导体层; 连接到端子并且设置在比第一导体层更靠近底表面的位置处的第二导体层; 以及多个并行信号路径，每个平行信号路径使用设置在分层基板内部的至少一个通孔形成，并且每个通孔将第一和第二导体层彼此连接。

公开(公告)号：US20090107716A1

公开(公告)日：2009-04-30

申请号：US11967017

申请日：2007-12-29

Applicant: YU-CHANG PAI ,  SHOU-KUO HSU ,  CHIEN-HUNG LIU

Inventor： YU-CHANG PAI ,  SHOU-KUO HSU ,  CHIEN-HUNG LIU

IPC: H05K1/11

CPC classification number: H05K1/0245 ,  H05K1/0228 ,  H05K1/0251 ,  H05K1/115 ,  H05K2201/09636 ,  H05K2201/097

Abstract: A printed circuit board (PCB) includes a differential pair having a first differential trace and a second differential trace, a first via having an upper cap and a lower cap, and a second via having an upper cap and a lower cap. The first differential trace includes a first segment and a second segment, the second differential trace includes a third segment and a fourth segment. The first and the third segments are electrically coupled to the upper caps of the first and the second vias respectively. The second and the fourth segments are electrically coupled to the lower caps of the first and the second vias respectively. The first and the third segments extend from corresponding upper caps in different directions, the second and the fourth segments extend from corresponding lower caps in different directions.

Abstract translation: 印刷电路板（PCB）包括具有第一差分迹线和第二差分迹线的差分对，具有上盖和下盖的第一通孔以及具有上盖和下盖的第二通孔。 第一差分迹线包括第一段和第二段，第二差分迹线包括第三段和第四段。 第一和第三段分别电耦合到第一和第二通孔的上盖。 第二和第四段分别电耦合到第一和第二通孔的下盖。 第一和第三段从相应的上盖在不同的方向上延伸，第二和第四段从相应的下盖在不同的方向延伸。

公开(公告)号：US20080227311A1

公开(公告)日：2008-09-18

申请号：US11717634

申请日：2007-03-14

Applicant: Jason Edward Chan ,  Jose Ricardo Paniagua

Inventor： Jason Edward Chan ,  Jose Ricardo Paniagua

IPC: H01R13/646

CPC classification number: H01R12/523 ,  H01R12/58 ,  H01R13/6461 ,  H01R13/6477 ,  H05K1/0216 ,  H05K1/0245 ,  H05K1/0298 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/09636 ,  H05K2201/09845 ,  H05K2203/0242

Abstract: An electrical signal connection, an electrical signaling system, and a method of connecting printed circuit boards. The electrical signal connection having a first conductive via and a second conductive via disposed in a first printed circuit board. A first conductive trace with a first end and a second end has the first end electrically coupled to the first conductive via at a first distance from the top surface of the first printed circuit board. The second end of the first conductive via is electrically coupled to the second printed circuit board. A second conductive trace with a first end and a second end has the first end being electrically coupled to the second conductive via at a second distance from the top surface of the first printed circuit board. The second end being is electrically coupled to the second printed circuit board.

Abstract translation: 电信号连接，电信号系统和连接印刷电路板的方法。 电信号连接具有设置在第一印刷电路板中的第一导电通孔和第二导电通孔。 具有第一端和第二端的第一导电迹线具有与第一印刷电路板的顶表面第一距离处电耦合到第一导电通孔的第一端。 第一导电通孔的第二端电耦合到第二印刷电路板。 具有第一端和第二端的第二导电迹线具有第一端部，其与第一印刷电路板的顶表面距离第二距离电耦合到第二导电通孔。 第二端电连接到第二印刷电路板。

公开(公告)号：US20080075070A1

公开(公告)日：2008-03-27

申请号：US11978810

申请日：2007-10-30

Applicant: Joel Goergen

Inventor： Joel Goergen

IPC: H04L12/50

CPC classification number: H05K3/4688 ,  H05K1/0218 ,  H05K1/024 ,  H05K1/0243 ,  H05K1/0271 ,  H05K1/116 ,  H05K3/382 ,  H05K3/429 ,  H05K3/4626 ,  H05K3/4641 ,  H05K2201/0209 ,  H05K2201/044 ,  H05K2201/0723 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09318 ,  H05K2201/09327 ,  H05K2201/09354 ,  H05K2201/09381 ,  H05K2201/09454 ,  H05K2201/09636 ,  H05K2201/09663 ,  H05K2201/09718 ,  H05K2201/09781 ,  H05K2203/061 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49162 ,  Y10T29/49163 ,  Y10T29/49165

Abstract: A circuit board comprises signaling through-holes that pass through a plurality of layers, including signal trace and digital ground plane layers, and power reference plane layers. Clearances are set to achieve a desired impedance characteristic for the through-holes. At a power reference plane layer, the clearance is defined around multiple neighboring through-holes.

Abstract translation: 电路板包括通过多个层的信令通孔，包括信号迹线和数字接地层以及功率参考平面层。 设定间隙以实现通孔所需的阻抗特性。 在功率参考平面层上，间隙围绕多个相邻的通孔限定。

公开(公告)号：US20080067665A1

公开(公告)日：2008-03-20

申请号：US11524108

申请日：2006-09-20

Applicant: Azniza Binti Abd Aziz ,  Chan Kim Lee ,  Kuen Yew Lam

Inventor： Azniza Binti Abd Aziz ,  Chan Kim Lee ,  Kuen Yew Lam

IPC: H01L23/04

CPC classification number: H01L23/49827 ,  H01L23/481 ,  H01L23/50 ,  H01L2223/6622 ,  H01L2223/6638 ,  H01L2224/131 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/09701 ,  H05K1/0222 ,  H05K2201/09636 ,  H05K2201/09809 ,  H01L2924/014 ,  H01L2224/0401

Abstract: In one embodiment, the invention may include a semiconductor package substrate with a plated-through hole (PTH) via. One or more conduits for transmitting signals can be located in the PTH via. The PTH via may shield the signals in the conduits from environmental noise (e.g., EMI). Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，本发明可以包括具有电镀通孔（PTH）通孔的半导体封装基板。 用于发送信号的一个或多个导管可以位于PTH通孔中。 PTH通道可以屏蔽导管中的信号免受环境噪声（例如EMI）的影响。 描述和要求保护其他实施例。

公开(公告)号：US20080023221A1

公开(公告)日：2008-01-31

申请号：US11565651

申请日：2006-12-01

Applicant: SHOU-KUO HSU ,  YU-CHANG PAI ,  CHENG-HONG LIU

Inventor： SHOU-KUO HSU ,  YU-CHANG PAI ,  CHENG-HONG LIU

IPC: H05K1/11 ,  H01R12/04

CPC classification number: H05K1/116 ,  H05K1/0245 ,  H05K1/0251 ,  H05K3/429 ,  H05K2201/09309 ,  H05K2201/09636 ,  H05K2201/09718

Abstract: An exemplary printed circuit board includes at least a pair of differential vias defined therein, each of the differential vias has an annular ring formed on the PCB, a conductive hole defined in the PCB, and a clearance hole defined in at least one inner layer of the PCB. Each of the clearance holes of the differential vias is oval shaped thus providing a greater area for the clearance holes and needed clearance between vias without creating a superposition zone.

Abstract translation: 示例性印刷电路板包括限定在其中的至少一对差分通孔，每个差分通孔具有形成在PCB上的环形圈，限定在PCB中的导电孔，以及限定在至少一个内层中的间隙孔 PCB。 差动通孔的每个间隙孔都是椭圆形的，从而为间隙孔提供了更大的面积，并且在通道之间需要间隙而不产生叠加区域。

公开(公告)号：US20070229189A1

公开(公告)日：2007-10-04

申请号：US11723359

申请日：2007-03-19

Applicant: Masashi Iwata

Inventor： Masashi Iwata

IPC: H03H9/72

CPC classification number: H05K1/0243 ,  H03H7/463 ,  H03H9/725 ,  H03H2001/0085 ,  H04B1/0057 ,  H05K1/0298 ,  H05K1/112 ,  H05K1/181 ,  H05K2201/09627 ,  H05K2201/09636 ,  H05K2201/1003 ,  H05K2201/10083

Abstract: A high frequency module incorporates a layered substrate. The layered substrate has a bottom surface and a top surface. Terminals are disposed on the bottom surface. SAW filters and inductors are mounted on the top surface. The layered substrate incorporates: a first conductor layer connecting the SAW filters to the inductors; a second conductor layer connected to the terminals and disposed at a location closer to the bottom surface than the first conductor layer; and a plurality of parallel signal paths each of which is formed using at least one through hole provided inside the layered substrate and each of which connects the first and second conductor layers to each other.

Abstract translation: 高频模块结合了层状衬底。 层状基板具有底面和顶面。 端子设置在底面。 SAW滤波器和电感器安装在顶面上。 层状衬底包括：将SAW滤波器连接到电感器的第一导体层; 连接到端子并且设置在比第一导体层更靠近底表面的位置处的第二导体层; 以及多个并行信号路径，每个平行信号路径使用设置在分层基板内部的至少一个通孔形成，并且每个通孔将第一和第二导体层彼此连接。

公开(公告)号：US07149092B2

公开(公告)日：2006-12-12

申请号：US10828307

申请日：2004-04-21

Applicant: Daisuke Iguchi

Inventor： Daisuke Iguchi

IPC: H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC classification number: H05K1/0251 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/12042 ,  H05K1/0222 ,  H05K1/0231 ,  H05K1/0245 ,  H05K1/115 ,  H05K1/162 ,  H05K3/3447 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/0949 ,  H05K2201/09636 ,  H05K2201/09663 ,  H05K2201/09809 ,  H05K2201/10689 ,  H05K2201/10734 ,  H01L2924/00 ,  H01L2224/0401

Abstract: In a printed circuit board of the invention, a first signal wiring layer, a first ground layer, a second ground layer and a second signal wiring layer are laminated via an insulating material. A first signal wiring is formed on the first signal wiring layer and a second signal wiring is formed on the second signal wiring layer. The two signal wirings are connected via a first through hole. The conductive first ground layer and the conductive second ground layer are connected via a second through hole. The second through hole is insulated from the first through hole and formed so as to surround the first through hole.

Abstract translation: 在本发明的印刷电路板中，通过绝缘材料层叠第一信号布线层，第一接地层，第二接地层和第二信号布线层。 第一信号布线形成在第一信号布线层上，第二信号布线形成在第二信号布线层上。 两个信号布线通过第一通孔连接。 导电第一接地层和导电第二接地层经由第二通孔连接。 第二通孔与第一通孔绝缘并形成为围绕第一通孔。