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    Electrical connector for straight-through connection and breakout testing of data communication lines
    181.
    发明授权
    Electrical connector for straight-through connection and breakout testing of data communication lines 失效
    电气连接器，用于数据通信线路的直通连接和突破测试

    公开(公告)号：US5743750A

    公开(公告)日：1998-04-28

    申请号：US699662

    申请日：1996-08-19

    Applicant: Robert W. Sullivan ,  Lee A. Watkins

    Inventor： Robert W. Sullivan ,  Lee A. Watkins

    IPC: H01R31/00 ,  H04M1/24 ,  H05K1/02

    CPC classification number: H04M1/24 ,  H01R13/6469 ,  H01R31/005 ,  H05K1/0228 ,  H01R24/64 ,  H05K2201/09236 ,  H05K2201/09245 ,  H05K2201/10189 ,  Y10S439/912 ,  Y10S439/941

    Abstract: An electrical connector utilizing a circuit board assembly for providing straight-through electrical interconnection of data line pairs between two jacks, and for providing breakout terminals. The layout of the electrical connector is such that common mode rejection is improved and cross-talk between data line pairs is minimized. The electrical connector has a circuit board with conductors located on both the bottom and top surfaces of the circuit board. The conductors are serially coupled to test pads to form a straight-through connection between pin openings located at opposite ends of the circuit board. The test pads are located so that the pads representing data line pairs are adjacent one another. Location of the test pads allows the conductors representing data line pairs to be located in a close parallel relationship for at least part of the way along the circuit board. The layout is such that most of the over-crossings of non-paired data line conductors on opposite sides of the circuit board are made at approximately right angles.

    Abstract translation: 一种电连接器，其利用电路板组件，用于在两个插孔之间提供数据线对的直通电互连，并用于提供突围终端。 电连接器的布局使得共模抑制被改善并且数据线对之间的串扰被最小化。 电连接器具有电路板，导体位于电路板的底表面和顶表面上。 导体串联耦合到测试焊盘，以在位于电路板的相对端的引脚开口之间形成直通连接。 测试焊盘的位置使得表示数据线对的焊盘彼此相邻。 测试焊盘的位置允许表示数据线对的导体沿着电路板的至少一部分方式以紧密平行的关系定位。 布局使得电路板的相对侧上的非配对数据线导体的大多数过交叉以大致直角形成。

    Electrical interconnection board
    183.
    发明授权
    Electrical interconnection board 失效
    电气互连板

    公开(公告)号：US5397861A

    公开(公告)日：1995-03-14

    申请号：US964346

    申请日：1992-10-21

    Applicant: David H. Urquhart, II

    Inventor： David H. Urquhart, II

    IPC: H05K1/00 ,  H05K1/02

    CPC classification number: H05K1/0228 ,  H05K1/0219 ,  H05K1/0245 ,  H05K1/0298 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09245 ,  H05K2201/09672 ,  H05K2201/097

    Abstract: An electrical interconnection board (e.g., a backplane) in which connection positions are spaced along one dimension of the board. Each connection position includes holes for making electrical connections. Layers of the board each have a pattern of conductive path segments connecting holes at each connection position with corresponding holes at other connection positions. The path segments together define continuous conductive routes along the length of the board. Each conductive route includes path segments which respectively lie on different layers. This arrangement increases the distance along which any two pairs of the conductive routes are adjacent each other on a layer, thus reducing interference (e.g., mutual coupling and crosstalk) and improving signal transmission characteristics.

    Abstract translation: 电连接板（例如，背板），其中连接位置沿着板的一个尺寸间隔开。 每个连接位置包括用于进行电气连接的孔。 板的层每个都具有导电路径段的图案，其在每个连接位置处连接孔，在其它连接位置连接相应的孔。 路径段一起定义沿着板的长度的连续导电路线。 每个导电路径包括分别位于不同层上的路段。 这种布置增加了任何两对导电路线在层上彼此相邻的距离，从而减少干扰（例如，互耦合和串扰）并改善信号传输特性。

    Flexible printed circuit board
    184.
    发明授权
    Flexible printed circuit board 失效
    柔性印刷电路板

    公开(公告)号：US4958050A

    公开(公告)日：1990-09-18

    申请号：US351646

    申请日：1989-05-12

    Applicant: Shungi Oku ,  Akikazu Kosho

    Inventor： Shungi Oku ,  Akikazu Kosho

    IPC: H05K1/11 ,  H05K3/32 ,  H05K3/36 ,  H05K1/00

    CPC classification number: H05K1/118 ,  H05K3/361 ,  H05K2201/09245 ,  H05K2201/09672 ,  H05K2201/09781 ,  H05K3/323

    Abstract: A flexible printed circuit board including an insulating flexible substrate, a plurality of first conductive terminals disposed on a front surface of said substrate for external connections, said first terminals to be glued and connected to a plurality of different conductive terminals of a different circuit board by an anisotropic conductive adhesive, and a plurality of conductive patterns disposed on a rear surface of said substrate.

    Abstract translation: 一种柔性印刷电路板，包括绝缘柔性基板，多个第一导电端子，设置在所述基板的前表面上用于外部连接，所述第一端子被胶合并通过不同电路板的多个不同导电端子连接 各向异性导电粘合剂和设置在所述基板的后表面上的多个导电图案。

    Assembly system for communications device having plug-in circuit boards connected in multiple stages
    185.
    发明授权
    Assembly system for communications device having plug-in circuit boards connected in multiple stages 失效
    具有插入电路板的通信装置的组装系统以多级连接

    公开(公告)号：US4679121A

    公开(公告)日：1987-07-07

    申请号：US864418

    申请日：1986-01-24

    Applicant: Josef Schomers ,  Kurt Erbele ,  Wernfried Bonk

    Inventor： Josef Schomers ,  Kurt Erbele ,  Wernfried Bonk

    IPC: H05K1/02 ,  H05K7/14 ,  H05K1/14

    CPC classification number: H05K1/0228 ,  H05K7/1439 ,  H05K7/1459 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09245 ,  H05K2201/09272 ,  H05K2201/09709

    Abstract: An electrical device assembly system composed of plug-in circuit boards each having a plurality of plug-in connectors at an edge presenting input and output terminals. Magazines each mounting a plurality of the circuit boards are provided. The magazines each have a rear side and are disposed adjacent to one another. Each plurality of plug-in circuit boards are mounted in a respective one of the magazines so that the plug-in connectors are located at the rear side. Rear wall circuit boards are fastened to the rear sides of the magazines and include plug-in counterconnectors for mating with corresponding ones of the plug-in connectors at the edges of the plug-in circuit boards. The plug-in connectors of each plurality of plug-in circuit boards define separate regions at the rear side of each magazine. At least one rear wall circuit board is fastened to two adjacent magazines and covers two adjacent ones of the regions, one each from the two adjacent magazines. The plug-in counterconnectors each have a plurality of electrical contacts corresponding to the input and output terminals, respectively, of the plug-in connectors. The rear wall circuit board includes conductor paths between selected contacts for forming the electrical connections between the input and output terminals. Respective ones of the input and output terminals of each plug-in circuit board are associated with the connector of the plurality of connectors which is closest to the adjacent magazine to which the respective ones of the input and output terminals are connected.

    Abstract translation: 一种由插入式电路板组成的电气装置组装系统，每个插入式电路板在呈现输入和输出端子的边缘处具有多个插入式连接器。 提供了各自安装多个电路板的各种杂志。 杂志各自具有后侧并且彼此相邻地设置。 每个插入式电路板安装在相应的一个杂志中，使得插入式连接器位于后侧。 后壁电路板被固定到杂志的后侧，并且包括用于与插入式电路板的边缘处的相应的插入式连接器配合的插入式计数器连接器。 每个插入式电路板的插入式连接器在每个盒的后侧限定分开的区域。 至少一个后墙电路板固定到两个相邻的杂志上，并覆盖两个相邻的区域，每个杂志分别来自两个相邻的杂志。 插入式计数器连接器各自具有分别对应于插入式连接器的输入和输出端子的多个电触点。 后壁电路板包括用于形成输入和输出端子之间的电连接的所选触点之间的导体路径。 每个插入式电路板的输入和输出端子中的相应输入和输出端子与多个连接器的连接器相关联，该连接器最靠近相应的输入和输出端子连接到相邻的盒体。

    Multi-level printed circuit boards and memory modules including the same
    188.
    发明授权
    Multi-level printed circuit boards and memory modules including the same 有权

    公开(公告)号：US12075560B2

    公开(公告)日：2024-08-27

    申请号：US17741510

    申请日：2022-05-11

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jong-Hyun Seok ,  Yong-Jin Kim ,  Kyeongseon Park ,  Hwanwook Park

    IPC: H05K1/02 ,  H01P3/08 ,  H01L25/18 ,  H05K1/11 ,  H05K1/18

    CPC classification number: H05K1/025 ,  H01P3/08 ,  H01L25/18 ,  H05K1/117 ,  H05K1/18 ,  H05K2201/09227 ,  H05K2201/09245 ,  H05K2201/09336 ,  H05K2201/09672 ,  H05K2201/10159 ,  H05K2201/10515 ,  H05K2201/10522 ,  H05K2201/10545

    Abstract: A printed circuit board includes a first electrically conductive reference plane configured to distribute a first reference voltage applied thereto across a surface area of the first reference plane, and a second electrically conductive reference plane extending parallel to the first reference plane, and configured to distribute a second reference voltage applied thereto across a surface area of the second reference plane. A first layer is provided, which extends between the first reference plane and the second reference plane, and includes one or more first signal lines extending adjacent the first reference plane. The first layer is divided into: (i) a first region in which the one or more first signal lines are disposed, (ii) a second region containing an additional plane that is configured to receive a third voltage and has smaller surface area relative to the surface areas of the first and second reference planes, and (iii) a third region containing a dielectric layer. A second layer is provided, which extends between the first reference plane and the second reference plane, and includes one or more second signal lines extending adjacent the second reference plane. The second signal lines have linewidths that vary as a function of whether they are vertically aligned with the first region, the second region, or the third region.

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