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公开(公告)号:US11411088B2
公开(公告)日:2022-08-09
申请号:US17026510
申请日:2020-09-21
Applicant: ASM IP Holding B.V.
Inventor: Fu Tang , Peng-Fu Hsu , Michael Eugene Givens , Qi Xie
Abstract: Methods for forming a metal silicate film on a substrate in a reaction chamber by a cyclical deposition process are provided. The methods may include: regulating the temperature of a hydrogen peroxide precursor below a temperature of 70° C. prior to introduction into the reaction chamber, and depositing the metal silicate film on the substrate by performing at least one unit deposition cycle of a cyclical deposition process. Semiconductor device structures including a metal silicate film formed by the methods of the disclosure are also provided.
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公开(公告)号:US20210332476A1
公开(公告)日:2021-10-28
申请号:US17113301
申请日:2020-12-07
Applicant: ASM IP Holding B.V.
Inventor: Pia Homm Jara , Werner Knaepen , Dieter Pierreux , Bert Jongbloed , Panagiota Arnou , Ren-Jie Chang , Qi Xie , Giuseppe Alessio Verni , Gido van der Star
IPC: C23C16/34 , H01L21/285 , C23C16/44 , C23C16/455 , C23C16/04 , C23C16/56
Abstract: The current disclosure relates to methods of forming a vanadium nitride-containing layer. The method comprises providing a substrate within a reaction chamber of a reactor and depositing a vanadium nitride-containing layer onto a surface of the substrate, wherein the deposition process comprises providing a vanadium precursor to the reaction chamber and providing a nitrogen precursor to the reaction chamber. The disclosure further relates to structures and devices comprising the vanadium nitride-containing layer.
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公开(公告)号:US20210254238A1
公开(公告)日:2021-08-19
申请号:US17166160
申请日:2021-02-03
Applicant: ASM IP Holding B.V.
Inventor: Rami Khazaka , Lucas Petersen Barbosa Lima , Qi Xie
Abstract: Methods and devices for low-temperature deposition of phosphorous-doped silicon layers. Disilane is used as a silicon precursor, and nitrogen or a noble gas is used as a carrier gas. Phosphine is a suitable phosphorous precursor.
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公开(公告)号:US11056344B2
公开(公告)日:2021-07-06
申请号:US15691241
申请日:2017-08-30
Applicant: ASM IP Holding B.V.
Inventor: Chiyu Zhu , Kiran Shrestha , Qi Xie
IPC: H01L21/285 , C23C16/455 , C23C16/04 , C23C16/08 , C23C16/02 , H01L21/28
Abstract: There is provided a method of forming a layer, comprising depositing a seed layer on the substrate and depositing a bulk layer on the seed layer. Depositing the seed layer comprises supplying a first precursor comprising metal and halogen atoms to the substrate; and supplying a first reactant to the substrate. Depositing the bulk layer comprises supplying a second precursor comprising metal and halogen atoms to the seed layer and supplying a second reactant to the seed layer.
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公开(公告)号:US10607895B2
公开(公告)日:2020-03-31
申请号:US15707786
申请日:2017-09-18
Applicant: ASM IP Holding B.V.
Inventor: Qi Xie , Chiyu Zhu , Kiran Shrestha , Pauline Calka , Oreste Madia , Jan Willem Maes , Michael Eugene Givens
IPC: H01L21/8238 , H01L29/49 , H01L29/51 , H01L27/092
Abstract: A method for forming a semiconductor device structure is disclosure. The method may include, depositing an NMOS gate dielectric and a PMOS gate dielectric over a semiconductor substrate, depositing a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric, removing the first work function metal over the PMOS gate dielectric, and depositing a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. Semiconductor device structures including desired metal gate electrodes deposited by the methods of the disclosure are also disclosed.
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公开(公告)号:US10553424B2
公开(公告)日:2020-02-04
申请号:US16253759
申请日:2019-01-22
Applicant: ASM IP Holding B.V.
Inventor: Suvi P. Haukka , Fu Tang , Michael E. Givens , Jan Willem Maes , Qi Xie
IPC: H01L21/02 , H01L29/778 , H01L29/267 , H01L21/28 , H01L29/22 , H01L29/66 , H01L29/78
Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.
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公开(公告)号:US10410943B2
公开(公告)日:2019-09-10
申请号:US15673278
申请日:2017-08-09
Applicant: ASM IP Holding B.V.
Inventor: Xiaoqiang Jiang , Fu Tang , Qi Xie , Pauline Calka , Sung-Hoon Jung , Michael Eugene Givens
IPC: H01L21/02 , H01L23/31 , H01L23/29 , C23C16/455 , H01L21/67 , C23C16/30 , H01L21/306 , H01L29/66
Abstract: A system and a method for passivating a surface of a semiconductor. The method includes providing the surface of the semiconductor to a reaction chamber of a reactor, exposing the surface of the semiconductor to a gas-phase metal containing precursor in the reaction chamber and exposing the surface of the semiconductor to a gas-phase chalcogenide containing precursor. The methods also include passivating the surface of the semiconductor using the gas-phase metal containing precursor and the gas-phase chalcogenide containing precursor to form a passivated surface. The system for passivating a surface of a semiconductor may include a reactor, a metal containing precursor source fluidly coupled to the reactor, and a chalcogenide containing precursor source fluidly couple to the reactor, wherein the metal containing precursor source provides a gas-phase metal containing precursor to a reaction chamber of the reactor, and wherein the chalcogenide containing precursor source provides a gas-phase chalcogenide containing precursor to a reaction chamber of the reactor.
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公开(公告)号:US09905492B2
公开(公告)日:2018-02-27
申请号:US15397319
申请日:2017-01-03
Applicant: ASM IP Holding B.V.
Inventor: Fu Tang , Michael E. Givens , Qi Xie , Petri Raisanen
IPC: H01L23/31 , H01L21/02 , H01L23/02 , H01L21/67 , H01L23/29 , H01L21/306 , C23C16/44 , C23C16/455
CPC classification number: H01L23/3171 , C23C16/4405 , C23C16/45544 , H01L21/02178 , H01L21/02205 , H01L21/02274 , H01L21/0228 , H01L21/02301 , H01L21/02312 , H01L21/306 , H01L21/67011 , H01L23/02 , H01L23/29 , H01L23/293 , H01L2924/0002 , H01L2924/00
Abstract: Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase sulfur precursor to passivate the high-mobility semiconductor surface.
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公开(公告)号:US20170316933A1
公开(公告)日:2017-11-02
申请号:US15144481
申请日:2016-05-02
Applicant: ASM IP Holding B.V.
Inventor: Qi Xie , David de Roest , Jacob Woodruff , Michael Eugene Givens , Jan Willem Maes , Timothee Blanquart
IPC: H01L21/02 , H01L29/36 , H01L21/265 , H01L29/417
CPC classification number: H01L21/0262 , H01L21/02532 , H01L21/02658 , H01L21/02694 , H01L21/2254 , H01L21/26506 , H01L29/36 , H01L29/41725
Abstract: A method for improving source/drain performance through conformal solid state doping and its resulting device are disclosed. Specifically, the doping takes place through an atomic layer deposition of a dopant layer. Embodiments of the invention may allow for an increased doping layer, improved conformality, and reduced defect formation, in comparison to alternate doping methods, such as ion implantation or epitaxial doping.
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公开(公告)号:US20170110313A1
公开(公告)日:2017-04-20
申请号:US15286503
申请日:2016-10-05
Applicant: ASM IP Holding B.V.
Inventor: Fu Tang , Xiaoqiang Jiang , Qi Xie , Michael Eugene Givens , Jan Willem Maes , Jerry Chen
CPC classification number: H01L21/0228 , C23C16/401 , C23C16/45529 , C23C16/45544 , H01L21/02156 , H01L21/02211 , H01L21/02274 , H01L21/28194 , H01L29/16 , H01L29/20 , H01L29/517 , H01L29/78
Abstract: A method for depositing a thin film onto a substrate is disclosed. In particular, the method forms a transitional metal silicate onto the substrate. The transitional metal silicate may comprise a lanthanum silicate or yttrium silicate, for example. The transitional metal silicate indicates reliability as well as good electrical characteristics for use in a gate dielectric material.
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