公开(公告)号：US11814716B2

公开(公告)日：2023-11-14

申请号：US16698448

申请日：2019-11-27

Applicant: Applied Materials, Inc.

Inventor： Fang Ruan ,  Prashant Kumar Kulshreshtha ,  Jiheng Zhao ,  Diwakar Kedlaya

IPC: C23C16/455 ,  H01J37/32 ,  H01L21/3213

CPC classification number: C23C16/45565 ,  H01J37/32449 ,  H01J37/32633 ,  H01L21/32136

Abstract: Exemplary semiconductor processing chambers may include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures through the plate. The chambers may include a faceplate positioned between the blocker plate and substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The second surface of the faceplate and the substrate support may at least partially define a processing region within the semiconductor processing chamber. The faceplate may be characterized by a central axis, and the faceplate may define a plurality of apertures through the faceplate. The faceplate may define a central recess about the central axis extending from the second surface of the faceplate to a depth less than a thickness of the faceplate.

公开(公告)号：US11810764B2

公开(公告)日：2023-11-07

申请号：US16856878

申请日：2020-04-23

Applicant: Applied Materials, Inc.

Inventor： Fang Ruan ,  Prashant Kumar Kulshreshtha ,  Rajaram Narayanan ,  Diwakar Kedlaya

IPC: H01J37/32 ,  H01L21/67

CPC classification number: H01J37/3244 ,  H01J37/32082 ,  H01J37/32899 ,  H01L21/67167 ,  H01J2237/3323 ,  H01L21/67028 ,  H01L21/67069

Abstract: Exemplary semiconductor processing chambers may include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures through the plate. The chambers may include a faceplate positioned between the blocker plate and substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The second surface of the faceplate and the substrate support may at least partially define a processing region within the semiconductor processing chamber. The faceplate may be characterized by a central axis, and the faceplate may define a plurality of apertures through the faceplate. The faceplate may define a plurality of recesses extending about and radially outward of the plurality of apertures. Each recess of the plurality of recesses may extend from the second surface of the faceplate to a depth less than a thickness of the faceplate.

公开(公告)号：US11532525B2

公开(公告)日：2022-12-20

申请号：US17191026

申请日：2021-03-03

Applicant: APPLIED MATERIALS, INC.

Inventor： Anton V Baryshnikov ,  Aykut Aydin ,  Zubin Huang ,  Rui Cheng ,  Yi Yang ,  Diwakar Kedlaya ,  Venkatanarayana Shankaramurthy ,  Krishna Nittala ,  Karthik Janakiraman

IPC: H01L21/66 ,  G05B13/04 ,  G05B13/02 ,  H01L21/67

Abstract: Methods and systems for controlling concentration profiles of deposited films using machine learning are provided. Data associated with a target concentration profile for a film to be deposited on a surface of a substrate during a deposition process for the substrate is provided as input to a trained machine learning model. One or more outputs of the trained machine learning model are obtained. Process recipe data identifying one or more sets of deposition process settings is determined from the one or more outputs. For each set of deposition process setting, an indication of a level of confidence that a respective set of deposition process settings corresponds to the target concentration profile for the film to be deposited on the substrate is also determined. In response to an identification of the respective set of deposition process settings with a level of confidence that satisfies a level of confidence criterion, one or more operations of the deposition process are performed in accordance with the respective set of deposition process settings.

公开(公告)号：US20210143029A1

公开(公告)日：2021-05-13

申请号：US17094969

申请日：2020-11-11

Applicant: Applied Materials, Inc.

Inventor： Diwakar Kedlaya ,  Fang Ruan ,  Zubin Huang ,  Ganesh Balasubramanian ,  Kaushik Alayavalli ,  Martin Seamons ,  Kwangduk Lee ,  Rajaram Narayanan ,  Karthik Janakiraman

IPC: H01L21/67 ,  C23C16/52 ,  G01N21/25 ,  G01N21/3504

Abstract: A system may include a main line for delivering a first gas, and a sensor for measuring a concentration of a precursor in the first gas delivered through the main line. The system may further include first and second sublines for providing fluid access to first and second processing chambers, respectively. The first subline may include a first flow controller for controlling the first gas flowed through the first subline. The second subline may include a second flow controller for controlling the first gas flowed through the second subline. A delivery controller may be configured to control the first and second flow controllers based on the measured concentration of the precursor to deliver a first mixture of the first gas and a second gas and a second mixture of the first and second gases into the first and second semiconductor processing chambers, respectively.

公开(公告)号：US20210140045A1

公开(公告)日：2021-05-13

申请号：US17087346

申请日：2020-11-02

Applicant: Applied Materials, Inc.

Inventor： Yi Yang ,  Krishna Nittala ,  Karthik Janakiraman ,  Aykut Aydin ,  Diwakar Kedlaya

IPC: C23C16/455 ,  C23C16/38 ,  C23C16/30 ,  H01J37/32

Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the silicon-containing precursor and the boron-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the silicon-containing precursor or the boron-containing precursor is greater than or about 2:1. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber.

公开(公告)号：US12255054B2

公开(公告)日：2025-03-18

申请号：US17127201

申请日：2020-12-18

Applicant: Applied Materials, Inc.

Inventor： Venkata Sharat Chandra Parimi ,  Zubin Huang ,  Manjunath Veerappa Chobari Patil ,  Nitin Pathak ,  Yi Yang ,  Badri N. Ramamurthi ,  Truong Van Nguyen ,  Rui Cheng ,  Diwakar Kedlaya

IPC: H01J37/32 ,  C23C16/44 ,  C23C16/458 ,  C23C16/50

Abstract: Exemplary semiconductor processing chambers include a chamber body defining a processing region. The chambers may include a substrate support disposed within the processing region. The substrate support may have an upper surface that defines a recessed substrate seat. The chambers may include a shadow ring disposed above the substrate seat and the upper surface. The shadow ring may extend about a peripheral edge of the substrate seat. The chambers may include bevel purge openings defined within the substrate support proximate the peripheral edge. A bottom surface of the shadow ring may be spaced apart from a top surface of the upper surface to form a purge gas flow path that extends from the bevel purge openings along the shadow ring. A space formed between the shadow ring and the substrate seat may define a process gas flow path. The gas flow paths may be in fluid communication with one another.

公开(公告)号：US12205818B2

公开(公告)日：2025-01-21

申请号：US18606060

申请日：2024-03-15

Applicant: Applied Materials, Inc.

Inventor： Yi Yang ,  Krishna Nittala ,  Rui Cheng ,  Karthik Janakiraman ,  Diwakar Kedlaya ,  Zubin Huang ,  Aykut Aydin

IPC: H01L21/033 ,  C23C16/38

Abstract: Embodiments of the present technology include semiconductor processing methods to make boron-and-silicon-containing layers that have a changing atomic ratio of boron-to-silicon. The methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber, and also flowing a boron-containing precursor and molecular hydrogen (H2) into the substrate processing region of the semiconductor processing chamber. The boron-containing precursor and the H2 may be flowed at a boron-to-hydrogen flow rate ratio. The flow rate of the boron-containing precursor and the H2 may be increased while the boron-to-hydrogen flow rate ratio remains constant during the flow rate increase. The boron-and-silicon-containing layer may be deposited on a substrate, and may be characterized by a continuously increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer furthest from the substrate.

公开(公告)号：US20240266171A1

公开(公告)日：2024-08-08

申请号：US18606060

申请日：2024-03-15

Applicant: Applied Materials, Inc.

Inventor： Yi Yang ,  Krishna Nittala ,  Rui Cheng ,  Karthik Janakiraman ,  Diwakar Kedlaya ,  Zubin Huang ,  Aykut Aydin

IPC: H01L21/033 ,  C23C16/38

CPC classification number: H01L21/0337 ,  C23C16/38 ,  H01L21/0332

Abstract: Embodiments of the present technology include semiconductor processing methods to make boron-and-silicon-containing layers that have a changing atomic ratio of boron-to-silicon. The methods may include flowing a silicon-containing precursor into a substrate processing region of a semiconductor processing chamber, and also flowing a boron-containing precursor and molecular hydrogen (H2) into the substrate processing region of the semiconductor processing chamber. The boron-containing precursor and the H2 may be flowed at a boron-to-hydrogen flow rate ratio. The flow rate of the boron-containing precursor and the H2 may be increased while the boron-to-hydrogen flow rate ratio remains constant during the flow rate increase. The boron-and-silicon-containing layer may be deposited on a substrate, and may be characterized by a continuously increasing ratio of boron-to-silicon from a first surface in contact with the substrate to a second surface of the boron-and-silicon-containing layer furthest from the substrate.

公开(公告)号：US20230390811A1

公开(公告)日：2023-12-07

申请号：US17833408

申请日：2022-06-06

Applicant: Applied Materials, Inc.

Inventor： Khokan Chandra Paul ,  Truong Van Nguyen ,  Kelvin Chan ,  Diwakar Kedlaya ,  Anantha K. Subramani ,  Abdul Aziz Khaja ,  Vijet Patil ,  Yusheng Fang ,  Liangfa Hu ,  Prashant Kumar Kulshreshtha

IPC: B08B7/00 ,  H01J37/32 ,  B08B5/00 ,  B08B9/032

CPC classification number: B08B7/0035 ,  H01J37/32449 ,  H01J37/32357 ,  H01J37/32862 ,  B08B5/00 ,  B08B9/0328 ,  H01J2237/334 ,  H01J2237/332 ,  B08B2209/032

Abstract: Exemplary semiconductor processing systems may include a processing chamber defining a processing region. The systems may include a foreline coupled with the processing chamber, the foreline defining a fluid conduit. The systems may include a radical generator having an inlet and an outlet. The outlet may be fluidly coupled with the foreline. The systems may include a gas source fluidly coupled with the inlet of the radical generator. The systems may include a throttle valve coupled with the foreline downstream of the radical generator.

公开(公告)号：US20230146981A1

公开(公告)日：2023-05-11

申请号：US18093648

申请日：2023-01-05

Applicant: Applied Materials, Inc.

Inventor： Rui Cheng ,  Diwakar Kedlaya ,  Karthik Janakiraman ,  Gautam K. Hemani ,  Krishna Nittala ,  Alicia J. Lustgraaf ,  Zubin Huang ,  Brett Spaulding ,  Shashank Sharma ,  Kelvin Chan

IPC: H01L21/02 ,  C23C16/24 ,  C23C16/50

CPC classification number: H01L21/0262 ,  H01L21/02532 ,  C23C16/24 ,  H01L21/02664 ,  C23C16/50 ,  H01L21/02592

Abstract: Exemplary methods of semiconductor processing may include flowing a silicon-containing precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region, and the substrate may be maintained at a temperature below or about 450° C. The methods may include striking a plasma of the silicon-containing precursor. The methods may include forming a layer of amorphous silicon on a semiconductor substrate. The layer of amorphous silicon as-deposited may be characterized by less than or about 3% hydrogen incorporation.