公开(公告)号：US20240030916A1

公开(公告)日：2024-01-25

申请号：US17932052

申请日：2022-09-14

Applicant: NVIDIA Corp.

Inventor： Walker Joseph Turner ,  John Poulton ,  Sanquan Song

IPC: H03K19/0185 ,  H03K19/00

CPC classification number: H03K19/018521 ,  H03K19/0013 ,  H03K3/356165

Abstract: A level-shifting circuits utilizing storage cells for shifting signals low-to-high or high-to-low include control drivers with moving supply voltages. The moving supply voltages may power positive or negative supply terminals of the control drivers. The control drivers drive gates of common-source configured devices coupled to storage nodes of the storage cell.

公开(公告)号：US11283349B2

公开(公告)日：2022-03-22

申请号：US16856884

申请日：2020-04-23

Applicant: NVIDIA Corp.

Inventor： Sudhir Shrikantha Kudva ,  Nikola Nedovic ,  Sanquan Song

IPC: H02M3/155

Abstract: This disclosure relates to current flattening circuits for an electrical load. The current flattening circuits incorporate randomize various parameters to add noise onto the supply current. This added noise may act to reduce the signal to noise ratio in the supply current, increasing the difficulty of identifying a computational artifact signal from power rail noise.

公开(公告)号：US12047067B2

公开(公告)日：2024-07-23

申请号：US17932091

申请日：2022-09-14

Applicant: NVIDIA Corp.

Inventor： Walker Joseph Turner ,  John Poulton ,  Sanquan Song

IPC: H03K19/0185 ,  H03K3/037 ,  H03K19/00 ,  H03K3/356

CPC classification number: H03K19/018521 ,  H03K3/037 ,  H03K19/0013 ,  H03K19/018528 ,  H03K3/356165

Abstract: Stacked voltage domain level shifting circuits for shifting signals low-to-high or high-to-low include a storage cell powered by a mid-range supply rail of the stacked voltage domain level shifting circuit, and control drivers powered by moving supply voltages generated by the storage cell, wherein the control drivers coupled to drive gates of common-source configured devices coupled to storage nodes of the storage cell.

公开(公告)号：US20230269119A1

公开(公告)日：2023-08-24

申请号：US18182245

申请日：2023-03-10

Applicant: NVIDIA Corp.

Inventor： Sanquan Song ,  John Poulton

IPC: H04L25/49 ,  H04B1/00

CPC classification number: H04L25/4917 ,  H04B1/0082

Abstract: A transceiver circuit includes a receiver front end utilizing a ring oscillator, and a transmitter front end utilizing a pass-gate circuit in a first feedback path across a last-stage driver circuit. The transceiver circuit provides low impedance at low frequency and high impedance at high frequency, and desirable peaking behavior.

公开(公告)号：US20220353115A1

公开(公告)日：2022-11-03

申请号：US17243035

申请日：2021-04-28

Applicant: NVIDIA Corp.

Inventor： Sanquan Song ,  John Poulton

IPC: H04L25/49 ,  H04B1/00

Abstract: A transceiver circuit includes a receiver front end utilizing a ring oscillator, and a transmitter front end utilizing a pass-gate circuit in a first feedback path across a last-stage driver circuit. The transceiver circuit provides low impedance at low frequency and high impedance at high frequency, and desirable peaking behavior.

公开(公告)号：US20210336536A1

公开(公告)日：2021-10-28

申请号：US16856884

申请日：2020-04-23

Applicant: NVIDIA Corp.

Inventor： Sudhir Shrikantha Kudva ,  Nikola Nedovic ,  Sanquan Song

IPC: H02M3/155

Abstract: This disclosure relates to current flattening circuits for an electrical load. The current flattening circuits incorporate randomize various parameters to add noise onto the supply current. This added noise may act to reduce the signal to noise ratio in the supply current, increasing the difficulty of identifying a computational artifact signal from power rail noise.

公开(公告)号：US20200162082A1

公开(公告)日：2020-05-21

申请号：US16382050

申请日：2019-04-11

Applicant: NVIDIA Corp.

Inventor： Xi Chen ,  Sanquan Song

IPC: H03L7/099 ,  H03K5/133 ,  H03L7/07 ,  H03K3/03

Abstract: A circuit includes a first ring oscillator with a plurality of stages, each coupled via a voltage follower cross-coupling to a plurality of stages of a second ring oscillator. Further ring oscillators may be coupled to the first ring oscillator and the second ring oscillator. Additionally, the voltage follower cross-coupling for each of the stages may include one or more first voltage follower having a first strength, and one or more second voltage follower having a second strength different than the first strength.

公开(公告)号：US20200159267A1

公开(公告)日：2020-05-21

申请号：US16192449

申请日：2018-11-15

Applicant: NVIDIA Corp.

Inventor： Nikola Nedovic ,  Sanquan Song

IPC: G05F1/575

Abstract: A linear regulator for applications with low area constraint resulting in limited load decoupling capacitance that introduces a compensating zero in the regulator loop to counteract the loss of phase margin and further introduces a feed-forward noise cancellation path operating over a wide frequency range covering a first package resonance frequency. The feed-forward path has low power consumption and improves the power-supply rejection ratio.

公开(公告)号：US10566958B1

公开(公告)日：2020-02-18

申请号：US16248558

申请日：2019-01-15

Applicant: NVIDIA Corp.

Inventor： Sanquan Song ,  Olakanmi Oluwole ,  John Poulton ,  Carl Thomas Gray

IPC: H03L7/099 ,  H03B27/00 ,  H03B1/04 ,  H03K3/012 ,  G06F1/06 ,  G06F1/10 ,  H03K3/03

Abstract: Injection locked oscillation circuits are applied along clock distribution circuit paths to increase clock signal bandwidth, reduce duty cycle error, reduce quadrature phase error, reduce clock signal jitter, and reduce clock signal power consumption.