公开(公告)号：US08089003B2

公开(公告)日：2012-01-03

申请号：US12057654

申请日：2008-03-28

Applicant: Wen-Chin Lee ,  Cheng-Hsien Lin

Inventor： Wen-Chin Lee ,  Cheng-Hsien Lin

IPC: H05K1/02

CPC classification number: H05K1/056 ,  H05K1/0393 ,  H05K2201/0355 ,  H05K2201/0382

Abstract: A printed circuit board substrate includes an insulation matrix and a waterproof layer. The insulation matrix includes a first surface and a second surface at an opposite side thereof to the first surface. The waterproof layer is formed in the insulation matrix and is arranged between the first surface and the second surface for blocking water from passing therethrough in a thicknesswise direction of the insulation matrix.

Abstract translation: 印刷电路板基板包括绝缘基体和防水层。 绝缘矩阵包括与第一表面相对的第一表面和第二表面。 防水层形成在绝缘基体中，并且布置在第一表面和第二表面之间，用于阻挡水在绝缘基体的厚度方向上穿过其中。

公开(公告)号：US20110036914A1

公开(公告)日：2011-02-17

申请号：US12988210

申请日：2009-04-28

Applicant: Akira Shingu ,  Kiyoji Egashira

Inventor： Akira Shingu ,  Kiyoji Egashira

IPC: G06K19/077 ,  H01Q7/00

CPC classification number: H01Q7/00 ,  G06K19/07749 ,  H01Q1/38 ,  H05K1/162 ,  H05K1/165 ,  H05K3/4685 ,  H05K2201/0116 ,  H05K2201/0355 ,  H05K2201/0382

Abstract: Provided are an antenna circuit constituent body for an IC card/tag, which is capable of enhancing a Q value by reducing a permittivity of a resin film of which a base material is made; and an IC card. The antenna circuit constituent body (10) for an IC card/tag comprises: the base material (11) made of the resin film; and circuit pattern layers (131 and 132) each formed on each of both sides of the base material (11) and made of aluminum foil. The circuit pattern layer (131) includes a coiled pattern layer. Parts of the circuit pattern layers (131 and 132), which mutually face each other; and a part of the base material (11), which is interposed between the parts of the circuit pattern layers (131 and 132), constitute a capacitor. The circuit pattern layers (131 and 132) are electrically connected by means of crimping parts (13a and 13b). The base material (11) includes a plurality of void-state-air layers. A relative density of the base material (11) with respect to a density of a resin is less than or equal to 0.9. An average volume of the void-state-air layers is greater than or equal to 2 μm3 and less than or equal to 90 μm3.

Abstract translation: 提供一种用于IC卡/标签的天线电路构成体，其能够通过降低制成基材的树脂膜的介电常数来提高Q值; 和IC卡。 用于IC卡/标签的天线电路构成体（10）包括：由树脂膜制成的基材（11）; 以及各自形成在基材（11）的两侧的每一侧上且由铝箔制成的电路图案层（131和132）。 电路图案层（131）包括线圈图案层。 电路图案层（131和132）的相互面对的部分; 并且介于电路图案层（131和132）的部分之间的基底材料（11）的一部分构成电容器。 电路图案层（131和132）通过压接部件（13a和13b）电连接。 基材（11）包括多个空隙状态空气层。 基材（11）相对于树脂的密度的相对密度小于或等于0.9。 空隙状态空气层的平均体积大于或等于2μm3且小于或等于90μm3。

公开(公告)号：US20110005821A1

公开(公告)日：2011-01-13

申请号：US12922253

申请日：2009-03-25

Applicant: Tom Marttila

Inventor： Tom Marttila

IPC: H05K1/00 ,  H05K3/02

CPC classification number: H05K1/115 ,  B32B37/1292 ,  B32B38/10 ,  B32B2310/0843 ,  B32B2457/08 ,  G08B13/244 ,  H05K1/0366 ,  H05K1/0386 ,  H05K3/027 ,  H05K3/046 ,  H05K3/386 ,  H05K3/4046 ,  H05K3/4084 ,  H05K2201/0284 ,  H05K2201/0355 ,  H05K2201/0382 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2203/0522 ,  H05K2203/1388 ,  H05K2203/1394 ,  H05K2203/1545 ,  Y10T29/49156

Abstract: A method for manufacturing a circuit board featuring conductive patterns, said method comprising the following steps of:i) affixing a conductive layer, such as a metal foil (3), to a substrate material (1) selectively, such that a part of the conductive layer, such as the metal foil (3), comprising desired areas (3a) for the final product and narrow areas (3c) between the final product's conducting areas, is affixed to the substrate material (1) by means of a bond (2), and removal-intended more extensive areas (3b) of the conductive layer, for example the metal foil (3), are left substantially unattached to the substrate material in such a way that the removable area (3b) is in attachment with the substrate material (1) by not more than its edge portion to be patterned in a subsequent step ii) and possibly by sites which preclude a release of the removable areas prior to a step iii); ii) patterning, by a removal of material, the conductive layer, such as the metal foil (3), from narrow gaps between the desired conducting areas (3a), and from an outer periphery of the area (3b) removable in a solid state, for establishing conductor patterns; iii) removing the removable areas (3b), not affixed to the substrate material (1), from the conductive layer, such as the metal foil (3), in a solid state after the conductive layer's edge area, which was removed from the removable area's outer periphery during the course of step ii), no longer holds the removable areas (3b) attached by their edges to the substrate material.

Abstract translation: 一种制造具有导电图案的电路板的方法，所述方法包括以下步骤：i）选择性地将诸如金属箔（3）的导电层固定到基底材料（1）上，使得部分 导电层，例如金属箔（3），其包含用于最终产品的所需区域（3a）和最终产品的导电区域之间的狭窄区域（3c），通过粘合剂（1）固定到基底材料（1） 导电层，例如金属箔（3）的移除目的更广泛的区域（3b）基本上不附着于基底材料，使得可移除区域（3b）与 基底材料（1）不超过其后续步骤ii）中待图案化的边缘部分，并且可能通过在步骤iii）之前排除可释放区域的释放的部位; ii）通过从所需导电区域（3a）之间的狭窄间隙和从固体可移除的区域（3b）的外周边去除导电层（例如金属箔（3））的图案， 状态，用于建立导体图案; iii）在导电层的边缘区域从固体状态除去导电层的边缘区域之后，从导电层（例如金属箔（3））上去除不附着于基底材料（1）的可移除区域（3b） 在步骤ii）的过程中，可移除区域的外围不再将其边缘附着的可移除区域（3b）保持在衬底材料上。

公开(公告)号：US20100139088A1

公开(公告)日：2010-06-10

申请号：US12702865

申请日：2010-02-09

Applicant: Kiyoshi SHIBATA ,  Ryosuke Usui ,  Yasunori Inoue

Inventor： Kiyoshi SHIBATA ,  Ryosuke Usui ,  Yasunori Inoue

IPC: H05K3/10 ,  H05K3/30

CPC classification number: H05K3/445 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01078 ,  H05K1/056 ,  H05K3/0047 ,  H05K3/44 ,  H05K2201/0382 ,  H05K2201/09054 ,  H05K2201/09609 ,  H05K2201/0969 ,  H05K2203/0323 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49165

Abstract: A circuit board and a circuit apparatus using the same which can prevent displacement and film exfoliation ascribable to thermal expansion, and suppress a drop in reliability at increasing temperatures. The circuit board of the circuit apparatus includes a metal substrate having pierced holes as a core member. Protrusions are formed on the top ends of the pierced holes, and depressions are formed in the bottom ends of the pierced holes. Wiring pattern layers are formed on both sides of this metal substrate via respective insulating layers. In order to establish electrical connection between the wiring pattern layers, a conductor layer which connects the wiring pattern layers is formed through the metal substrate via the pierced holes. The conductor layer thereby establishes electrical conduction between the wiring pattern layers. Furthermore, a semiconductor chip is directly connected to the surface side of the circuit board via solder balls.

Abstract translation: 一种电路板和使用该电路板的电路装置，其可以防止由于热膨胀而引起的位移和膜剥落，并且抑制在升高的温度下的可靠性降低。 电路装置的电路板包括具有穿孔作为芯构件的金属基板。 在穿孔的顶端形成突起，在穿孔的底端形成凹部。 接线图案层通过各自的绝缘层形成在该金属基板的两侧上。 为了建立布线图案层之间的电连接，通过穿孔穿过金属基板形成连接布线图案层的导体层。 导体层由此在布线图案层之间建立导电。 此外，半导体芯片通过焊球直接连接到电路板的表面侧。

公开(公告)号：US07587816B2

公开(公告)日：2009-09-15

申请号：US11309280

申请日：2006-07-21

Applicant: Li Liu

Inventor： Li Liu

IPC: H01K3/10

CPC classification number: H05K3/005 ,  H01R12/57 ,  H05K1/0295 ,  H05K1/116 ,  H05K2201/0382 ,  H05K2201/09954 ,  H05K2201/10189 ,  H05K2203/1476 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49165

Abstract: A printed circuit board includes a mounting hole for receiving a connector pin of either of a first SMC and a second SMC, and a signal line. The signal line is electrically connected to the mounting hole by a conductive layer arranged in and about the mounting hole.

Abstract translation: 印刷电路板包括用于接收第一SMC和第二SMC中的任一个的连接器引脚的安装孔和信号线。 信号线通过布置在安装孔内和周围的导电层电连接到安装孔。

公开(公告)号：US07572402B2

公开(公告)日：2009-08-11

申请号：US11174696

申请日：2005-07-05

Applicant: Steven J. Roskowski ,  Kenneth W. Morgan ,  Gregg W. Petrosky ,  Gregory S. Lewis

Inventor： Steven J. Roskowski ,  Kenneth W. Morgan ,  Gregg W. Petrosky ,  Gregory S. Lewis

IPC: B29C45/14

CPC classification number: H05K3/202 ,  H05K1/0293 ,  H05K2201/0382 ,  H05K2201/0394 ,  H05K2201/09118 ,  H05K2203/0195 ,  H05K2203/175 ,  Y10T29/49726 ,  Y10T83/04

Abstract: A method is provided for the punching of a bridge break and thereafter sealing the bridge break during the injection molding process of the lead frame. The bridge breaking tool is placed over the bridge that is to be broken. The collar presses down on the circuit and the punch presses down on the bridge with enough force to form the bridge break. Once the bridge break is formed the punch is retracted from the cavity of the template and molten polymer is injected to flow around the ends of the bridge break. The bridge breaking tool's hold down collars and retracted punch form a molding area for molten polymer to flow over the bridge break and the exposed circuit area. The bridge breaking tool is retracted after the bridge break is encased in the cured molten polymer and the cured molten polymer forms a lead frame structure.

Abstract translation: 提供了一种用于冲压桥接断裂的方法，此后在引线框架的注射成型过程中密封桥接断裂。 桥梁破坏工具放置在待破坏的桥梁上。 衣领按下电路，冲头用足够的力压在桥上，形成桥梁断裂。 一旦形成桥断裂，冲模从模板的空腔缩回，并且注入熔融的聚合物以绕桥断端的端部流动。 桥式破碎工具压紧套环和缩回冲头，形成熔融聚合物的模制区域，以流过桥接断裂和暴露的电路区域。 桥断裂工具在桥接断裂被包裹在固化的熔融聚合物中之后缩回，并且固化的熔融聚合物形成引线框架结构。

公开(公告)号：US20090097209A1

公开(公告)日：2009-04-16

申请号：US12335057

申请日：2008-12-15

Applicant: Hiroyuki FUKUSAKO ,  Kazunori SENO

Inventor： Hiroyuki FUKUSAKO ,  Kazunori SENO

IPC: H05K7/20

CPC classification number: H01L23/50 ,  G02F1/13452 ,  H01L23/3677 ,  H01L23/4985 ,  H01L23/552 ,  H01L2224/73253 ,  H01L2924/16152 ,  H01L2924/3011 ,  H05K1/0204 ,  H05K1/0393 ,  H05K3/0061 ,  H05K2201/0382 ,  H05K2201/09054 ,  H05K2201/10598 ,  H05K2201/2009

Abstract: A driver module structure includes a flexible circuit board (2) provided with a wiring pattern (7), a semiconductor device mounted on the flexible circuit board (2), and an electrically conductive heat-radiating member (4) joined to the semiconductor device. The wiring pattern (7) includes a ground wiring pattern (8). The flexible circuit board (2) has a cavity (9) that exposes a portion of the ground wiring pattern (8). The exposed portion of the ground wiring pattern (8) and the heat-radiating member (4) are connected to establish electrical continuity via a member (11) that is fitted into the cavity (9).

Abstract translation: 驱动器模块结构包括设置有布线图案（7）的柔性电路板（2），安装在柔性电路板（2）上的半导体器件）和接合到半导体器件的导电散热构件 。 布线图案（7）包括接地布线图案（8）。 柔性电路板（2）具有露出接地布线图形（8）的一部分的空腔（9）。 接地布线图案（8）和散热构件（4）的暴露部分被连接以经由装配到空腔（9）中的构件（11）建立电连续性。

公开(公告)号：US20080232673A1

公开(公告)日：2008-09-25

申请号：US12050598

申请日：2008-03-18

Applicant: Takashi Miyauchi

Inventor： Takashi Miyauchi

IPC: G06K9/00

CPC classification number: H05K3/323 ,  G02F1/1303 ,  G02F1/1309 ,  G02F1/13452 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/81903 ,  H01L2224/83851 ,  H01L2924/00011 ,  H05K1/0269 ,  H05K2201/0108 ,  H05K2201/0382 ,  H05K2203/163 ,  H01L2224/29075

Abstract: A method for manufacturing an electronic device is provided. The method includes: pressure-bonding a plurality of terminals of an electronic component to a plurality of electrodes formed on a surface of a transparent substrate, respectively, via an anisotropic conductive film to mount the electronic component on the transparent substrate; obtaining an image of the electrodes by imaging the transparent substrate with the electronic component mounted thereon from backside of the transparent substrate; measuring the number of indentations for each said electrode using the image of the electrode, the indentation being formed when the electrode is pressed by a conductive particle in the anisotropic conductive film; calculating an average and a standard deviation of the number of indentations per electrode throughout the transparent substrate; and calculating a probability that the number of indentations per electrode is less than a reference value on basis of the average and the standard deviation.

Abstract translation: 提供了一种用于制造电子设备的方法。 该方法包括：通过各向异性导电膜将电子部件的多个端子分别压接到形成在透明基板的表面上的多个电极，以将电子部件安装在透明基板上; 通过从透明基板的背面安装有电子部件的透明基板成像来获得电极的图像; 使用电极的图像测量每个所述电极的压痕数量，当电极被各向异性导电膜中的导电颗粒挤压时形成凹陷; 计算每个电极在整个透明基板上的压痕数量的平均值和标准偏差; 并根据平均值和标准偏差计算每个电极的压痕数量小于参考值的概率。

公开(公告)号：US07427148B1

公开(公告)日：2008-09-23

申请号：US11747767

申请日：2007-05-11

Applicant: Tien-Fu Huang ,  Chin-Yin Yu ,  Kuo-Chang Hu ,  Shyh-Rong Tzan ,  Shih-Hao Hua

Inventor： Tien-Fu Huang ,  Chin-Yin Yu ,  Kuo-Chang Hu ,  Shyh-Rong Tzan ,  Shih-Hao Hua

IPC: F21V29/00

CPC classification number: F21V29/71 ,  F21K9/00 ,  F21V19/004 ,  F21V29/70 ,  F21V29/83 ,  F21Y2105/10 ,  F21Y2115/10 ,  H05K1/0204 ,  H05K3/0061 ,  H05K2201/0382 ,  H05K2201/10106

Abstract: Light modules are provided. A light module includes a circuit board, a lighting element electrically connected to the circuit board, and a first thermal plate. The circuit board has a through hole communicating a first side and a second side thereof. The lighting element is disposed on the first side of the circuit board and located corresponding to the through hole. The first thermal plate is disposed on the second side of the circuit board, opposite to the first side, and comprises a first protrusion extending through the through hole and connecting the lighting element.

Abstract translation: 提供灯模块。 光模块包括电路板，电连接到电路板的照明元件和第一热敏板。 电路板具有连通第一侧和第二侧的通孔。 照明元件设置在电路板的第一侧上并且对应于通孔定位。 第一热板设置在电路板的与第一侧相对的第二侧上，并且包括延伸穿过通孔并连接照明元件的第一突起。

公开(公告)号：US20080210457A1

公开(公告)日：2008-09-04

申请号：US12000575

申请日：2007-12-13

Applicant: Hiroaki Hiratsuka ,  Hiroshi Ishikawa ,  Masaaki Tsutsumida

Inventor： Hiroaki Hiratsuka ,  Hiroshi Ishikawa ,  Masaaki Tsutsumida

IPC: H05K1/03 ,  H05K3/06

CPC classification number: H05K3/328 ,  H01L23/4985 ,  H01L24/50 ,  H01L24/86 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/351 ,  H05K1/0393 ,  H05K3/4084 ,  H05K3/4092 ,  H05K2201/0355 ,  H05K2201/0382 ,  H05K2201/0394 ,  H05K2201/0397 ,  H05K2201/10681 ,  H05K2203/063 ,  Y10T29/49156 ,  H01L2924/00

Abstract: A tape carrier for semiconductor device has a resin tape provided with an opening section for bonding, and a wiring lead formed on the resin tape. The wiring lead has a notched section disposed in the opening section and including a notch width WN, and a lead width WL at a position where a bonding tool contacts the wiring lead, and a ratio of the notch width WN to the lead width WL is more than 0.5 and less than 0.685. A method for making the tape carrier includes laminating the metal foil on one surface of the resin tape including the opening section for bonding, and forming the wiring lead in the metal foil by photolithography such that the wiring lead has the notched section disposed in the opening section and including the notch width WN, and the lead width WL at the position where the bonding tool contacts the wiring lead.

Abstract translation: 用于半导体器件的带载体具有设置有用于接合的开口部分的树脂带和形成在树脂带上的布线引线。 布线引线具有设置在开口部分中并且在接合工具接触布线的位置处具有切口宽度W N N和引线宽度W L L的切口部分 引线，并且切口宽度W N N与引线宽度W L的比率大于0.5且小于0.685。 制造带载体的方法包括将金属箔层压在包括用于接合的开口部分的树脂带的一个表面上，并且通过光刻法在金属箔中形成布线引线，使得布线引线具有设置在开口中的切口部分 并且包括切口宽度W N N和在接合工具与布线引线接触的位置处的引线宽度W L L。