公开(公告)号：US11950363B2

公开(公告)日：2024-04-02

申请号：US17542977

申请日：2021-12-06

Applicant: DexCom, Inc.

Inventor： Sean Frick ,  Louis Jung ,  David Lari

IPC: H05K1/09 ,  A61B5/00 ,  A61B5/1468 ,  A61B5/1495 ,  A61B5/24 ,  H01L21/768 ,  H01L21/78 ,  H01L23/36 ,  H01L23/48 ,  H01L23/50 ,  H01L23/552 ,  H05K1/02 ,  H05K1/11 ,  H05K3/02 ,  H05K3/40 ,  A61B5/145 ,  G01N27/327 ,  H05K1/14

CPC classification number: H05K1/112 ,  A61B5/6802 ,  H01L21/768 ,  H01L23/481 ,  H05K1/0262 ,  H05K3/403 ,  A61B5/14532 ,  A61B5/14546 ,  A61B5/1468 ,  A61B5/6848 ,  G01N27/327 ,  H05K1/0219 ,  H05K1/141 ,  H05K2201/0394 ,  H05K2201/049 ,  H05K2201/0792 ,  H05K2201/09063 ,  H05K2201/09181 ,  H05K2201/10151 ,  H05K2201/10378

Abstract: An example sensor interposer employing castellated through-vias formed in a PCB includes a planar substrate defining a plurality of castellated through-vias; a first electrical contact formed on the planar substrate and electrically coupled to a first castellated through-via; a second electrical contact formed on the planar substrate and electrically coupled to a second castellated through-via, the second castellated through-via electrically isolated from the first castellated through-via; and a guard trace formed on the planar substrate, the guard trace having a first portion formed on a first surface of the planar substrate and electrically coupling a third castellated through-via to a fourth castellated through-via, the guard trace having a second portion formed on a second surface of the planar substrate and electrically coupling the third castellated through-via to the fourth castellated through-via, the guard trace formed between the first and second electrical contacts to provide electrical isolation between the first and second electrical contacts.

公开(公告)号：US20240088588A1

公开(公告)日：2024-03-14

申请号：US18516437

申请日：2023-11-21

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Motohiko FUJIMURA ,  Hiroshi OGURA ,  Kazuhiro NISHIKAWA ,  Yoshihiro KAWAKITA ,  Hidetoshi KITAURA

IPC: H01R12/71 ,  H01R13/631 ,  H01R43/26 ,  H05K1/02

CPC classification number: H01R12/718 ,  H01R13/631 ,  H01R43/26 ,  H05K1/0269 ,  H05K2201/09063 ,  H05K2201/10318 ,  H05K2201/10325

Abstract: A power converter includes first and second components on which male and female fitting members of each of a plurality of pairs of fitting members are arranged, with a pair of first alignment keys formed in the first and second components as reference positions. The first and second components are coupled to each other by the female fitting member clamping an insertion portion of the male fitting member inserted between first and second clamping portions of the female fitting member arranged so as to face each other in a state where the pair of first alignment keys are positionally aligned. The first and second clamping portions are each bent so as to form one of protrusions toward one of surfaces thereof facing each other. A gap is formed in a distal end portion of each of the first and second clamping portions.

公开(公告)号：US20240049388A1

公开(公告)日：2024-02-08

申请号：US18381074

申请日：2023-10-17

Applicant: DexCom, Inc.

Inventor： Sean Frick ,  Louis Jung ,  David Lari

IPC: H05K1/11 ,  A61B5/00 ,  H01L21/768 ,  H01L23/48 ,  H05K1/02 ,  H05K3/40

CPC classification number: H05K1/112 ,  A61B5/6802 ,  H01L21/768 ,  H01L23/481 ,  H05K1/0262 ,  H05K3/403 ,  H05K2201/10151 ,  H05K2201/09181 ,  H05K2201/10378 ,  H05K2201/09063 ,  A61B5/1468

Abstract: An example sensor interposer employing castellated through-vias formed in a PCB includes a planar substrate defining a plurality of castellated through-vias; a first electrical contact formed on the planar substrate and electrically coupled to a first castellated through-via; a second electrical contact formed on the planar substrate and electrically coupled to a second castellated through-via, the second castellated through-via electrically isolated from the first castellated through-via; and a guard trace formed on the planar substrate, the guard trace having a first portion formed on a first surface of the planar substrate and electrically coupling a third castellated through-via to a fourth castellated through-via, the guard trace having a second portion formed on a second surface of the planar substrate and electrically coupling the third castellated through-via to the fourth castellated through-via, the guard trace formed between the first and second electrical contacts to provide electrical isolation between the first and second electrical contacts.

公开(公告)号：US11889669B2

公开(公告)日：2024-01-30

申请号：US17479361

申请日：2021-09-20

Applicant: LG Display Co., Ltd.

Inventor： Hyo-Jin Bang

IPC: H05K1/02 ,  H05K7/20

CPC classification number: H05K7/20963 ,  H05K1/0284 ,  H05K2201/09063

Abstract: A display apparatus including a heat sink plane disposed on a bottom surface of a display panel and configured in such a way that a coupling groove with a circuit board accommodated therein is formed in the guide panel, which is coupled to the bottom surface of the heat sink plane, to attach and detach the circuit board into and from the coupling groove through a guide holder disposed on a guide panel.

公开(公告)号：US11889626B2

公开(公告)日：2024-01-30

申请号：US17679735

申请日：2022-02-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungho Lee ,  Yunoh Chi

IPC: H05K1/14 ,  H05K1/11 ,  H05K3/00

CPC classification number: H05K1/144 ,  H05K1/113 ,  H05K3/0047 ,  H05K2201/042 ,  H05K2201/09027 ,  H05K2201/09063 ,  H05K2201/09072 ,  H05K2201/10378

Abstract: An electronic device is provided. The electronic device comprises an interposer disposed between first circuit board and second circuit board, and including an opening area and for accommodating the at least one electronic component, and the interposer comprises a board including an inner surface that faces the opening area and an outer surface that faces an opposite direction to the inner surface, wherein the outer surface is formed in a convexo-concave form having a plurality of first concave areas and a plurality of first concave areas, and a side conductive member disposed on the first concave areas and the first concave areas of the outer surface, and formed along the convexo-concave form of the outer surface.

公开(公告)号：US11856700B2

公开(公告)日：2023-12-26

申请号：US17225209

申请日：2021-04-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chunghyun Ryu ,  Byungok Kang ,  Su-Yong An ,  Jongwoo Jang ,  Insub Kwak ,  Teck Su Oh ,  Geurim Jung ,  Sang-Ho Park ,  Sung-Ki Lee

IPC: H01G9/08 ,  H05K1/18 ,  H01G9/008 ,  H01G9/045

CPC classification number: H05K1/182 ,  H01G9/08 ,  H01G9/008 ,  H01G9/045 ,  H05K2201/09063 ,  H05K2201/09781 ,  H05K2201/10015

Abstract: A capacitor module horizontally mounted on a PCB and including a case including a first side surface, an opposing second side, a first electrode pad and a second electrode pad disposed at the first side surface, and a third electrode pad disposed at the second side surface, and an electrolytic capacitor including a dielectric extending in a first horizontal direction, a first electrode contacting the first electrode pad and a second electrode contacting the second electrode pad, wherein the first electrode pad is spaced apart from second electrode pad in a second horizontal direction.

公开(公告)号：US20230413441A1

公开(公告)日：2023-12-21

申请号：US18455782

申请日：2023-08-25

Applicant: Unimicron Technology Corporation

Inventor： CHING-HO HSIEH ,  MING-HSING WU ,  KUEI-SHENG WU

IPC: H05K1/14 ,  H05K1/02 ,  H01R12/79

CPC classification number: H05K1/144 ,  H05K1/028 ,  H01R12/79 ,  H05K2201/09063 ,  H05K2201/042 ,  H05K2201/2018 ,  H05K2201/10189

Abstract: A circuit board assembly is provided and includes a first circuit board, a second circuit board and a first connecting module. The first connecting module includes a first connecting wire, a first connector and a second connector. The first circuit board includes a first processor, and the second circuit board includes a second processor. One end of the first connector is connected to one end of the first connecting wire, and the other end of the first connector is connected to the first circuit board. One end of the second connector is connected to the other end of the first connecting wire, and the other end of the second connector is connected to the second circuit board. The first connector is adjacent to the first processor, and the second connector is adjacent to the second processor.

公开(公告)号：US11844175B2

公开(公告)日：2023-12-12

申请号：US17703277

申请日：2022-03-24

Applicant: Korea Institute of Science and Technology

Inventor： Phillip Lee ,  SeungJun Chung ,  HeeSuk Kim ,  JeongGon Son ,  SukJoon Hwang

IPC: H05K1/02 ,  H05K1/03 ,  H05K3/00 ,  A41D1/00 ,  A41D1/06 ,  A41D13/00 ,  A41D13/05 ,  A42B1/08 ,  A42B1/22 ,  A42B1/041

CPC classification number: H05K1/0283 ,  H05K3/00 ,  H05K2201/09063

Abstract: Disclosed is a method of manufacturing a stretchable substrate having improved stretch uniformity according to various embodiments of the present disclosure in order to implement the above-described object. The method may include forming an auxetic including a plurality of unit structures, and attaching one or more elastic sheets to the auxetic and forming a stretchable substrate.

公开(公告)号：US20230328889A1

公开(公告)日：2023-10-12

申请号：US18331631

申请日：2023-06-08

Applicant: Samsung Display Co., LTD.

Inventor： Tae Hyun RYU ,  Tae Beom KIM ,  Yoon Seop SHIM

IPC: H05K1/18 ,  H05K1/11 ,  H05K1/02 ,  G06F3/041 ,  H05K1/14

CPC classification number: H05K1/144 ,  G06F3/04164 ,  H05K1/0269 ,  H05K1/118 ,  H05K1/189 ,  H05K2201/058 ,  H05K2201/09063 ,  H05K2201/09936 ,  H10K59/131

Abstract: A display device may include a main flexible printed circuit including a first alignment mark and electrically connected to a first panel; and a touch flexible printed circuit including a second alignment mark and electrically connected to a second panel that is perpendicular to the first panel, wherein the main flexible printed circuit is electrically connected to the touch flexible printed circuit through a pad region, and the touch flexible printed circuit includes a first overcoat region disposed between the first alignment mark and the second alignment mark.

公开(公告)号：US20230305247A1

公开(公告)日：2023-09-28

申请号：US17966769

申请日：2022-10-14

Applicant: Arista Networks, Inc.

Inventor： Adam Hemp ,  Youngbae Park ,  Warren Meggitt ,  Andreas Bechtolsheim ,  Purav Shah ,  Daehwan Daniel Kim ,  Robert Wilcox

IPC: G02B6/42 ,  H01L23/427 ,  H05K1/02

CPC classification number: G02B6/428 ,  G02B6/4261 ,  G02B6/4277 ,  G02B6/4269 ,  H01L23/427 ,  H05K1/0209 ,  H05K2201/09227 ,  H05K2201/10189 ,  H05K2201/09063 ,  H05K2201/10454

Abstract: The present disclosure describes a network switch design that includes a vertical switch circuit board that is mounted parallel to the front panel of the network switch. The vertical circuit board supports switch chip(s) to process and forward packets and pluggable module connectors to receive pluggable optics modules that provide connections to other network switches. The pluggable module connectors are horizontally oriented to facilitate routing of electrical signal traces. The arrangement of the circuit board, switch chip(s) and pluggable module connectors achieves reduced lengths for the electrical signal traces that connect the switch chip(s) to the pluggable module connectors. The design improves cooling by providing separate airflow regions between the switch chip heatsink(s) and the optics modules.