公开(公告)号：US09601819B2

公开(公告)日：2017-03-21

申请号：US13854948

申请日：2013-04-01

Applicant: Texas Instruments Incorporated

Inventor： Juan Alejandro Herbsommer ,  Gerd Schuppener ,  Robert Floyd Payne

IPC: H01P3/16 ,  H01P1/04 ,  H01Q13/00 ,  H01P3/12 ,  H05K1/02

CPC classification number: H01P3/16 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01P1/04 ,  H01P3/121 ,  H01Q13/00 ,  H05K1/0239 ,  H05K1/024 ,  H05K2201/0187 ,  H05K2201/0195 ,  H05K2201/09618 ,  H05K2201/10098 ,  Y10T29/49826 ,  Y10T29/49908

Abstract: A dielectric wave guide (DWG) has a dielectric core member that has a first dielectric constant value. A cladding surrounding the dielectric core member has a second dielectric constant value that is lower than the first dielectric constant. A mating end of the DWG is configured for mating with a second DWG having a matching non-planar shaped mating end. A deformable material is disposed on the surface of the mating end of the DWG, such that when mated to a second DWG, the deformable material fills a gap region between the mating ends of the DWG and the second DWG.

公开(公告)号：US09544059B2

公开(公告)日：2017-01-10

申请号：US14868434

申请日：2015-09-29

Applicant: Oclaro Japan, Inc.

Inventor： Fumitoshi Goto

IPC: H04B10/40 ,  H05K1/02 ,  H05K1/11 ,  H05K3/36

CPC classification number: H04B10/40 ,  G02B6/4279 ,  H05K1/0251 ,  H05K1/0274 ,  H05K1/115 ,  H05K3/363 ,  H05K2201/09445 ,  H05K2201/09618 ,  H05K2201/09727

Abstract: An optical module includes: a first circuit board including a first signal terminal part and a first ground terminal part formed on a front surface; and a second circuit board including a second signal terminal part and a second ground terminal part formed on a back surface. The first circuit board further includes: a first dielectric layer; a first signal wire formed on a front surface of the first dielectric layer; a first ground conductor layer formed on a back surface of the first dielectric layer; and a first through ground conductor passing through the first dielectric layer. The first ground terminal part is formed, in a first region and a second region respectively located on both sides of the first signal terminal part in a first direction, and in a third region prescribed at a location beyond the first signal terminal part in a second direction.

Abstract translation: 光学模块包括：第一电路板，包括形成在前表面上的第一信号端子部分和第一接地端子部分; 以及包括形成在背面上的第二信号端子部分和第二接地端子部分的第二电路板。 第一电路板还包括：第一电介质层; 形成在所述第一电介质层的前表面上的第一信号线; 形成在所述第一电介质层的背面上的第一接地导体层; 以及穿过第一介电层的第一通孔接地导体。 第一接地端子部分在第一区域和第二区域中形成，第一区域和第二区域分别位于第一方向上的第一信号端子部分的两侧，并且在第二区域中形成在第二区域中，第二区域在第二区域中被设置在超出第一信号端子部分的位置 方向。

公开(公告)号：US20160366759A1

公开(公告)日：2016-12-15

申请号：US14461900

申请日：2014-08-18

Applicant: Cray Inc.

Inventor： Hyunjun Kim ,  Jeffrey Scott Conger ,  Gregory Erwin Scott

IPC: H05K1/02 ,  H05K3/42 ,  H05K3/40 ,  H05K1/11

CPC classification number: H05K1/0225 ,  H05K1/0219 ,  H05K1/0222 ,  H05K1/0245 ,  H05K1/0298 ,  H05K1/114 ,  H05K1/115 ,  H05K3/4007 ,  H05K3/42 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/09609 ,  H05K2201/09618 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A multi-layer printed circuit board has a number of landing pads that are configured to engage a connector secured thereto. Between the landing pads associated with different signals is at least one micro via that is electrically connected to a ground plane on an outer surface of the multi-layer printed circuit board, and a ground plane on an inner layer of the multi-layer printed circuit board.

公开(公告)号：US09485859B1

公开(公告)日：2016-11-01

申请号：US14859857

申请日：2015-09-21

Applicant: FuKui Precision Component (Shenzhen) Co., Ltd. ,  HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd. ,  Zhen Ding Technology Co., Ltd.

Inventor： Xian-Qin Hu ,  Fu-Yun Shen ,  Jian Luo ,  Ming-Jaan Ho ,  Yi-Qiang Zhuang

IPC: H05K1/00 ,  H05K1/03 ,  H05K3/10 ,  H05K1/02 ,  H05K1/09 ,  H05K3/06 ,  H05K3/18 ,  H05K3/46

CPC classification number: H05K1/0219 ,  H01P3/003 ,  H01P3/085 ,  H01P11/003 ,  H05K1/024 ,  H05K1/189 ,  H05K3/4652 ,  H05K3/4697 ,  H05K2201/0154 ,  H05K2201/05 ,  H05K2201/0715 ,  H05K2201/09618 ,  H05K2201/09809

Abstract: A flexible circuit board includes a first base layer, a circuit layer, a second base layer and a bonding layer. The circuit layer is coupled to a side of the first base layer and includes a linear signal line, two grounding lines located at two opposite sides of the linear signal line, and two hollow areas located between the linear signal line and the grounding lines. The bonding layer couples the second base layer to the circuit layer and defines a first opening corresponding to the linear signal line and communicating with the hollow areas of the circuit layer. The first opening of the bonding layer and the hollow areas of the circuit layer cooperatively define an air medium layer surrounding the linear signal line. A method for manufacturing the flexible circuit board is also provided.

Abstract translation: 柔性电路板包括第一基底层，电路层，第二基底层和结合层。 电路层耦合到第一基极层的一侧，并且包括线性信号线，位于线性信号线的两个相对侧的两个接地线以及位于线性信号线和接地线之间的两个中空区域。 接合层将第二基底层耦合到电路层，并且限定对应于线性信号线的第一开口并与电路层的中空区域连通。 接合层和电路层的中空区域的第一开口协调地限定围绕线性信号线的空气介质层。 还提供了一种用于制造柔性电路板的方法。

公开(公告)号：US09433080B2

公开(公告)日：2016-08-30

申请号：US13075779

申请日：2011-03-30

Applicant: Takuya Suzuki

Inventor： Takuya Suzuki

IPC: H05K1/11 ,  H05K1/14 ,  H05K1/02 ,  H01L23/552 ,  H01L23/58 ,  H01L23/66 ,  H01L25/18 ,  H01P5/107 ,  H01L25/065 ,  H01P3/08 ,  H01Q9/04 ,  H01L23/498 ,  H01L23/50 ,  H05K3/34

CPC classification number: H05K1/0218 ,  H01L23/49816 ,  H01L23/50 ,  H01L23/552 ,  H01L23/585 ,  H01L23/66 ,  H01L25/0652 ,  H01L25/18 ,  H01L2223/6622 ,  H01L2223/6627 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2225/0652 ,  H01L2924/15321 ,  H01L2924/1903 ,  H01L2924/19032 ,  H01L2924/3011 ,  H01P3/081 ,  H01P5/107 ,  H01Q9/04 ,  H05K1/0219 ,  H05K1/0222 ,  H05K1/0237 ,  H05K1/0243 ,  H05K3/3436 ,  H05K2201/09618 ,  H05K2201/10151 ,  H05K2201/10734

Abstract: Shielding of high-frequency circuits is achieved using a simple and inexpensive configuration not using any lid. A high-frequency circuit mounting substrate (20) is disposed, on an underside surface layer of which are disposed high-frequency circuits (21 and 22) and is formed a first grounding conductor that has same electric potential as grounding conductors of the high-frequency circuits and that surrounds the high-frequency circuits. A mother control substrate (3) is disposed, on which the high-frequency circuit mounting substrate (20) is mounted in such a way that the high-frequency circuits are sandwiched therebetween and on which a second grounding conductor is formed in a region facing the high-frequency circuits. Plural first lands are formed on the first grounding conductor of the high-frequency circuit mounting substrate (20) to surround the high-frequency circuits. Plural second lands are formed that are electrically connected to the second grounding conductor at positions on a surface layer of the mother control substrate (3) which face the first lands. Plural solder balls (30G2) are disposed for connecting the first lands and the second lands. The high-frequency circuits are housed in pseudo shielding cavities surrounded by the solder balls (30G2), the grounding conductors of the high-frequency circuits, and the first and second grounding conductors.

公开(公告)号：US20160246156A1

公开(公告)日：2016-08-25

申请号：US14984517

申请日：2015-12-30

Applicant: Fujitsu Optical Components Limited

Inventor： Masaki Sugiyama ,  Akira Ishii ,  Norihisa Naganuma ,  Eiichi Kodera

IPC: G02F1/225 ,  H05K1/11

CPC classification number: G02F1/2255 ,  G02F1/035 ,  H05K1/0219 ,  H05K1/118 ,  H05K3/363 ,  H05K3/366 ,  H05K2201/09172 ,  H05K2201/094 ,  H05K2201/09481 ,  H05K2201/09618 ,  H05K2201/0969

Abstract: A first circuit board has an electrode pattern, a ground pattern, a first through hole, and a second through hole. The first through hole penetrates through the electrode pattern. The second through hole penetrates through the ground pattern. A second circuit board has a signal line, an electrode terminal, and a ground terminal. The electrode terminal is extended from the signal line, and is electrically connected to the electrode pattern with the electrode terminal being inserted into the first through hole. The ground terminal is electrically connected to the ground pattern with the ground terminal being inserted into the second through hole, and has a width, a length, or an area or any combination thereof larger than a width, a length, or an area or any combination thereof of the electrode terminal.

Abstract translation: 第一电路板具有电极图案，接地图案，第一通孔和第二通孔。 第一通孔穿过电极图案。 第二个通孔穿过地面图案。 第二电路板具有信号线，电极端子和接地端子。 电极端子从信号线延伸，并且电连接到电极图案，电极端子被插入到第一通孔中。 接地端子与接地图形电连接，接地端子被插入到第二通孔中，并且具有宽度，长度或面积或其大于宽度，长度或面积的任何组合，或任何 电极端子的组合。

公开(公告)号：US09380704B2

公开(公告)日：2016-06-28

申请号：US14008575

申请日：2012-03-30

Applicant: Kazuhiro Kashiwakura

Inventor： Kazuhiro Kashiwakura

IPC: H05K1/11 ,  H05K1/14 ,  H05K1/18 ,  H01R13/66 ,  H05K7/14 ,  H01R12/50 ,  H04Q1/02 ,  H05K1/02 ,  H05K3/30 ,  H04L25/02

CPC classification number: H05K1/18 ,  H01R13/6616 ,  H01R13/6625 ,  H01R13/6658 ,  H01R23/7073 ,  H04L25/0298 ,  H04Q1/15 ,  H05K1/0231 ,  H05K1/0245 ,  H05K1/0246 ,  H05K1/0251 ,  H05K1/14 ,  H05K1/141 ,  H05K3/306 ,  H05K7/1439 ,  H05K2201/044 ,  H05K2201/09618 ,  H05K2201/10015 ,  Y10T29/49128

Abstract: A through-hole stub AC termination circuit including a resistor and a capacitor, is connected to an open end of a stub of a through-hole provided in a circuit board.

Abstract translation: 包括电阻器和电容器的通孔短路AC终端电路连接到设置在电路板中的通孔的短截线的开口端。

公开(公告)号：US20160164158A1

公开(公告)日：2016-06-09

申请号：US14559503

申请日：2014-12-03

Applicant: QUALCOMM Incorporated

Inventor： Darryl JESSIE ,  Lan NAN

IPC: H01P3/02 ,  H01P11/00 ,  H01L23/528 ,  H01L23/66 ,  H01L21/768 ,  H01P3/08 ,  H01L23/00

CPC classification number: H01P3/006 ,  H01L21/768 ,  H01L23/5225 ,  H01L23/525 ,  H01L23/528 ,  H01L23/66 ,  H01L24/11 ,  H01L24/14 ,  H01L2223/6605 ,  H01L2223/6627 ,  H01P3/003 ,  H05K1/0219 ,  H05K2201/0305 ,  H05K2201/09236 ,  H05K2201/09336 ,  H05K2201/09618

Abstract: In an integrated circuit package that houses radio-frequency (RF) circuits or components using wafer-level packaging (WLP), an RF-signal transmission structure includes a signal-carrying conductive line positioned between grounded conductive lines to avoid undesirable coupling between the signal-carrying conductive line and other RF circuits or components in the same package.

Abstract translation: 在使用晶片级封装（WLP）容纳射频（RF）电路或部件的集成电路封装中，RF信号传输结构包括位于接地导线之间的信号承载导线，以避免信号之间的不期望的耦合 - 同一封装中的导线和其他RF电路或组件。

公开(公告)号：US09350063B2

公开(公告)日：2016-05-24

申请号：US13854943

申请日：2013-04-01

Applicant: Texas Instruments Incorporated

Inventor： Juan Alejandro Herbsommer ,  Gerd Schuppener ,  Robert Floyd Payne

IPC: H01P3/16 ,  H01Q13/00 ,  H01P3/12 ,  H05K1/02

CPC classification number: H01P3/16 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01P1/04 ,  H01P3/121 ,  H01Q13/00 ,  H05K1/0239 ,  H05K1/024 ,  H05K2201/0187 ,  H05K2201/0195 ,  H05K2201/09618 ,  H05K2201/10098 ,  Y10T29/49826 ,  Y10T29/49908

Abstract: A dielectric wave guide (DWG) has a dielectric core member having that has a first dielectric constant value. A cladding surrounding the dielectric core member has a second dielectric constant value that is lower than the first dielectric constant. A mating end of the DWG is configured in a non-planer shape for mating with a second DWG having a matching non-planar shaped mating end.

Abstract translation: 电介质波导（DWG）具有具有第一介电常数值的介质芯构件。 围绕介电芯构件的包层具有低于第一介电常数的第二介电常数值。 DWG的配合端构造成非平面形状，用于与具有匹配的非平面形配合端的第二DWG配合。

公开(公告)号：US09332649B2

公开(公告)日：2016-05-03

申请号：US14066905

申请日：2013-10-30

Applicant: Magnachip Semiconductor, Ltd.

Inventor： DoYoung Kim ,  KyungDuk Kim

IPC: H01L23/495 ,  H05K3/10 ,  H01L23/498 ,  H01L23/552 ,  H05K1/02 ,  H05K1/18

CPC classification number: H05K3/10 ,  H01L23/49838 ,  H01L23/4985 ,  H01L23/552 ,  H01L2224/73204 ,  H05K1/0219 ,  H05K1/189 ,  H05K2201/09618 ,  H05K2201/09781 ,  Y10T29/49155

Abstract: A flexible circuit board, a semiconductor package, and methods of forming the same are provided. The flexible circuit board includes: a base film; an input line pattern, an output line pattern, and a dummy pattern on a first surface of the base film; and a ground pattern on a second surface of the base film and electrically connected with the dummy pattern.

Abstract translation: 提供了柔性电路板，半导体封装及其形成方法。 柔性电路板包括：基膜; 在基膜的第一表面上的输入线图案，输出线图案和虚设图案; 以及在基膜的第二表面上的接地图案，并与虚设图案电连接。