公开(公告)号：US20070076324A1

公开(公告)日：2007-04-05

申请号：US11243712

申请日：2005-10-04

Applicant: John Moore ,  Matthew Barsotti

Inventor： John Moore ,  Matthew Barsotti

IPC: G11B5/008

CPC classification number: G11B5/4893 ,  G11B5/00826 ,  H05K1/0228 ,  H05K1/0393 ,  H05K2201/0352 ,  H05K2201/09236 ,  H05K2201/09672 ,  H05K2201/09727

Abstract: A dual layer flexible circuit for tape drives is provided that has a flexible substrate with first and second sides. A plurality of write trace pairs are provided on the substrate, with each write trace pair including a first write trace on the first side of the substrate and a second write trace on the second side of the substrate opposing the first write trace. Each first write trace has a width that is narrower than the width of each second write trace, thereby allowing for compensation of misalignment between the trace layers, avoiding variation in the capacitance and inductance of the full circuit.

Abstract translation: 提供了一种用于磁带驱动器的双层柔性电路，其具有带有第一和第二侧面的柔性基板。 在衬底上提供多个写入轨迹对，其中每个写入轨迹对包括在衬底的第一侧上的第一写入迹线和与第一写入轨迹相对的衬底的第二侧上的第二写入轨迹。 每个第一写入迹线的宽度窄于每个第二写入迹线的宽度，从而允许补偿迹线层之间的未对准，从而避免全电路的电容和电感的变化。

公开(公告)号：US20070076320A1

公开(公告)日：2007-04-05

申请号：US11529975

申请日：2006-09-29

Applicant: Toshikazu Endo ,  Kenichi Kawabata

Inventor： Toshikazu Endo ,  Kenichi Kawabata

IPC: G11B5/012

CPC classification number: G11B5/09 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L2224/24137 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K1/0231 ,  H05K1/0233 ,  H05K1/0237 ,  H05K1/0298 ,  H05K1/186 ,  H05K3/4688 ,  H05K2201/086 ,  H05K2201/09236

Abstract: A hard disk drive is provided with a platter, a spindle motor for driving the platter, an arm with a magnetic head attached to a distal end thereof, a voice coil motor for driving the arm, a first circuit substrate, and a drive casing for accommodating and electrically shielding the platter, spindle motor, arm, voice coil motor, and first circuit substrate. The first circuit substrate has a multilayer substrate, a plurality of digital ICs that is embedded as bare chips in the multilayer substrate, and a bus line for connecting the digital ICs. The digital ICs are disposed in a mutually horizontal configuration.

Abstract translation: 硬盘驱动器设有一个盘片，用于驱动盘片的主轴电机，一个安装在其末端的磁头的臂，一个用于驱动臂的音圈马达，一个第一电路基板和一个用于 容纳和电屏蔽盘，主轴电机，臂，音圈电机和第一电路基板。 第一电路基板具有多层基板，作为裸芯片嵌入多层基板的多个数字IC以及用于连接数字IC的总线。 数字IC以相互水平的配置布置。

公开(公告)号：US20070057344A1

公开(公告)日：2007-03-15

申请号：US11224224

申请日：2005-09-13

Applicant: Sheng-Yuan Lee

Inventor： Sheng-Yuan Lee

IPC: H01L23/52

CPC classification number: H01L23/5223 ,  H01L2924/0002 ,  H05K1/0298 ,  H05K1/162 ,  H05K2201/09236 ,  H05K2201/09672 ,  H01L2924/00

Abstract: An embedded capacitors with interdigitated structure for a package carrier or a printed circuit board comprises a plurality of stacked conductive layers, at least one first via connecting structure and at least one second via connecting structure. In order to enhance the capacitance and the layout efficiency, this case fully utilizes the spaces between the via connecting structures for disposing at least one extending line extended from the via connecting structure to simultaneously increase side-to-side and layer-to-layer capacitances. Thus, the present invention provides a capacitance larger than that of conventional design.

Abstract translation: 具有用于封装载体或印刷电路板的叉指结构的嵌入式电容器包括多个层叠的导电层，至少一个第一通孔连接结构和至少一个第二通孔连接结构。 为了提高电容和布局效率，这种情况充分利用通孔连接结构之间的空间，用于布置从通孔连接结构延伸的至少一条延伸线，以同时增加侧到侧和层间电容 。 因此，本发明提供比常规设计更大的电容。

公开(公告)号：US20070056764A1

公开(公告)日：2007-03-15

申请号：US11504722

申请日：2006-08-16

Applicant: Hiroshi Kanno ,  Kazuyuki Sakiyama ,  Ushio Sangawa ,  Tomoyasu Fujishima

Inventor： Hiroshi Kanno ,  Kazuyuki Sakiyama ,  Ushio Sangawa ,  Tomoyasu Fujishima

IPC: H05K1/00

CPC classification number: H01P1/201 ,  H01P1/203 ,  H05K1/0219 ,  H05K1/0237 ,  H05K2201/09236 ,  H05K2201/09781

Abstract: A transmission line apparatus includes: a substrate 101 with a ground conductor plane; and first and second signal strips 102a, 102b supported on the substrate 101 in parallel with each other. The apparatus further includes at least one additional capacitance element 301 that connects the first and second signal strips 102a, 102b together. The element 301 includes: a first additional conductor 303 spaced from the first signal strip 102a; a second additional conductor 305 spaced from the second signal strip 102b; and a third additional conductor 307 connected to the first and second additional conductors 303, 305 at respective points. When measured in a signal transmission direction, the smallest width W3a of the third additional conductor 307 is shorter than the length L1 or L2 of the first or second additional conductor 303 or 305. And the additional capacitance element 301 has a resonant frequency that is higher than the frequency of a signal being transmitted.

Abstract translation: 传输线装置包括：具有接地导体平面的基板101; 以及彼此平行地支撑在基板101上的第一和第二信号条102a，102b。 该装置还包括将第一和第二信号条带102a，102b连接在一起的至少一个附加电容元件301。 元件301包括：与第一信号条102a间隔开的第一附加导体303; 与第二信号条带102b间隔开的第二附加导体305; 以及在各个点处连接到第一和第二附加导体303,305的第三附加导体307。 当在信号传输方向上测量时，第三附加导体307的最小宽度W 3 a比第一或第二附加导体303或305的长度L 1或L 2短。 并且附加电容元件301具有高于正被发送的信号的频率的谐振频率。

公开(公告)号：US20070049130A1

公开(公告)日：2007-03-01

申请号：US11510591

申请日：2006-08-28

Applicant: Toshiya Kojima ,  Gentaro Furukawa

Inventor： Toshiya Kojima ,  Gentaro Furukawa

IPC: H01R13/40

CPC classification number: H05K3/06 ,  B41J2/14233 ,  B41J2002/14459 ,  B41J2002/14491 ,  B41J2202/18 ,  H05K1/0265 ,  H05K3/041 ,  H05K3/061 ,  H05K3/107 ,  H05K3/244 ,  H05K2201/09018 ,  H05K2201/09036 ,  H05K2201/09045 ,  H05K2201/09236 ,  H05K2201/09736 ,  H05K2201/098 ,  H05K2201/09827 ,  H05K2201/09836 ,  H05K2201/09981 ,  H05K2203/0108 ,  H05K2203/1527

Abstract: The wiring substrate comprises: a recess section and a projecting section formed on at least one surface of the wiring substrate; and wires formed on both the recess section and the projecting section.

Abstract translation: 布线基板包括：形成在布线基板的至少一个表面上的凹部和突出部; 以及形成在所述凹部和所述突出部两者上的线。

公开(公告)号：US20070040626A1

公开(公告)日：2007-02-22

申请号：US11588640

申请日：2006-10-27

Applicant: James Blair ,  Oswin Schreiber ,  Jeffrey Smith

Inventor： James Blair ,  Oswin Schreiber ,  Jeffrey Smith

IPC: H01P3/08

CPC classification number: H05K1/0219 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01P3/006 ,  H01P3/08 ,  H05K1/0237 ,  H05K1/0393 ,  H05K1/147 ,  H05K3/222 ,  H05K2201/09236 ,  H05K2201/09318 ,  H05K2201/09618 ,  H05K2201/09727 ,  H05K2201/10492 ,  H05K2201/10734 ,  H01L2924/00

Abstract: A high speed flexible interconnect cable includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission line structures. The transmission line structure may be realized as a grounded coplanar waveguide structure. The cable can be coupled to destination components using a variety of connection techniques. The cable can also be terminated with any number of known or standardized connector packages.

Abstract translation: 高速柔性互连电缆包括多个导电层和多个电介质层。 位于导电层上的导电信号迹线与电介质层结合形成一个或多个高速电传输线结构。 传输线结构可以被实现为接地的共面波导结构。 电缆可以使用各种连接技术耦合到目标组件。 电缆也可以用任何数量的已知或标准的连接器封装端接。

公开(公告)号：US07167936B2

公开(公告)日：2007-01-23

申请号：US10348421

申请日：2003-01-21

Applicant: Paul Lindt

Inventor： Paul Lindt

IPC: G06F3/00 ,  H01P3/00 ,  H01P3/08 ,  G11C5/02 ,  H01L21/44

CPC classification number: H05K1/0248 ,  H05K1/181 ,  H05K2201/09236 ,  H05K2201/09418 ,  H05K2201/10689 ,  Y02P70/611

Abstract: Circuit board having a plurality of bus lines (6), which run on the circuit board (1) essentially parallel to a preferred direction of the circuit board (1), and having at least one integrated circuit (3) for the high-speed data processing of data, which integrated circuit is arranged on the circuit board (1), is integrated in a housing (4) having a plurality of housing sides (5) and has a plurality of parallel interfaces for connection to the bus lines (6), in which case the housing sides (5) of the integrated circuits (3) are oriented at an inclination with respect to the preferred direction of the circuit board (2).

Abstract translation: 具有多个总线（6）的电路板，其基本上平行于电路板（1）的优选方向在电路板（1）上延伸，并且具有用于高速的至少一个集成电路（3） 该集成电路布置在电路板（1）上的数据的数据处理集成在具有多个壳体侧面（5）的壳体（4）中，并且具有用于连接到总线（6）的多个并行接口 ），在这种情况下，集成电路（3）的壳体侧（5）相对于电路板（2）的优选方向倾斜。

公开(公告)号：US20070012774A1

公开(公告)日：2007-01-18

申请号：US11482139

申请日：2006-07-07

Applicant: Young-sang Cho ,  Hee-seok Lee

Inventor： Young-sang Cho ,  Hee-seok Lee

IPC: G06K7/00

CPC classification number: H05K1/0216 ,  G02F1/13452 ,  H05K1/118 ,  H05K2201/09236 ,  H05K2201/0969 ,  H05K2201/09781

Abstract: A tape distribution substrate comprises a plurality of distribution lines formed on a base film. In one embodiment, the distribution lines comprise data lines arranged in data line pairs, wherein each data line pair carries a data signal with two different polarities. The distance between the data lines in each data line pair becomes narrower as the data lines extend away from the base film. In another embodiment, the distribution lines comprise power distribution lines, each having a body portion including several holes, and divided into one or more sub-power distribution lines connected to the base film.

Abstract translation: 胶带分配衬底包括形成在基膜上的多个配线。 在一个实施例中，分配线包括以数据线对布置的数据线，其中每个数据线对承载具有两个不同极性的数据信号。 随着数据线远离基膜，每条数据线对中的数据线之间的距离变窄。 在另一个实施例中，分配线包括功率分配线，每个配电线具有包括多个孔的主体部分，并且被分成连接到基膜的一个或多个子配电线。

公开(公告)号：US07152313B2

公开(公告)日：2006-12-26

申请号：US10723414

申请日：2003-11-26

Applicant: Dustin P. Wood ,  Mark E. Thurston ,  Mahadevan Suryakumar

Inventor： Dustin P. Wood ,  Mark E. Thurston ,  Mahadevan Suryakumar

IPC: H05K3/38

CPC classification number: H05K1/0224 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L2924/0002 ,  H05K1/0225 ,  H05K1/0253 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09672 ,  H05K2201/09681 ,  H05K2201/0969 ,  H05K2201/2072 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T156/1309 ,  H01L2924/00

Abstract: In some embodiments, an article of manufacture includes a metal layer and a first dielectric layer in contact with a first face of the metal layer. The article of manufacture also includes a second dielectric layer in contact with a second face of the metal layer. The second face of the metal layer is opposite to the first face of the metal layer. The metal layer may be a continuous sheet having slots formed therein to allow the first and second dielectric layers to adhere to each other by way of the slots.

Abstract translation: 在一些实施例中，制品包括与金属层的第一面接触的金属层和第一电介质层。 制品还包括与金属层的第二面接触的第二电介质层。 金属层的第二面与金属层的第一面相反。 金属层可以是具有形成在其中的槽的连续片，以允许第一和第二电介质层通过槽彼此粘合。

公开(公告)号：US07149092B2

公开(公告)日：2006-12-12

申请号：US10828307

申请日：2004-04-21

Applicant: Daisuke Iguchi

Inventor： Daisuke Iguchi

IPC: H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC classification number: H05K1/0251 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/12042 ,  H05K1/0222 ,  H05K1/0231 ,  H05K1/0245 ,  H05K1/115 ,  H05K1/162 ,  H05K3/3447 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/0949 ,  H05K2201/09636 ,  H05K2201/09663 ,  H05K2201/09809 ,  H05K2201/10689 ,  H05K2201/10734 ,  H01L2924/00 ,  H01L2224/0401

Abstract: In a printed circuit board of the invention, a first signal wiring layer, a first ground layer, a second ground layer and a second signal wiring layer are laminated via an insulating material. A first signal wiring is formed on the first signal wiring layer and a second signal wiring is formed on the second signal wiring layer. The two signal wirings are connected via a first through hole. The conductive first ground layer and the conductive second ground layer are connected via a second through hole. The second through hole is insulated from the first through hole and formed so as to surround the first through hole.

Abstract translation: 在本发明的印刷电路板中，通过绝缘材料层叠第一信号布线层，第一接地层，第二接地层和第二信号布线层。 第一信号布线形成在第一信号布线层上，第二信号布线形成在第二信号布线层上。 两个信号布线通过第一通孔连接。 导电第一接地层和导电第二接地层经由第二通孔连接。 第二通孔与第一通孔绝缘并形成为围绕第一通孔。