公开(公告)号：US20080007932A1

公开(公告)日：2008-01-10

申请号：US11531000

申请日：2006-09-12

Applicant: Yueh-Ming Tung ,  Kuo-Yang Sun ,  Chia-Ming Yang ,  Chung-Lun Lee ,  Jin-Chun Wen ,  Yuan-Wei Liu ,  Wei-Mao Hung

Inventor： Yueh-Ming Tung ,  Kuo-Yang Sun ,  Chia-Ming Yang ,  Chung-Lun Lee ,  Jin-Chun Wen ,  Yuan-Wei Liu ,  Wei-Mao Hung

IPC: H05K9/00

CPC classification number: H05K1/0259 ,  G06K19/07 ,  G06K19/07732 ,  H05K2201/09336 ,  H05K2201/09354 ,  H05K2201/10159

Abstract: A memory card with electrostatic discharge (ESD) protection is provided. The memory card includes a board, a set of contacts, at least one chip and an ESD protection path. The board having a signal path not electrically connected to the edge of the board. The ESD protection path for transmitting ESD current is disposed on the board. Furthermore, a part of the ESD protection path extends to the edge of the board.

Abstract translation: 提供了具有静电放电（ESD）保护的存储卡。 存储卡包括板，一组触点，至少一个芯片和ESD保护路径。 该电路板具有不电连接到电路板边缘的信号路径。 用于传输ESD电流的ESD保护路径配置

公开(公告)号：US20070253177A1

公开(公告)日：2007-11-01

申请号：US11783248

申请日：2007-04-06

Applicant: Masayuki Nibe

Inventor： Masayuki Nibe

IPC: H05K1/18

CPC classification number: H05K1/0231 ,  H05K1/0237 ,  H05K2201/09336

Abstract: A bypass capacitor is arranged at an end of a main surface of a circuit board. More specifically, the bypass capacitor is arranged at the end of the main surface of the circuit board such that conductor pattern is located closer to the end of the circuit board than earth pattern. In this position, an earth pattern and a through hole electrode do not surround an outer side of a power supply line. Arrangement of the bypass capacitor in this position can particularly suppress radiation noises that may emerge from a resonance end surface of the board. Therefore, it is possible to provide a circuit unit, a power supply bias circuit, an LNB and a transmitter capable of suppressing oscillation at a certain frequency that cannot be sufficiently suppressed by a conventional bypass capacitor.

Abstract translation: 旁路电容器布置在电路板的主表面的端部。 更具体地，旁路电容器布置在电路板的主表面的端部处，使得导体图案比接地图案更靠近电路板的端部。 在该位置，地线图案和通孔电极不包围电源线的外侧。 旁路电容器在该位置的布置可以特别地抑制可能从电路板的共振端面出现的辐射噪声。 因此，可以提供一种电路单元，电源偏置电路，LNB和能够抑制由常规旁路电容器不能充分抑制的特定频率的振荡的发射机。

公开(公告)号：US07149092B2

公开(公告)日：2006-12-12

申请号：US10828307

申请日：2004-04-21

Applicant: Daisuke Iguchi

Inventor： Daisuke Iguchi

IPC: H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC classification number: H05K1/0251 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/12042 ,  H05K1/0222 ,  H05K1/0231 ,  H05K1/0245 ,  H05K1/115 ,  H05K1/162 ,  H05K3/3447 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09336 ,  H05K2201/0949 ,  H05K2201/09636 ,  H05K2201/09663 ,  H05K2201/09809 ,  H05K2201/10689 ,  H05K2201/10734 ,  H01L2924/00 ,  H01L2224/0401

Abstract: In a printed circuit board of the invention, a first signal wiring layer, a first ground layer, a second ground layer and a second signal wiring layer are laminated via an insulating material. A first signal wiring is formed on the first signal wiring layer and a second signal wiring is formed on the second signal wiring layer. The two signal wirings are connected via a first through hole. The conductive first ground layer and the conductive second ground layer are connected via a second through hole. The second through hole is insulated from the first through hole and formed so as to surround the first through hole.

Abstract translation: 在本发明的印刷电路板中，通过绝缘材料层叠第一信号布线层，第一接地层，第二接地层和第二信号布线层。 第一信号布线形成在第一信号布线层上，第二信号布线形成在第二信号布线层上。 两个信号布线通过第一通孔连接。 导电第一接地层和导电第二接地层经由第二通孔连接。 第二通孔与第一通孔绝缘并形成为围绕第一通孔。

公开(公告)号：US20060164179A1

公开(公告)日：2006-07-27

申请号：US11290681

申请日：2005-12-01

Applicant: Tatsuya Arai ,  Toshiyuki Takada

Inventor： Tatsuya Arai ,  Toshiyuki Takada

IPC: H03H7/38

CPC classification number: H05K1/116 ,  H01P1/047 ,  H05K1/0216 ,  H05K1/0251 ,  H05K1/114 ,  H05K3/429 ,  H05K2201/0715 ,  H05K2201/09336 ,  H05K2201/09727 ,  H05K2201/10189 ,  H05K2201/10734

Abstract: A multilayer interconnection board (10) comprises a dielectric substrate (11), a through-hole (15), a signal line (12) having a large width section (12A) and a small width section (12B) connected with the through-hole (15), and a ground layer (13, 14). A length L (mm) of the small width section (12B) meets the formula of 0

Abstract translation: 多层互连板（10）包括电介质基板（11），通孔（15），具有大宽度部分（12A）的信号线（12）和与其相连的小宽度部分（12B） 通孔（15）和接地层（13,14）。 小宽度部分（12B）的长度L（mm）满足公式0

公开(公告)号：US20060137903A1

公开(公告)日：2006-06-29

申请号：US11021706

申请日：2004-12-23

Applicant: John Sprietsma ,  Michael Leddige

Inventor： John Sprietsma ,  Michael Leddige

IPC: H05K7/06

CPC classification number: H05K1/0216 ,  H05K1/181 ,  H05K2201/09236 ,  H05K2201/09336 ,  H05K2201/10159

Abstract: In some embodiments a memory module circuit board includes a first layer with a first surface adapted to couple a first plurality of memory devices to the circuit board, and a second layer with a first portion and a second portion, the first portion including a plurality of first signal paths coupled to the first plurality of memory devices and the second portion including a reference voltage plane. Other embodiments are described and claimed.

Abstract translation: 在一些实施例中，存储器模块电路板包括具有适于将第一多个存储器件耦合到电路板的第一表面的第一层和具有第一部分和第二部分的第二层，第一部分包括多个 第一信号路径耦合到第一多个存储器件，第二部分包括参考电压平面。 描述和要求保护其他实施例。

公开(公告)号：US06995629B2

公开(公告)日：2006-02-07

申请号：US10695732

申请日：2003-10-28

Applicant: Shinichi Nishimura

Inventor： Shinichi Nishimura

IPC: H03H7/38 ,  H01P1/16

CPC classification number: H05K1/0246 ,  H01P1/26 ,  H05K1/0231 ,  H05K1/0245 ,  H05K1/181 ,  H05K3/222 ,  H05K2201/09236 ,  H05K2201/09336 ,  H05K2201/10022 ,  H05K2201/10522 ,  H05K2201/10636 ,  Y02P70/611

Abstract: A center-tap termination circuit which includes two resistors having the same resistance, which are serially connected between forward and return transmission lines, where the forward and return transmission lines constitute a differential signal transmission line. A capacitor is connected between a connector that interconnects the two resistors and a GND of 6 a printed circuit board. The forward and return transmission lines are substantially equidistant from each other along their lengths. The resistors and the capacitor are arranged outside the forward and return transmission lines. The connector is provided intersecting, in three-dimensional space, the forward and return transmission lines, such as being formed by a jumper bridging the two lines, or by being formed on a different layer of a multilayer printed circuit board. Variations in the differential impedance are suppressed, and the transmission return/transmission forward characteristics of differential signals are substantially matched. The differential impedance matching is achieved, and high-quality signal waveforms are maintained. Not only noise emitted due to differential mode current components, but also noise emitted due to common mode current components are suppressed.

Abstract translation: 中心抽头终端电路，其包括具有相同电阻的两个电阻，串联连接在正向和返回传输线之间，其中正向和返回传输线构成差分信号传输线。 电容器连接在连接两个电阻器的连接器和印刷电路板的GND之间。 前进和后退传输线沿其长度基本上等距离。 电阻器和电容器布置在正向和返回传输线的外部。 连接器在三维空间中被提供在正向和返回传输线上，例如由跨接两条线的跨接线形成，或者通过形成在多层印刷电路板的不同层上。 抑制差分阻抗的变化，差分信号的发送返回/发送正向特性基本上匹配。 实现了差分阻抗匹配，并保持了高质量的信号波形。 不仅由于差分电流分量而产生的噪声，而且由共模电流分量引起的噪声也被抑制。

公开(公告)号：US06995320B2

公开(公告)日：2006-02-07

申请号：US10676732

申请日：2003-09-30

Applicant: Takeshi Kusakabe ,  Isao Ozawa

Inventor： Takeshi Kusakabe ,  Isao Ozawa

IPC: H05K1/00

CPC classification number: H01L24/06 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/522 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/06136 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01067 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K1/114 ,  H05K2201/0715 ,  H05K2201/09336 ,  H05K2201/10734 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A wiring board includes an insulating board defined by a first surface and a second surface opposing to the first surface; first signal strips disposed on the first surface; a first power distribution plane provided on the first surface so as to occupy a residual area of the first signal strips; lands disposed on the second surface; via metals penetrating the insulating board so as to connect the lands to the corresponding first signal strips; a second power distribution plane provided on the second surface.

Abstract translation: 布线板包括由第一表面和与第一表面相对的第二表面限定的绝缘板; 设置在第一表面上的第一信号条; 设置在所述第一表面上以占据所述第一信号条的剩余区域的第一配电平面; 设置在第二表面上的地面; 通过穿过绝缘板的金属，以将焊盘连接到相应的第一信号条; 设置在第二表面上的第二配电平面。

公开(公告)号：US20050194168A1

公开(公告)日：2005-09-08

申请号：US10794491

申请日：2004-03-05

Applicant: Samuel Tonomura ,  Terry Cisco ,  Clinton Holter

Inventor： Samuel Tonomura ,  Terry Cisco ,  Clinton Holter

IPC: H01L23/00 ,  H01L23/14 ,  H01L23/498 ,  H01L23/50 ,  H01L23/552 ,  H01L23/66 ,  H05K1/02 ,  H05K1/03 ,  H05K1/09 ,  H05K9/00

CPC classification number: H01L23/552 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/66 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/81801 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/3025 ,  H01P1/2005 ,  H05K1/0236 ,  H05K1/0306 ,  H05K1/09 ,  H05K2201/0715 ,  H05K2201/09336 ,  H05K2201/09681 ,  H01L2924/00

Abstract: A hybrid assembly having improved cross talk characteristics includes a substrate having an upper surface. Conductive paths on the upper surface are provided for conducting high frequency signals. Regular polygons made of an electromagnetic band gap (EBG) material having slow wave characteristics are deposited on the upper surface and form a lattice for tessellating the upper surface. Each of the polygons has a periphery. The polygons are separated along their periphery from adjacent polygons by an interspace and are covered with an insulating material. Second polygons, also made of an electromagnetic band gap material, are deposited over the insulating material. Semiconductor structures are mounted over the second polygons. The semiconductor structures have a plurality of electrical contacts with the conductive paths. The regular polygons can be hexagons, triangles, octagons or any other combination that forms a lattice and can be printed onto the substrate.

Abstract translation: 具有改进的串扰特性的混合组件包括具有上表面的基板。 设置上表面的导电路径用于传导高频信号。 由具有慢波特性的电磁带隙（EBG）材料制成的常规多边形沉积在上表面上并形成用于镶嵌上表面的格子。 每个多边形都有一个周边。 多边形沿其周边与邻近的多边形间隔开并用绝缘材料覆盖。 也由电磁带隙材料制成的第二多边形沉积在绝缘材料上。 半导体结构安装在第二多边形上。 半导体结构具有多个与导电路径的电接触。 正多边形可以是六边形，三角形，八边形或形成网格并可以印刷到基底上的任何其他组合。

公开(公告)号：US20050051846A1

公开(公告)日：2005-03-10

申请号：US10933670

申请日：2004-09-03

Applicant: Joun Hee Lee

Inventor： Joun Hee Lee

IPC: H04B1/38 ,  H05K1/00 ,  H05K1/02 ,  G02F1/136

CPC classification number: H05K1/0218 ,  H05K1/0259 ,  H05K1/0298 ,  H05K2201/0723 ,  H05K2201/09336 ,  H05K2201/10136

Abstract: Disclosed is a multi-layered PCB of mobile communication terminals that may improve ESD protection of LCD through efficiently protecting LCD signal lines such as data lines and control lines from ESD. According to the present invention, the efficient arrangement of GND regions around the LCD signal lines improve ESD features of sub-LCD and main-LCD and reduce defects by ESD, so that reliability of mobile communication terminals may be improved and the mobile communication terminals may stably operate against unexpected situation. Accordingly, it is possible to improve quality of mobile communication terminals and to reduce manufacturing cost due to efficient PCB arrangement.

Abstract translation: 公开了移动通信终端的多层PCB，其可以通过有效地保护诸如数据线和控制线的LCD信号线免受ESD来改善LCD的ESD保护。 根据本发明，LCD信号线周围的GND区域的有效布置改善了s​​ub-LCD和主LCD的ESD特征，并且通过ESD减少缺陷，从而可以提高移动通信终端的可靠性，并且移动通信终端 稳定运行，防止意外情况。 因此，可以提高移动通信终端的质量，并且由于有效的PCB布置而降低制造成本。

公开(公告)号：US06807065B2

公开(公告)日：2004-10-19

申请号：US10615378

申请日：2003-07-09

Applicant: Masahiro Sato

Inventor： Masahiro Sato

IPC: H05K702

CPC classification number: H05K1/0222 ,  H01P1/047 ,  H05K1/0237 ,  H05K1/0251 ,  H05K1/115 ,  H05K3/429 ,  H05K2201/09336 ,  H05K2201/09618 ,  H05K2201/09718 ,  H05K2201/09809 ,  Y10T428/24802 ,  Y10T428/24917

Abstract: A multilayer PCB has first and second signal transmission lines and first and second ground layers. A signal via is connected between the first and second transmission lines. Ground vias extending parallel to the signal via are connected between the first and second ground layers. The end of the first ground layer protrudes with respect to the second ground layer and extends nearer to the signal via than the second ground layer. Thus, it is possible to stabilize the characteristic impedance of the first transmission line.

Abstract translation: 多层PCB具有第一和第二信号传输线以及第一和第二接地层。 信号通孔连接在第一和第二传输线之间。 平行于信号通孔延伸的接地通孔连接在第一和第二接地层之间。 第一接地层的端部相对于第二接地层突出，并且比第二接地层更靠近信号通路延伸。 因此，可以稳定第一传输线的特性阻抗。