公开(公告)号：US06569708B2

公开(公告)日：2003-05-27

申请号：US09847607

申请日：2001-05-02

Applicant: Tomohiro Kawashima

Inventor： Tomohiro Kawashima

IPC: H01L2144

CPC classification number: H01L21/568 ,  H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/13 ,  H01L2221/68377 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2924/0001 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/014 ,  H05K3/062 ,  H05K3/3436 ,  H05K2201/0338 ,  H05K2201/1025 ,  H05K2201/10977 ,  H05K2203/0384 ,  Y02P70/613

Abstract: First, there are prepared a semiconductor chip with a group of solder bumps disposed on and joined to a surface thereof in a predetermined pattern, and a multilayer plate including a second layer as an electrically conductive layer and first and third layers disposed on respective opposite surfaces of the second layer and comprising metal layers of one metal. Then, the first layer and the third layer of the multilayer plate are etched in a predetermined pattern to form a first group of posts and a second group of posts which have a pattern identical to the pattern of the group of solder bumps. Then, semiconductor chip is positioned to hold the solder bumps in contact with the posts of the first group, and the solder bumps are melted to join the solder bumps to the posts of the first group. Thereafter, the second layer is cut between the posts of the first and second groups, producing separate multilayer posts.

Abstract translation: 首先，准备具有以规定图案配置在其表面上并与其接合的一组焊料凸块的半导体芯片，以及包括作为导电层的第二层的多层板和设置在相应的相对表面上的第一和第三层 的第二层并且包括一种金属的金属层。 然后，以预定图案蚀刻多层板的第一层和第三层，以形成具有与该组焊料组的图案相同的图案的第一组柱和第二组柱。 然后，将半导体芯片定位成保持与第一组的柱接触的焊料凸块，并且焊料凸块熔化以将焊料凸块接合到第一组的柱。 此后，在第一组和第二组的柱之间切割第二层，产生单独的多层柱。

公开(公告)号：US06335495B1

公开(公告)日：2002-01-01

申请号：US09343073

申请日：1999-06-29

Applicant: Donald S. Farquhar ,  Edmond O. Fey ,  Elizabeth F. Foster ,  Michael J. Klodowski

Inventor： Donald S. Farquhar ,  Edmond O. Fey ,  Elizabeth F. Foster ,  Michael J. Klodowski

IPC: H01K111

CPC classification number: H05K3/4641 ,  H05K1/0224 ,  H05K3/064 ,  H05K3/388 ,  H05K2201/015 ,  H05K2201/0338

Abstract: An electrical structure, comprising a first dielectric layer, a patterned layer on the first dielectric layer, and a second dielectric layer on the patterned layer. The patterned layer includes a metal pattern on the first dielectric layer, a metallic pattern on the metal pattern, and a plugged pattern within a remaining space of the patterned layer. The plugged pattern includes a dielectric material. The second dielectric layer is adhesively bonded to a top surface of the patterned layer. The second dielectric layer includes the dielectric material.

Abstract translation: 电结构，包括第一电介质层，第一电介质层上的图案化层和图案化层上的第二电介质层。 图案化层包括在第一介电层上的金属图案，金属图案上的金属图案，以及图案化层的剩余空间内的堵塞图案。 堵塞图案包括电介质材料。 第二电介质层粘合到图案化层的顶表面上。 第二电介质层包括电介质材料。

公开(公告)号：US06248247B1

公开(公告)日：2001-06-19

申请号：US09203146

申请日：1998-12-01

Applicant: Lakhi Nandlal Goenka ,  Mohan R. Paruchuri

Inventor： Lakhi Nandlal Goenka ,  Mohan R. Paruchuri

IPC: H01B1300

CPC classification number: H05K3/4685 ,  H05K3/06 ,  H05K3/062 ,  H05K3/20 ,  H05K2201/0338 ,  H05K2201/0361 ,  H05K2203/0152 ,  H05K2203/0361

Abstract: There is disclosed herein a multilayer circuit board having air bridge crossover structures and a subtractive method for producing the same, wherein the circuit includes specially designed metallic fortifying layers which provide mechanical and/or electrical fortification to the circuit.

Abstract translation: 这里公开了具有空气桥交叉结构的多层电路板及其制造方法，其中电路包括为电路提供机械和/或电气设防的专门设计的金属防腐层。

公开(公告)号：US5989443A

公开(公告)日：1999-11-23

申请号：US943662

申请日：1997-10-03

Applicant: Kathleen Lorraine Covert ,  Lisa Jeanine Jimarez ,  Krystyna Waleria Semkow

Inventor： Kathleen Lorraine Covert ,  Lisa Jeanine Jimarez ,  Krystyna Waleria Semkow

IPC: C23F1/28 ,  C23F1/44 ,  H05K3/06 ,  H05K3/44 ,  C23F1/00 ,  H05K3/00

CPC classification number: C23F1/44 ,  C23F1/28 ,  H05K3/44 ,  H05K2201/0338 ,  H05K2203/0361 ,  H05K3/062 ,  H05K3/067

Abstract: The present invention provides a novel method of etching nickle/iron alloy which employs a novel etchant. The novel etchant, which etches nickle/iron alloy but not copper, comprises an aqueous solution of ferric ammonium sulfate, and an acid selected from the group consisting of: sulfuric acid; phosphoric acid; and mixtures thereof.

Abstract translation: 本发明提供一种采用新颖蚀刻剂的蚀刻镍/铁合金的新方法。 蚀刻镍/铁合金而不是铜的新颖蚀刻剂包括硫酸亚铁铵的水溶液和选自硫酸的酸; 磷酸; 及其混合物。

公开(公告)号：US5560840A

公开(公告)日：1996-10-01

申请号：US359218

申请日：1994-12-19

Applicant: Kathleen L. Covert ,  Lisa J. Jimarez ,  Krystyna W. Semkow

Inventor： Kathleen L. Covert ,  Lisa J. Jimarez ,  Krystyna W. Semkow

IPC: C23F1/28 ,  C23F1/44 ,  H05K3/06 ,  H05K3/44 ,  C23F1/00

CPC classification number: C23F1/44 ,  C23F1/28 ,  H05K3/44 ,  H05K2201/0338 ,  H05K2203/0361 ,  H05K3/062 ,  H05K3/067

Abstract: The present invention provides a novel method of etching nickle/iron alloy which employs a novel etchant. The novel etchant, which etches nickle/iron alloy but not copper, comprises an aqueous solution of ferric ammonium sulfate, and an acid selected from the group consisting of: sulfuric acid; phosphoric acid; and mixtures thereof.

公开(公告)号：US5474798A

公开(公告)日：1995-12-12

申请号：US296706

申请日：1994-08-26

Applicant: Gary B. Larson ,  Donna Kologe ,  Cynthia Retallick ,  Jon Bengston

Inventor： Gary B. Larson ,  Donna Kologe ,  Cynthia Retallick ,  Jon Bengston

IPC: H05K1/09 ,  H05K3/06 ,  H05K3/10 ,  H05K3/24 ,  H05K3/28 ,  H05K3/42 ,  B05D1/32

CPC classification number: H05K3/244 ,  H05K3/062 ,  H05K3/108 ,  H05K3/427 ,  H05K1/09 ,  H05K2201/0338 ,  H05K2201/0344 ,  H05K2201/0355 ,  H05K2203/0571 ,  H05K2203/072 ,  H05K3/243 ,  H05K3/28 ,  H05K3/282 ,  H05K3/422

Abstract: The present invention relates to a process for the manufacture of printed circuit boards. The method contemplates the use of electroless nickel as the primary medium for interconnection, for building circuitry to the desired thickness and as an etch resist. The method is particularly versatile in reducing the number of steps and variety of chemicals currently necessary to produce these circuit boards.

Abstract translation: 本发明涉及印刷电路板的制造方法。 该方法考虑使用无电镀镍作为用于互连的主要介质，用于将电路构建为期望的厚度和作为抗蚀剂。 该方法在减少生产这些电路板当前所需的步骤和各种化学品的数量方面是特别通用的。

公开(公告)号：US5363553A

公开(公告)日：1994-11-15

申请号：US98085

申请日：1993-07-27

Applicant: Robert D. Edwards ,  Frank D. Egitto ,  Thomas P. Gall ,  Paul S. Gursky ,  David E. Houser ,  James S. Kamperman ,  Warren R. Wrenner

Inventor： Robert D. Edwards ,  Frank D. Egitto ,  Thomas P. Gall ,  Paul S. Gursky ,  David E. Houser ,  James S. Kamperman ,  Warren R. Wrenner

IPC: H05K3/00 ,  H05K3/44 ,  H01K3/10

CPC classification number: H05K3/44 ,  H05K2201/0338 ,  H05K2201/068 ,  H05K2203/0323 ,  H05K2203/0361 ,  H05K2203/0369 ,  H05K3/0047 ,  H05K3/445 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: Disclosed is a method of producing vias and through holes through a metal laminate. The laminate is a multi-layer, for example, a trilayer of a relatively hard metal between two layers of a relatively soft metal. The method includes the steps of first etching a clearance hole through the soft metal on one side of the trilayer laminate, followed by partially etching the hard metal layer. Next, drilling the remaining thickness of the hard metal, and drilling through the second layer of soft metal.

Abstract translation: 公开了一种通过金属层压体制造通孔和通孔的方法。 层压体是多层，例如，两层相对软的金属之间的相对硬的金属的三层。 该方法包括以下步骤：首先蚀刻穿过三层层压体一侧的软金属的间隙孔，然后部分蚀刻硬质金属层。 接下来，钻出硬质金属的剩余厚度，并穿过第二层软金属。

公开(公告)号：US5196819A

公开(公告)日：1993-03-23

申请号：US855747

申请日：1992-03-23

Applicant: Joseph A. Roberts

Inventor： Joseph A. Roberts

IPC: H01H69/02 ,  H01H85/00 ,  H01H85/046 ,  H01H85/43 ,  H05K1/00 ,  H05K1/02 ,  H05K1/18 ,  H05K3/28

CPC classification number: H01H85/046 ,  H05K1/0293 ,  H01H69/022 ,  H01H85/0056 ,  H01H85/43 ,  H05K1/0203 ,  H05K1/0271 ,  H05K1/0393 ,  H05K1/189 ,  H05K2201/0305 ,  H05K2201/0338 ,  H05K2201/09781 ,  H05K2201/10181 ,  H05K3/281 ,  Y10T29/49107

Abstract: A fusible printed circuit includes one or more conductors extending along a dielectric substrate. The circuit can be flexible or rigid. Each conductor is comprised of a layer of electrically conductive material and has one or more gaps formed in the conductive layer at locations opposite a segment of the fusible material so that electrical current flowing through each conductor is required to pass, in its entirety, through the segment of fusible material at the location of each gap in the layer of conductive material. The integral fuses are designed to specific electrical parameters and may be located randomly along circuit runs. The fusible material is cold welded to the conductors at the gaps. Pressure concentrators support the fuses and minimize motion stress on the fuses. The fuses can be sealed within a protective overlay which captures debris when the fuses are blown and controlled venting of the debris can also be provided. The use of such a circuit to incorporate a variety of fuses having different fuse ratings into the conductive paths of a printed circuit is also disclosed, as are methods of making fusible flexible circuits.

Abstract translation: 易熔印刷电路包括沿着电介质基片延伸的一个或多个导体。 电路可以是柔性的或刚性的。 每个导体由一层导电材料组成，并且在导电层中形成的一个或多个间隙在与易熔材料的片段相对的位置处，使得流过每个导体的电流需要通过整个通过 在导电材料层中的每个间隙的位置处的可熔材料的段。 集成保险丝设计为特定的电气参数，可以沿电路随机定位。 可熔材料在间隙处被冷焊到导体上。 压力调节器支持保险丝，并使保险丝上的运动应力最小化。 保险丝可以在保护层内密封，当保险丝熔断时可以捕获碎屑，同时也可以控制碎屑的排放。 还公开了使用这种电路将具有不同熔丝额定值的各种熔丝结合到印刷电路的导电路径中，以及制造易熔柔性电路的方法。

公开(公告)号：US5179501A

公开(公告)日：1993-01-12

申请号：US840247

申请日：1992-02-24

Applicant: Alfred G. Ocken ,  Nathan A. Unterman ,  Timothy S. Fisher ,  Michael I. Petrites

Inventor： Alfred G. Ocken ,  Nathan A. Unterman ,  Timothy S. Fisher ,  Michael I. Petrites

IPC: H05K1/00 ,  H05K1/18 ,  H05K3/00 ,  H05K5/00

CPC classification number: H05K1/0278 ,  H05K3/0061 ,  H05K5/003 ,  H05K1/189 ,  H05K2201/0338 ,  H05K2201/09109 ,  H05K2201/10189 ,  H05K2203/302

Abstract: An electronic module assembly includes a relatively thin, bendable base plate having at least one bend axis along which the base plate is bent over on itself to provide an enclosure. An inner surface of the base plate supports at least one, and preferably two, relatively thicker metal plates, one on each side of the bend axis, each metal plate acting as a heatsink for circuit components mounted thereon.

公开(公告)号：US4921054A

公开(公告)日：1990-05-01

申请号：US278295

申请日：1988-10-21

Applicant: Forrest L. Voss ,  Donald R. Witherell

Inventor： Forrest L. Voss ,  Donald R. Witherell

IPC: H05K3/42 ,  H05K3/44 ,  H05K3/46

CPC classification number: H05K3/44 ,  H05K3/429 ,  H05K3/4641 ,  H05K2201/0338 ,  H05K2201/0347 ,  H05K2201/068 ,  H05K2201/09554 ,  H05K2203/0323 ,  H05K2203/0361 ,  H05K2203/0384 ,  H05K2203/061 ,  H05K3/445 ,  Y10T29/49155

Abstract: A multi-layered printing wiring board and a method for manufacture where the multi-layered printing wiring board has a thermal expansion controller Copper-Invar-Copper core therein with portions of the invar core therein with portions of the Invar being selectively removed and replaced with superior materials for plating conductive material there to and further having a reduced coefficient of thermal conductivity by providing for a noble metal layer to be selectively deposited on pre-determined positions on the Copper-Invar-Copper core thereby selectively etching portions of the copper and Invar up to the noble metal layer and thereby providing for selectively removing the Invar and replacing it with a laminant material.

Abstract translation: 一种多层印刷布线板及其制造方法，其中多层印刷布线板具有热膨胀控制器铜 - 铜 - 铜芯，其中包含Invar核心的部分，其中部分Invar被选择性地去除并且被 通过提供选择性地沉积在铜 - 铜 - 铜芯上的预定位置上的贵金属层，并且进一步具有降低的导热系数的优异材料，从而选择性地蚀刻铜和Invar的部分 直到贵金属层，从而提供选择性地去除殷钢并用层压材料代替它。