Abstract:
The present invention relates to a high density circuit board for increasing the density of a circuit by impregnating fine circuit patterns inside a top part of a substrate, and a method for manufacturing the same.In accordance with the present invention, a high density circuit board includes a substrate with fine circuit patterns impregnated inside top and bottom parts; a via formed inside the substrate to electrically conduct the fine circuit patterns of the top and bottom parts of the substrate each other; pads formed on the fine circuit patterns of the top part of the substrate; and solder resists formed on the top and bottom parts of the substrate, which can convert the circuit patterns into fine pitches and increase the degree of close adhesion between the substrate and the circuit patterns, thereby improving reliability.
Abstract:
Disclosed is a PCB including an embedded passive component and a method of fabricating the same. The PCB includes at least two circuit layers in which circuit patterns are formed. At least one insulating layer is interposed between the circuit layers. A pair of terminals is vertically formed through the insulating layers, plated with a first conductive material, and separated from each other by a predetermined distance. The embedded passive component is interposed between the terminals and has electrodes formed on both sides thereof. The electrodes are separated from the terminals by a predetermined distance and electrically connected to the terminals through a second conductive material.
Abstract:
A printed circuit board, which increases the contact area between an IC and a printed circuit board, thus increasing the degree of adhesion, is disclosed. The printed circuit board includes: an insulation layer which includes a first circuit pattern, including at least one via land, embedded in the upper surface of the insulation layer to be flush with the upper surface, and a second circuit pattern formed in the lower surface of the insulation layer to be flush with the lower surface; a solder resist layer formed on the insulation layer; a via hole and a bump integrally formed on the second circuit pattern through the via hole and the via land such that it protrudes from the insulation layer to be higher than the solder resist layer.
Abstract:
A method of manufacturing a printed circuit board having a buried solder bump, including: preparing a carrier on which a circuit layer, a solder bump, and a circuit pattern formed on the solder bump are formed; pressing the carrier into an insulating layer so that the circuit layer, the solder bump and the circuit pattern are buried in the insulating layer; and removing the carrier.
Abstract:
There is provided a printed circuit board. The printed circuit board may be configured to include: a core layer in which a bending prevention portion of at least two layers is interposed between a plurality of insulating members and includes metal layers having different thermal expansion coefficients is disposed; a circuit pattern that is formed so as to have a desired pattern on at least one of the inside of the core layer and an outer face of the core layer; and an insulating layer that is formed on the core layer and includes an opening portion that exposes the circuit pattern, and a method of manufacturing the printed circuit board. According to the above-described printed circuit board and the method of manufacturing the printed circuit board, by disposing a bending prevention portion inside the printed circuit board, a printed circuit board capable of improving the progress rate and the productivity and a method of manufacturing the printed circuit board can be provided.
Abstract:
A carrier member for transmitting circuits, which is a component of a coreless printed circuit board having circuit patterns embedded therein, and which can be used to provide a high-density and highly reliable printed circuit board by forming protrusions only on the lower ends of the circuit patterns, a coreless printed circuit board using the carrier member, and methods of manufacturing the carrier member and the coreless printed circuit board.
Abstract:
A method of manufacturing a printed circuit board having a buried solder bump, including: preparing a carrier on which a circuit layer, a solder bump, and a circuit pattern formed on the solder bump are formed; pressing the carrier into an insulating layer so that the circuit layer, the solder bump and the circuit pattern are buried in the insulating layer; and removing the carrier.
Abstract:
Provided are a printed circuit board (PCB), and a manufacturing method thereof. The PCB includes a stacked structure including second and third insulation layers with a first insulation layer interposed therebetween, and a conductive via having first to fourth conductive vias. A second-layer circuit pattern and a third-layer circuit pattern are buried in the first insulation layer, a first-layer circuit pattern is formed on the second insulation layer, and a fourth-layer circuit pattern is formed on the third insulation layer. A first conductive via connects the first-layer circuit pattern and the second-layer circuit pattern, a second conductive via connects the first-layer circuit pattern and the third-layer circuit pattern, a third conductive via connects the second-layer circuit pattern and the fourth-layer circuit pattern, and a fourth conductive via connects the third-layer circuit pattern and the fourth-layer circuit pattern.
Abstract:
The invention relates to a carrier used in the manufacture of a substrate and a method of manufacturing a substrate using the carrier, the method including (A) preparing a carrier comprising a releasing layer, and insulating layers and metal layers sequentially disposed on both sides of the releasing layer; (B) patterning the metal layers to form base circuit layers; (C) forming buildup layers on the base circuit layers; (D) executing a routing process to separate the insulating layers from the releasing layer; and (E) forming solder-resist layers on the buildup layers and forming openings in-the solder-resist layers and the insulating layers to expose pads.
Abstract:
A method for manufacturing a substrate having a cavity which includes forming a barrier around a predetermined area where the cavity is to be formed on a copper foil laminated master, an internal circuit formed in the copper foil laminated master; coating a thermosetting material in the area where the cavity is to be formed; laminating a dielectric layer and a copper foil layer on the copper foil laminated master, on which the thermosetting material is coated; pressing the laminated dielectric layer and copper foil layer using a press plate, on which a protruded part is formed in an area corresponding to the area where the cavity is to be formed; forming an external circuit pattern in the upper part of the laminated dielectric layer; and dissolving the coated thermosetting material using a solvent and forming the cavity.