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21.发明申请公开(公告)号：US20090283416A1
公开(公告)日：2009-11-19
申请号：US12295321
申请日：2007-04-20
Applicant: Hans-Joachim Quenzer , Gerfried Zwicker
Inventor： Hans-Joachim Quenzer , Gerfried Zwicker
CPC classification number: B23H3/00 , B81C1/00634 , B81C2201/0146 , C25F3/14
Abstract: Disclosed is a method of treating the surface of an electrically conducting substrate surface wherein a tool comprising an ion-conducting solid material is brought into contact at least in some areas with the substrate surface, the tool is able to conduct the metal ions of the substrate and an electric potential is applied so that an electric potential gradient is applied between the substrate surface and the tool in such a manner that metal ions are drawn from the substrate surface or deposited onto the substrate surface by means of the tool.
Abstract translation: 公开了一种处理导电衬底表面的方法，其中包括离子导电固体材料的工具至少在一些区域与衬底表面接触，该工具能够传导衬底的金属离子 并且施加电位使得在衬底表面和工具之间施加电势梯度，使得金属离子从衬底表面被拉出或通过该工具沉积到衬底表面上。
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22.发明授权Methods of forming void regions, dielectric regions and capacitor constructions 有权形成空隙区域，电介质区域和电容器结构的方法公开(公告)号：US06902984B2
公开(公告)日：2005-06-07
申请号：US10827933
申请日：2004-04-19
Applicant: Jerome Michael Eldridge
Inventor： Jerome Michael Eldridge
IPC: B81B3/00 , H01L21/02 , H01L21/311 , H01L21/20
CPC classification number: B81C1/00119 , B81B2203/0315 , B81B2203/0338 , B81C1/00047 , B81C2201/0109 , B81C2201/0146 , H01L21/31138 , H01L28/40
Abstract: In one aspect, the invention includes a method of forming a void region associated with a substrate, comprising: a) providing a substrate; b) forming a sacrificial mass over the substrate; c) subjecting the mass to hydrogen to convert a component of the mass to a volatile form; and d) volatilizing the volatile form of the component from the mass to leave a void region associated with the substrate. In another aspect, the invention includes a method of forming a capacitor construction, comprising: a) forming a first capacitor electrode over a substrate; b) forming a sacrificial material proximate the first capacitor electrode; c) forming a second capacitor electrode proximate the sacrificial material, the second capacitor electrode being separated from the first capacitor electrode by the sacrificial material, at least one of the first and second electrodes being a metal-comprising layer; and d) subjecting the sacrificial material to conditions which transport a component from the sacrificial material to the metal-comprising layer, the transported component leaving a void region between the first and second capacitor electrodes.
Abstract translation: 一方面，本发明包括形成与衬底相关联的空隙区域的方法，包括：a）提供衬底; b）在衬底上形成牺牲物质; c）使所述物质经受氢气将所述物质的组分转化为挥发性形式; 以及d）从所述物质挥发所述组分的挥发性形式以留下与所述基材相关联的空隙区域。 另一方面，本发明包括一种形成电容器结构的方法，包括：a）在衬底上形成第一电容器电极; b）在第一电容器电极附近形成牺牲材料; c）在所述牺牲材料附近形成第二电容器电极，所述第二电容器电极通过所述牺牲材料与所述第一电容器电极分离，所述第一和第二电极中的至少一个是含金属的层; 以及d）对所述牺牲材料进行将组分从所述牺牲材料输送到所述含金属层的条件，所述传输部件在所述第一和第二电容器电极之间留下空隙区域。
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公开(公告)号：US20040198016A1
公开(公告)日：2004-10-07
申请号：US10827933
申请日：2004-04-19
Inventor： Jerome Michael Eldridge
IPC: H01L021/20 , H01L021/76
CPC classification number: B81C1/00119 , B81B2203/0315 , B81B2203/0338 , B81C1/00047 , B81C2201/0109 , B81C2201/0146 , H01L21/31138 , H01L28/40
Abstract: In one aspect, the invention includes a method of forming a void region associated with a substrate, comprising: a) providing a substrate; b) forming a sacrificial mass over the substrate; c) subjecting the mass to hydrogen to convert a component of the mass to a volatile form; and d) volatilizing the volatile form of the component from the mass to leave a void region associated with the substrate. In another aspect, the invention includes a method of forming a capacitor construction, comprising: a) forming a first capacitor electrode over a substrate; b) forming a sacrificial material proximate the first capacitor electrode; c) forming a second capacitor electrode proximate the sacrificial material, the second capacitor electrode being separated from the first capacitor electrode by the sacrificial material, at least one of the first and second electrodes being a metal-comprising layer; and d) subjecting the sacrificial material to conditions which transport a component from the sacrificial material to the metal-comprising layer, the transported component leaving a void region between the first and second capacitor electrodes.
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24.发明授权Methods for forming void regions, dielectric regions and capacitor constructions 有权形成空隙区域，电介质区域和电容器结构的方法公开(公告)号：US06667219B1
公开(公告)日：2003-12-23
申请号：US09651815
申请日：2000-08-30
Applicant: Jerome Michael Eldridge
Inventor： Jerome Michael Eldridge
IPC: H01L2120
CPC classification number: B81C1/00119 , B81B2203/0315 , B81B2203/0338 , B81C1/00047 , B81C2201/0109 , B81C2201/0146 , H01L21/31138 , H01L28/40
Abstract: In one aspect, the invention includes a method of forming a void region associated with a substrate, comprising: a) providing a substrate; b) forming a sacrificial mass over the substrate; c) subjecting the mass to hydrogen to convert a component of the mass to a volatile form; and d) volatilizing the volatile form of the component from the mass to leave a void region associated with the substrate. In another aspect, the invention includes a method of forming a capacitor construction, comprising: a) forming a first capacitor electrode over a substrate; b) forming a sacrificial material proximate the first capacitor electrode; c) forming a second capacitor electrode proximate the sacrificial material, the second capacitor electrode being separated from the first capacitor electrode by the sacrificial material, at least one of the first and second electrodes being a metal-comprising layer; and d) subjecting the sacrificial material to conditions which transport a component from the sacrificial material to the metal-comprising layer, the transported component leaving a void region between the first and second capacitor electrodes.
Abstract translation: 一方面，本发明包括形成与衬底相关联的空隙区域的方法，包括：a）提供衬底; b）在衬底上形成牺牲物质; c）使所述物质经受氢气将所述物质的组分转化为挥发性形式; 以及d）从所述物质挥发所述组分的挥发性形式以留下与所述基材相关联的空隙区域。 另一方面，本发明包括一种形成电容器结构的方法，包括：a）在衬底上形成第一电容器电极; b）在第一电容器电极附近形成牺牲材料; c）在所述牺牲材料附近形成第二电容器电极，所述第二电容器电极通过所述牺牲材料与所述第一电容器电极分离，所述第一和第二电极中的至少一个是含金属的层; 以及d）对所述牺牲材料进行将组分从所述牺牲材料输送到所述含金属层的条件，所述传输部件在所述第一和第二电容器电极之间留下空隙区域。
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公开(公告)号：US20020045287A1
公开(公告)日：2002-04-18
申请号：US09881744
申请日：2001-06-18
Applicant: RANDOX LABORATORIES LIMITED
Inventor： Harold S. Gamble , S.J. Neil Mitchell , Andrzej Prochaska , Stephen Peter Fitzgerald
IPC: H01L021/00
CPC classification number: B81C1/00158 , B41J2/16 , B41J2/1623 , B41J2/1628 , B41J2/1632 , B41J2/1639 , B81B2203/0315 , B81C2201/0115 , B81C2201/0146
Abstract: A method of manufacturing a diaphragm utilizing a precision grinding technique after etching a cavity in a wafer. A technique for preventing distortion of the diaphragm based on use of a sacrificial layer of porous silicon is disclosed.
Abstract translation: 在蚀刻晶片中的空腔之后利用精密研磨技术制造隔膜的方法。 公开了一种基于使用多孔硅牺牲层防止隔膜变形的技术。
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Patent Agency Ranking
公开(公告)号：US20240351865A1
公开(公告)日：2024-10-24
申请号：US18622059
申请日：2024-03-29
Applicant: Xintec Inc.
Inventor： Jiun-Yen LAI , Wei-Luen SUEN , Ming-Chung CHUNG , Chih-Wei LIU
IPC: B81C1/00
CPC classification number: B81C1/00825 , B81C2201/013 , B81C2201/0143 , B81C2201/0146 , B81C2201/0159
Abstract: A manufacturing method of a micro electro mechanical system (MEMS) device includes forming a buffer protection layer on a semiconductor structure, wherein the semiconductor structure includes a wafer, a MEMS membrane, and an isolation layer between the wafer and the MEMS membrane, and the buffer protection layer is located in a slit of the MEMS membrane and on a surface of the MEMS membrane facing away from the isolation layer; etching the wafer to form a cavity such that a portion of the isolation layer is exposed though the cavity; etching the portion of the isolation layer; and removing the buffer protection layer.
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公开(公告)号：US20240059555A1
公开(公告)日：2024-02-22
申请号：US17766780
申请日：2020-08-24
Applicant: HAMAMATSU PHOTONICS K.K.
Inventor： Daiki SUZUKI , Takahiro MATSUMOTO , Tomoyuki IDE , Mikito TAKAHASHI
CPC classification number: B81C1/00825 , G02B26/0833 , B81C2201/0146 , B81C2201/0132
Abstract: A method for manufacturing a mirror device, the method includes a first step of preparing a wafer having a support layer and a device layer; a second step of forming a slit in the wafer such that the movable portion becomes movable with respect to the base portion by removing a part of each of the support layer and the device layer from the wafer by etching and forming a plurality of parts each corresponding to the structure in the wafer, after the first step; a third step of performing wet cleaning for cleaning the wafer using a cleaning liquid after the second step; and a fourth step of cutting out each of the plurality of parts from the wafer after the third step. In the second step, a circulation hole penetrating the wafer is formed at a part other than the slit in the wafer by the etching.
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公开(公告)号：US11886122B2
公开(公告)日：2024-01-30
申请号：US17357666
申请日：2021-06-24
Inventor： Jung-Hun Seo , Yixiong Zheng , Matthias Muehle
CPC classification number: G03F7/36 , C23C14/04 , C23C14/06 , C23C14/5873 , B81C2201/0146
Abstract: A method comprising providing a carbonaceous material, the substrate having a first thermal conductivity. The method further comprises depositing a first masking layer having a second thermal conductivity on at least a portion of the substrate, a ratio of the second thermal conductivity to the first thermal conductivity being less than or equal to 1:30. The method further comprises depositing a second masking layer on the first masking layer to form an etch mask, and etching an exposed portion of the substrate.
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公开(公告)号：US11772963B2
公开(公告)日：2023-10-03
申请号：US17524140
申请日：2021-11-11
Inventor： Chih-Hang Chang , I-Shi Wang , Jen-Hao Liu
CPC classification number: B81C1/00238 , B81C1/00269 , B81C1/00888 , B81C3/005 , B81C2201/013 , B81C2201/0143 , B81C2201/0146 , B81C2203/035
Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first substrate including a first face and a second face opposite the first face. A second substrate is bonded to the first face of the first substrate such that the second face of the first substrate faces away from the second substrate. One or more recesses are arranged in the second face of the first substrate and are configured to compensate for thermal expansion or thermal contraction.
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公开(公告)号：US20170233891A1
公开(公告)日：2017-08-17
申请号：US15519220
申请日：2015-10-15
Applicant: The University of Melbourne
Inventor： Afaq Habib Piracha , Steven Prawer , Kumaravelu Ganesan , Snjezana Tomljenovic-Hanic , Desmond Lau
IPC: C30B25/20 , B23K26/00 , C23C16/27 , C23C16/04 , C23C16/44 , B81C3/00 , C25F3/02 , C30B29/04 , C30B25/04 , C30B33/10 , C30B33/12 , B23K26/362 , C23C16/56
CPC classification number: C30B25/20 , B23K26/0006 , B23K26/362 , B23K2103/50 , B81C3/001 , B81C2201/0143 , B81C2201/0146 , B81C2201/0187 , B81C2201/0198 , C23C16/042 , C23C16/274 , C23C16/279 , C23C16/4408 , C23C16/56 , C25F3/02 , C30B25/04 , C30B25/18 , C30B29/04 , C30B33/10 , C30B33/12
Abstract: The present disclosure provides a method of fabricating a diamond membrane. The method comprises providing a substrate and a support structure. The substrate comprises a diamond material having a first surface and the substrate further comprises a sub-surface layer that is positioned below the first surface and has a crystallographic structure that is different to that of the diamond material. The sub-surface layer is positioned to divide the diamond material into first and second regions wherein the first region is positioned between the first surface and the sub-surface layer. The support structure also comprises a diamond material and is connected to, and covers a portion of, the first surface of the substrate. The method further comprises selectively removing the second region of the diamond material from the substrate by etching away at least a portion of the sub-surface layer of the substrate.
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