公开(公告)号：US20130244511A1

公开(公告)日：2013-09-19

申请号：US13989353

申请日：2011-11-14

Applicant: Jan Van Tilburg ,  Fred Scheefhals

Inventor： Jan Van Tilburg ,  Fred Scheefhals

IPC: H01R4/18

CPC classification number: H01R4/183 ,  H01R4/10 ,  H01R43/04 ,  H05K1/117 ,  H05K3/325 ,  H05K2201/09745 ,  H05K2201/10287 ,  Y10T29/49174 ,  Y10T29/49181

Abstract: The present invention related to a method for mechanically and electrically connecting an electric wire to a terminal element and to a terminal assembly comprising a terminal element and at least one electric wire that is mechanically and electrically connected to the terminal element. For improving such method and terminal assembly, the method comprises the steps of arranging a connecting portion of the electric wire substantially parallel to the an entrance surface of the contact opening; and connecting a joining section of the connecting portion with the contact opening by plastically deforming a lateral cut of the joining section. The terminal assembly includes a terminal element having at least one contact opening, and at least one electric wire that is mechanically and electrically connected to the contact opening, wherein a connecting portion of the electric wire that is located outside the contact opening runs substantially parallel to an entrance surface of the contact opening, and wherein a joining section of the connecting portion is plastically deformed into and thereby non-positively connected to the contact opening.

Abstract translation: 本发明涉及一种用于将电线机械地和电气地连接到端子元件的方法以及包括终端元件和至少一个电线的终端组件的机械和电连接的方法。 为了改善这种方法和端子组件，该方法包括以下步骤：将电线的连接部分布置成基本上平行于接触开口的入射表面; 以及通过使接合部分的横向切口塑性变形来将连接部分的接合部分与接触开口连接。 端子组件包括具有至少一个接触开口的端子元件和与接触开口机械地和电连接的至少一根电线，其中位于接触开口外侧的电线的连接部分基本上平行于 接触开口的入口表面，并且其中连接部分的接合部分塑性地变形到与接触开口无关的连接。

公开(公告)号：US20130228362A1

公开(公告)日：2013-09-05

申请号：US13599984

申请日：2012-08-30

Applicant: Jan Hendrik Berkel

Inventor： Jan Hendrik Berkel

IPC: H05K1/02 ,  F28F21/00 ,  H05K3/30

CPC classification number: H05K1/0201 ,  F28F21/00 ,  H01L23/36 ,  H01L23/3677 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0655 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/00014 ,  H05K1/0204 ,  H05K1/021 ,  H05K3/0061 ,  H05K3/30 ,  H05K2201/068 ,  H05K2201/09745 ,  H05K2201/10416 ,  H05K2201/1059 ,  Y10T29/4913 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Disclosed herein is a method for assembling a circuit board which has at least one layer copper clad on one or both sides or provided with conductor tracks, wherein, in one assembly step, at least one rigid flange insert is inserted into an associated recess in the circuit board or into a component associated with the circuit board and wherein at least one semiconductor die of a semiconductor component is applied onto the inserted flange insert in a subsequent application step.

Abstract translation: 本文公开了一种用于组装电路板的方法，该电路板在一个或两个侧面上具有至少一层铜包层或设置有导体轨道，其中在一个组装步骤中，至少一个刚性凸缘插入件插入到相关联的凹部中 电路板或与电路板相关联的部件，并且其中半导体部件的至少一个半导体管芯在随后的施加步骤中被施加到插入的法兰插入件上。

公开(公告)号：US08507805B2

公开(公告)日：2013-08-13

申请号：US12362670

申请日：2009-01-30

Applicant: Seiya Fujii

Inventor： Seiya Fujii

IPC: H05K1/16 ,  H01L21/56

CPC classification number: H01L21/561 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/85205 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/111 ,  H05K3/3452 ,  H05K2201/09381 ,  H05K2201/09745 ,  H05K2201/0989 ,  H05K2201/10734 ,  Y02P70/611 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: In a wiring board according to the present invention, a substrate, a solder resist provided on the substrate, a land, a wiring line, and a connection portion connecting the wiring line and the land, the connection portion is provided with a recess as a non-flat portion, and is formed to comprise a width greater than a width of the wiring line and smaller than a width (diameter) of the land, the width of the connection portion being gradually increased from the wiring line toward the land.

Abstract translation: 在根据本发明的布线板中，基板，设置在基板上的阻焊剂，焊盘，布线和连接布线和焊盘的连接部分，连接部分设置有作为 非平坦部分，并且形成为包括大于布线的宽度的宽度并且小于焊盘的宽度（直径），连接部分的宽度从布线向着平台逐渐增加。

公开(公告)号：US20130042963A1

公开(公告)日：2013-02-21

申请号：US13655376

申请日：2012-10-18

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Chang Hyun Lim ,  Jung Eun Kang ,  Seog Moon Choi ,  Kwang Soo Kim ,  Sung Keun Park

IPC: B32B37/12 ,  B32B38/08 ,  B32B38/04

CPC classification number: H05K1/0203 ,  H05K1/053 ,  H05K1/141 ,  H05K2201/062 ,  H05K2201/09745 ,  H05K2201/10166 ,  Y10T29/49083 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T156/10 ,  Y10T156/1056 ,  Y10T156/1064

Abstract: Disclosed herein are a heat-radiating substrate and a method of manufacturing the same. The heat-radiating substrate includes: a core layer including a core metal layer and a core insulating layer formed on the core metal layer and divided into a first region and a second region; a circuit layer formed in the first region of the core layer; a build-up layer formed in the second region of the core layer and including a build-up insulating layer and a build-up circuit layer; an adhesive layer formed between the second region of the core layer and the build-up layer; and an impregnation device mounted on the build-up layer to be impregnated into the adhesive layer. A heat generating element is mounted on the circuit layer and a thermally weakened element is mounted on the build-up layer, thereby preventing the thermally weakened element from being damaged by heat of the heat generating element. The impregnation device is formed on the build-up layer and is impregnated into the adhesive layer, thereby efficiently utilizing a space.

Abstract translation: 这里公开了散热基板及其制造方法。 散热基板包括：芯层，其包括芯金属层和形成在芯金属层上的芯绝缘层，并分为第一区域和第二区域; 形成在芯层的第一区域中的电路层; 形成在所述芯层的所述第二区域中的堆积层，并且包括积聚绝缘层和积聚电路层; 形成在芯层的第二区域和积层之间的粘合层; 以及安装在堆积层上以浸渍到粘合剂层中的浸渍装置。 发热元件安装在电路层上，并且热增强元件安装在积层上，从而防止热弱化元件被发热元件的热​​量损坏。 浸渍装置形成在堆积层上并浸渍在粘合剂层中，从而有效地利用空间。

公开(公告)号：US20130015478A1

公开(公告)日：2013-01-17

申请号：US13368140

申请日：2012-02-07

Applicant: Nam Seok Oh ,  Yun Min Cho ,  Jong Woo Lee

Inventor： Nam Seok Oh ,  Yun Min Cho ,  Jong Woo Lee

IPC: H01L33/60

CPC classification number: F21S41/147 ,  F21S41/125 ,  F21S41/141 ,  F21S41/255 ,  F21S41/285 ,  F21S41/321 ,  F21S41/36 ,  F21S41/365 ,  F21S41/43 ,  F21S45/47 ,  F21V3/08 ,  F21V7/22 ,  F21V9/30 ,  F21V13/02 ,  F21Y2115/10 ,  H01L25/0753 ,  H01L27/153 ,  H01L33/58 ,  H01L2224/48091 ,  H05K1/05 ,  H05K1/183 ,  H05K3/284 ,  H05K2201/09745 ,  H05K2201/10106 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Disclosed is a light emitting module including a light emitting device package having a circuit board having a cavity, an insulation substrate arranged in the cavity, with a conductive pattern formed thereon, and at least one light emitting device disposed on the insulation substrate, with being electrically connected with the conductive pattern; and a glass cover located on the light emitting device package, with lateral surfaces, a top surface and an open bottom surface, wherein the light emitting device package and the circuit board are electrically connected with each other.

Abstract translation: 公开了一种发光模块，其包括发光器件封装，其具有具有空腔的电路板，布置在腔中的绝缘基板，其上形成有导电图案，以及设置在绝缘基板上的至少一个发光器件， 与导电图案电连接; 以及玻璃盖，其位于所述发光器件封装上，具有侧表面，顶表面和开放的底表面，其中所述发光器件封装和所述电路板彼此电连接。

公开(公告)号：US08324512B2

公开(公告)日：2012-12-04

申请号：US13004325

申请日：2011-01-11

Applicant: Yukihiko Toyoda ,  Yoichiro Kawamura ,  Tomoyuki Ikeda

Inventor： Yukihiko Toyoda ,  Yoichiro Kawamura ,  Tomoyuki Ikeda

IPC: H05K1/11

CPC classification number: H05K1/115 ,  H01L21/486 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/3011 ,  H05K1/0271 ,  H05K1/113 ,  H05K1/116 ,  H05K3/28 ,  H05K3/4602 ,  H05K3/4644 ,  H05K3/4661 ,  H05K3/4688 ,  H05K2201/0133 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/068 ,  H05K2201/09454 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09627 ,  H05K2201/09745 ,  H01L2924/00

Abstract: A multilayered printed circuit board including a substrate, a multilayered structure built thereon and having conductor circuits and interlaminar resin insulating layers in an alternate fashion, and one or more stack-via structures including via-holes stacked one another and electrically connected to the conductor circuits through the insulating layers. Each of the via-holes includes a land portion formed on a respective one of the insulating layers and a filled via structure portion filling an opening of the respective one of the insulating layers with a metal layer such that the via-holes are stacked one another immediately above the filled via structure portion of each via-hole, the via-holes include the outermost layer via-hole in the outermost layer of the insulating layers, and one or more via-holes have the land portion having the land diameter which is larger than the land diameter of the land portion of the outermost layer via-hole.

Abstract translation: 一种多层印刷电路板，包括基板，在其上构建的多层结构，并且具有交替形式的导体电路和层间树脂绝缘层，以及一个或多个堆叠通孔结构，其包括彼此堆叠并且电连接到导体电路的通孔 通过绝缘层。 每个通孔包括形成在绝缘层的相应一个上的接合部分和填充的通孔结构部分，其中填充有绝缘层的相应一个绝缘层的开口的金属层使得通孔彼此堆叠 在通孔的填充通孔结构部分的正上方，通孔包括绝缘层的最外层中的最外层通孔，一个或多个通孔具有焊盘直径为 大于最外层通孔的陆部的陆部直径。

公开(公告)号：US20120300416A1

公开(公告)日：2012-11-29

申请号：US13331306

申请日：2011-12-20

Applicant: Tetsuo SAJI ,  Gohki NISHIMURA ,  Naoyuki TASAKA

Inventor： Tetsuo SAJI ,  Gohki NISHIMURA ,  Naoyuki TASAKA

IPC: H05K1/18 ,  H01P5/12 ,  H01F5/00 ,  H05K1/02

CPC classification number: H05K1/0284 ,  H01F2017/0046 ,  H01F2017/0073 ,  H01P1/213 ,  H01P3/003 ,  H05K1/0219 ,  H05K1/0253 ,  H05K1/162 ,  H05K1/165 ,  H05K1/185 ,  H05K3/4608 ,  H05K2201/0338 ,  H05K2201/09745

Abstract: A multilayer substrate is configured by stacking conductive layers and insulation layers. The multilayer substrate includes a core that is one of the conductive layers and is thicker than any of other conductive layers, and a first signal line that is included in the conductive layers and is adjacent to the core so that a first insulation layer that is one of the insulation layers is interposed between the core and the first signal line, the first signal line being used for transmission of an RF signal. The core has a recess portion so as to face the first signal line.

Abstract translation: 通过堆叠导电层和绝缘层来构成多层基板。 多层基板包括作为导电层之一并且比任何其它导电层更厚的芯以及包含在导电层中并且与芯相邻并且与第一绝缘层为一体的第一信号线 的绝缘层插入在芯和第一信号线之间，第一信号线用于发射RF信号。 芯部具有面向第一信号线的凹部。

公开(公告)号：US08253027B2

公开(公告)日：2012-08-28

申请号：US12712034

申请日：2010-02-24

Applicant: Kimihiro Yamanaka ,  Manabu Ichinose ,  Satoshi Nakamura

Inventor： Kimihiro Yamanaka ,  Manabu Ichinose ,  Satoshi Nakamura

IPC: H05K1/03

CPC classification number: H05K1/115 ,  H01L23/49827 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/00014 ,  H05K1/0263 ,  H05K1/113 ,  H05K3/4644 ,  H05K2201/09627 ,  H05K2201/09745 ,  H05K2201/09854 ,  H05K2201/10674 ,  Y10T29/49155 ,  Y10T428/24917 ,  H01L2224/05599

Abstract: According to one embodiment of the invention, a circuit board comprises a conductive layer including a land portion and a line portion connected to the land portion, and; a conductor connected to a surface of the land portion. A planar shape of the connected portion between the conductor and the land portion has a elongated shape along a width direction of the line portion. A part of the connected portion is located within an imaginary region formed by imaginarily extending the line portion toward the land portion.

Abstract translation: 根据本发明的一个实施例，电路板包括导电层，该导电层包括接地部分和连接到焊盘部分的线路部分， 连接到陆部的表面的导体。 导体与陆部之间的连接部分的平面形状沿着线部分的宽度方向具有细长形状。 连接部分的一部分位于通过将线部分向着陆部分的想象地延伸形成的虚拟区域内。

公开(公告)号：US08232576B1

公开(公告)日：2012-07-31

申请号：US12848175

申请日：2010-08-01

Applicant: Charles W. C. Lin ,  Chia-Chung Wang ,  Sangwhoo Lim

Inventor： Charles W. C. Lin ,  Chia-Chung Wang ,  Sangwhoo Lim

IPC: H01L33/00 ,  H01L23/34

CPC classification number: H01L21/486 ,  H01L21/4882 ,  H01L23/3677 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L33/483 ,  H01L33/62 ,  H01L33/642 ,  H01L2224/29144 ,  H01L2224/32188 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/48639 ,  H01L2224/48644 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83805 ,  H01L2224/83815 ,  H01L2224/85207 ,  H01L2224/85439 ,  H01L2224/85444 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/0204 ,  H05K1/021 ,  H05K3/0061 ,  H05K2201/09054 ,  H05K2201/09745 ,  H05K2201/10106 ,  H01L2924/0105 ,  H01L2224/32225 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor chip assembly includes a semiconductor device, a heat spreader, a conductive trace and an adhesive. The heat spreader includes a post, a base and a ceramic block. The post extends upwardly from the base into an opening in the adhesive, the base extends laterally from the post and the ceramic block is embedded in the post. The semiconductor device overlaps the ceramic block, is electrically connected to the conductive trace and is thermally connected to the ceramic block. The adhesive extends between the post and the conductive trace and between the base and the conductive trace. The conductive trace provides signal routing between a pad and a terminal.

Abstract translation: 半导体芯片组件包括半导体器件，散热器，导电迹线和粘合剂。 散热器包括柱，基座和陶瓷块。 柱从基部向上延伸到粘合剂中的开口中，基部从柱侧向延伸，并且陶瓷块嵌入柱中。 半导体器件与陶瓷块重叠，电连接到导电迹线并且热连接到陶瓷块。 粘合剂在柱和导电迹线之间以及基部和导电迹线之间延伸。 导电迹线提供焊盘和端子之间的信号路由。

公开(公告)号：US08222530B2

公开(公告)日：2012-07-17

申请号：US12654101

申请日：2009-12-10

Applicant: Saori Ishigaki

Inventor： Saori Ishigaki

IPC: H05K1/00

CPC classification number: H05K1/0269 ,  G11B5/484 ,  G11B5/486 ,  H05K1/056 ,  H05K3/0052 ,  H05K3/225 ,  H05K3/28 ,  H05K2201/0909 ,  H05K2201/09745 ,  H05K2201/09781 ,  H05K2201/0989 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49133

Abstract: A wired-circuit-board assembly sheet includes a plurality of wired circuit boards and a supporting sheet for supporting the wired circuit boards in an aligned state. Each of the wired circuit boards includes a distinguishing mark forming portion to be formed with a distinguishing mark for distinguishing between defectiveness and non-defectiveness of the wired circuit board. The distinguishing mark forming portion is divided by a weir portion for preventing the distinguishing mark from flowing out from the distinguishing mark forming portion.

Abstract translation: 布线电路板组装片包括多个布线电路板和用于支撑处于对准状态的布线电路板的支撑片。 每个布线电路板包括一个区别标记形成部分，形成有用于区分布线电路板的缺陷性和非缺陷性的区别标记。 识别标记形成部分被堰部分除以防止区分标记从区分标记形成部分流出。