公开(公告)号：US09713261B2

公开(公告)日：2017-07-18

申请号：US14356209

申请日：2012-08-31

Applicant: Jianyuan Song ,  Weihong Peng ,  Pingping Xie ,  Dong Liu

Inventor： Jianyuan Song ,  Weihong Peng ,  Pingping Xie ,  Dong Liu

IPC: H05K3/00 ,  H05K3/12 ,  H05K3/18 ,  H05K3/42 ,  H05K3/34 ,  H05K3/46 ,  H05K1/02

CPC classification number: H05K3/00 ,  H05K1/0269 ,  H05K3/0017 ,  H05K3/0044 ,  H05K3/0047 ,  H05K3/0073 ,  H05K3/12 ,  H05K3/188 ,  H05K3/3452 ,  H05K3/42 ,  H05K3/425 ,  H05K3/428 ,  H05K3/4623 ,  H05K3/4629 ,  H05K2201/09036 ,  H05K2201/09845 ,  H05K2203/0315 ,  H05K2203/162 ,  Y10T29/49004 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49179

Abstract: A fabrication process of a stepped circuit board comprises A) cutting a circuit board substrate, printing patterns on an inner layer of the circuit board substrate, stepped groove milling of the inner layer, washer milling a washer between the inner layer and an outer layer, brownification and lamination processing on the inner layer, and then drilling holes on an outer layer of the circuit board substrate; B) electroplating the entire circuit board substrate by depositing copper on the outer layer of the circuit board substrate with drilled holes; C) performing pattern transfer by means of through-hole plating of the drilled holes on the circuit board substrate processed by the copper depositing and the electroplating; D) after pattern transferring, grinding a shape of a connecting piece (SET) on the circuit board substrate after the electroplating; E) plugging the drilled holes to form plug holes and printing a solder mask and texts in a silk-screen manner after forming the plug holes; F) depositing nickel immersion gold on the entire circuit board substrate, then printing characters in a silk-screen manner, thereby forming the stepped circuit board; and G) testing and inspecting an electric performance and appearance of the stepped circuit board to fabricate a finished product of the stepped circuit board.

公开(公告)号：US09713258B2

公开(公告)日：2017-07-18

申请号：US11411920

申请日：2006-04-27

Applicant: Young Hoon Kwark

Inventor： Young Hoon Kwark

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H05K1/18 ,  H01L23/13 ,  H01L23/367 ,  H01L23/66 ,  H01L23/00 ,  H01L25/16

CPC classification number: H05K1/183 ,  H01L23/13 ,  H01L23/3677 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/165 ,  H01L2223/6627 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/49109 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/1903 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K2203/049 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: An electrical circuit device that includes a circuit board with an integrated circuit chip in a cavity that extends from a surface of the circuit board to an embedded conductor, and an electrical connection between the integrated circuit chip and the embedded conductor.

公开(公告)号：US09704644B2

公开(公告)日：2017-07-11

申请号：US14531079

申请日：2014-11-03

Applicant: James Jen-Ho Wang

Inventor： James Jen-Ho Wang

IPC: H05B37/00 ,  H05B39/00 ,  H05B41/00 ,  H01F41/02 ,  H05B33/08 ,  H05K1/16 ,  H05K3/46 ,  H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H05K3/28 ,  H05K3/42

CPC classification number: H01F41/0206 ,  H01F17/0013 ,  H01F41/046 ,  H01F2017/006 ,  H01F2017/0066 ,  H05B33/0803 ,  H05B33/0821 ,  H05B33/0845 ,  H05K1/0209 ,  H05K1/021 ,  H05K1/0271 ,  H05K1/028 ,  H05K1/0283 ,  H05K1/165 ,  H05K1/183 ,  H05K1/189 ,  H05K3/0005 ,  H05K3/0035 ,  H05K3/0061 ,  H05K3/0097 ,  H05K3/281 ,  H05K3/427 ,  H05K3/4697 ,  H05K2201/056 ,  H05K2201/086 ,  H05K2201/0919 ,  H05K2201/09672 ,  H05K2201/09709 ,  H05K2201/09845 ,  H05K2203/0126 ,  H05K2203/0384 ,  H05K2203/0571 ,  H05K2203/063 ,  H05K2203/1545

Abstract: An embedded device 105 is assembled within a flexible circuit assembly 30 with the embedded device mid-plane intentionally located in proximity to the flexible circuit assembly central plane 115 to minimize stress effects on the embedded device. The opening 18, for the embedded device, is enlarged in an intermediate layer 10 to enhance flexibility of the flexible circuit assembly.

公开(公告)号：US20170194686A1

公开(公告)日：2017-07-06

申请号：US15465635

申请日：2017-03-22

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Shingo ITO ,  Kuniaki YOSUI

IPC: H01P3/02

CPC classification number: H01P3/026 ,  H01P1/02 ,  H01P1/047 ,  H01P3/082 ,  H01P3/085 ,  H01P5/028 ,  H05K1/0245 ,  H05K1/142 ,  H05K2201/0919 ,  H05K2201/09845

Abstract: A first signal conductor pattern, a first ground conductor pattern, and a second ground conductor pattern define a first transmission line with a strip line structure. A second signal conductor pattern, a third ground conductor pattern, and a fourth ground conductor pattern define a second transmission line with a strip line structure. A first connecting portion at an end of the first transmission line and a second connecting portion at an end of the second transmission line are stacked together so that the first ground conductor pattern is electrically connected to the third ground conductor pattern, the second ground conductor pattern is electrically connected to the fourth ground conductor pattern, and the first signal conductor pattern is electrically connected to the second signal conductor pattern.

公开(公告)号：US09661758B2

公开(公告)日：2017-05-23

申请号：US14463588

申请日：2014-08-19

Applicant: Sanmina Corporation

Inventor： Douglas Ward Thomas ,  Shinichi Iketani

IPC: H05K3/10 ,  H05K3/42 ,  H05K3/00

CPC classification number: H05K3/427 ,  H05K3/0026 ,  H05K3/0047 ,  H05K2201/09845 ,  H05K2203/0207 ,  Y10T29/49165

Abstract: Cost effective and efficient methods to maximize printed circuit board (PCB) utilization with minimized signal degradation are provided. The methods include electrically isolating a segmented via structure by controlling the formation of a conductive material within a plated via structure by utilizing different diameter drills within a via structure for trimming the conductive material at the via shoulder (i.e., the rim of a drilled two diameter hole boundary). The trimmed portion may be voided in the via structure for allowing electrically isolated plated through-hole (PTH) segments. One or more areas of trimmed rims within the via structure are used to form multiple stair like diameter holes to create one or more voids in the via structure. As a result, the formation of conductive material within the via structure may be limited to those areas necessary for the transmission of electrical signals.

公开(公告)号：US20170045914A1

公开(公告)日：2017-02-16

申请号：US15335061

申请日：2016-10-26

Applicant: Samsung Display Co., Ltd.

Inventor： Jun Namkung ,  Soonryong Park ,  Chulwoo Jeong

IPC: G06F1/16

CPC classification number: G06F1/1652 ,  G02F1/133305 ,  H01L27/3244 ,  H01L2251/5338 ,  H05K1/028 ,  H05K2201/055 ,  H05K2201/09036 ,  H05K2201/09845 ,  H05K2201/10106 ,  H05K2201/10128

Abstract: A flexible display device includes a flexible display panel and a first outer member having a groove pattern. The groove pattern includes a flat surface and inclined portions connected to the flat surface and symmetrical with each other.

Abstract translation: 柔性显示装置包括柔性显示面板和具有凹槽图案的第一外部构件。 凹槽图案包括平坦表面和连接到平坦表面并且彼此对称的倾斜部分。

公开(公告)号：US09572248B2

公开(公告)日：2017-02-14

申请号：US14800805

申请日：2015-07-16

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hee-Kwon Lee

IPC: H05K1/02 ,  H05K1/09 ,  G09G3/36 ,  H05K1/11

CPC classification number: H05K1/028 ,  G09G3/3611 ,  H05K1/09 ,  H05K1/111 ,  H05K3/284 ,  H05K3/361 ,  H05K2201/09036 ,  H05K2201/09781 ,  H05K2201/09845 ,  H05K2201/10128

Abstract: A display device, including a display panel displaying an image; a chip on film (COF) connected to the display panel and on which a driving integrated circuit is mounted; and a printed circuit board (PCB) connected to the COF and including a driving circuit for driving the display panel, in the COF, on a film, a first pad portion being connected to the driving integrated circuit by a first wiring line, a second pad portion being connected to the driving integrated circuit by a second wiring line, and a solder resist being applied to the first and second wiring lines, the second pad portion being spaced from and offset from the first pad portion, and the PCB including stepped portions at sides of first and second corresponding pad portions connected with the first and second pad portions, respectively, to receive a portion of the solder resist.

Abstract translation: 一种显示装置，包括显示图像的显示面板; 连接到显示面板并且安装有驱动集成电路的胶片上的芯片（COF） 以及连接到COF的印刷电路板（PCB），并且包括用于在COF中在膜上驱动显示面板的驱动电路，第一焊盘部分通过第一布线连接到驱动集成电路，第二焊盘部分 焊盘部分通过第二布线连接到驱动集成电路，并且阻焊剂被施加到第一和第二布线，第二焊盘部分与第一焊盘部分间隔开并偏离第一焊盘部分，并且PCB包括阶梯部分 在分别与第一和第二焊盘部分连接的第一和第二对应焊盘部分的侧面处，以接收阻焊剂的一部分。

公开(公告)号：US20170040762A1

公开(公告)日：2017-02-09

申请号：US15333228

申请日：2016-10-25

Applicant: CommScope, Inc. of North Carolina

Inventor： Richard A. Schumacher ,  Scott Lynn Michaelis

IPC: H01R24/64 ,  H01R13/6466 ,  H05K1/11 ,  H01R13/66 ,  H01R24/28 ,  H01R12/53 ,  H01R13/6469

CPC classification number: H01R24/64 ,  H01R12/53 ,  H01R13/6466 ,  H01R13/6469 ,  H01R13/665 ,  H01R13/6658 ,  H01R23/005 ,  H01R24/28 ,  H01R2107/00 ,  H01R2201/04 ,  H05K1/0245 ,  H05K1/115 ,  H05K1/117 ,  H05K2201/04 ,  H05K2201/0949 ,  H05K2201/09845 ,  H05K2201/1034 ,  H05K2201/10356 ,  Y10T29/49124

Abstract: Communications plugs are provided which include a printed circuit board having a plurality of elongated conductive traces and a plurality of plug blades. Each plug blade has a first section that extends along a top surface of the printed circuit board and a second section that extends along a front edge of the printed circuit board. Additionally, each plug blade may have a thickness that is at least twice the thickness of the elongated conductive traces. The plug blades may be low profile plug blades that are manufactured separately from the printed circuit board.

Abstract translation: 提供了通信插头，其包括具有多个细长导电迹线和多个插头片的印刷电路板。 每个插头片具有沿着印刷电路板的顶表面延伸的第一部分和沿着印刷电路板的前边缘延伸的第二部分。 此外，每个插头刀片可以具有至少是细长导电迹线的厚度的两倍的厚度。 插头片可以是与印刷电路板分开制造的低剖面插头片。

公开(公告)号：US09560774B2

公开(公告)日：2017-01-31

申请号：US13420167

申请日：2012-03-14

Applicant: Joel R. Goergen ,  Greg Hunt

Inventor： Joel R. Goergen ,  Greg Hunt

IPC: H05K3/20 ,  H05K3/42 ,  H05K1/02 ,  H05K3/00

CPC classification number: H05K3/429 ,  H05K1/0216 ,  H05K1/0237 ,  H05K3/0047 ,  H05K2201/044 ,  H05K2201/09236 ,  H05K2201/09845 ,  H05K2203/0207 ,  H05K2203/0242 ,  H05K2203/175 ,  Y10T29/49165

Abstract: A high-speed router backplane is disclosed. The router backplane uses differential signal pairs on multiple signal layers, each sandwiched between a pair of digital ground layers. Thru-holes are used to connect the differential signal pairs to external components. To reduce routing complexity, at least some of the differential signal pairs route through a via pair, somewhere along their path, to a different signal layer. At least some of the thru-holes and vias are drilled to reduce an electrically conductive stub length portion of the hole. The drilled portion of a hole includes a transition from a first profile to a second profile to reduce radio frequency reflections from the end of the drilled hole.

Abstract translation: 公开了一种高速路由器背板。 路由器背板在多个信号层上使用差分信号对，每个信号对夹在一对数字接地层之间。 通孔用于将差分信号对连接到外部组件。 为了降低路由复杂度，差分信号对中的至少一些在其路径的某处沿着不同的信号层路由通路对。 钻出至少一些通孔和通孔以减少孔的导电短截线长度部分。 孔的钻孔部分包括从第一轮廓到第二轮廓的转变，以减少从钻孔的端部的射频反射。

公开(公告)号：US09532441B2

公开(公告)日：2016-12-27

申请号：US14619521

申请日：2015-02-11

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Jyung Chan Lee ,  Eun Gu Lee ,  Sil Gu Mun ,  Sang Soo Lee

IPC: H05K1/02 ,  H05K3/36 ,  H01P5/02

CPC classification number: H05K1/0219 ,  H01P5/028 ,  H05K1/025 ,  H05K2201/0919 ,  H05K2201/09727 ,  H05K2201/09845 ,  H05K2201/10242 ,  Y10T29/49126

Abstract: A board assembly for transmitting a high-speed signal and a method of manufacturing the same. The board assembly may include a submount board, a base board, and a contact member for a signal line. The submount board may include at least one first high-speed signal line formed on the surface thereof. The base board may include the submount board on one part of the upper surface thereof, and at least second high-speed signal line on the other part of the upper surface thereof, wherein the second high-speed signal lines corresponds to the first high-speed signal lines, respectively. The contact member for the signal line may be installed on the side of the submount board, and have an upper portion contacting the first high-speed signal line and a lower portion contacting the second high-speed signal line such that the first high-speed signal line contacts the second high-speed signal line.

Abstract translation: 用于发送高速信号的电路板组件及其制造方法。 板组件可以包括副安装板，基板和用于信号线的接触构件。 副安装板可以包括形成在其表面上的至少一个第一高速信号线。 基板可以在其上表面的一部分上包括副安装板，并且在其上表面的另一部分上包括至少第二高速信号线，其中第二高速信号线对应于第一高速信号线， 速度信号线。 用于信号线的接触构件可以安装在副安装板的侧面上，并且具有接触第一高速信号线的上部和接触第二高速信号线的下部，使得第一高速信号线 信号线接触第二条高速信号线。