DESIGN SUPPORT APPARATUS, DESIGN SUPPORT PROGRAM, AND DESIGN SUPPORT METHOD

    公开(公告)号:US20240176940A1

    公开(公告)日:2024-05-30

    申请号:US18430978

    申请日:2024-02-02

    CPC classification number: G06F30/392

    Abstract: Provided is a design support apparatus that supports design of an electronic component embedded substrate, the apparatus including: a height difference calculating unit that calculates a difference between the height of a first electronic component and the height of a second electronic component on the basis of first component information containing height information about the first electronic component to be incorporated in an electronic component embedded substrate and second component information containing height information about the second electronic component to be incorporated in the electronic component embedded substrate; and a height adjustment necessity judging unit that compares the difference with a reference value set in advance, and judges the necessity of a height adjusting member to be arranged on the first electronic component and/or the second electronic component.

    Semiconductor device
    33.
    发明授权

    公开(公告)号:US11855135B2

    公开(公告)日:2023-12-26

    申请号:US17508259

    申请日:2021-10-22

    Applicant: FLOSFIA INC.

    Abstract: An object of the disclosure is to provide a semiconductor device having enhanced adhesion of the electrode while improving the reverse direction breakdown voltage, which is especially useful for power devices. A semiconductor device including a semiconductor layer and an electrode layer provided on the semiconductor layer and including at least a first electrode layer and a second electrode layer provided on the first electrode layer, wherein an outer edge portion of the second electrode layer is located outside an outer edge portion of the first electrode layer, wherein the semiconductor layer includes an electric field relaxation region with a different electrical resistivity from that of the semiconductor layer, and wherein the electric field relaxation region overlaps at least a part of a portion of the second electrode layer located outside the outer edge portion of the first electrode layer in plan view.

    SEMICONDUCTOR DEVICE AND CRYSTAL GROWTH METHOD

    公开(公告)号:US20220406943A1

    公开(公告)日:2022-12-22

    申请号:US17890477

    申请日:2022-08-18

    Applicant: FLOSFIA INC.

    Inventor: Katsuaki KAWARA

    Abstract: Provided is a semiconductor device, including at least: a semiconductor layer; and a gate electrode that is arranged directly or via another layer on the semiconductor layer, the semiconductor device being configured in such a manner as to cause a current to flow in the semiconductor layer at least in a first direction that is along with an interface between the semiconductor layer and the gate electrode, the semiconductor layer having a corundum structure, a direction of an m-axis in the semiconductor layer being the first direction.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

    公开(公告)号:US20220367674A1

    公开(公告)日:2022-11-17

    申请号:US17874977

    申请日:2022-07-27

    Applicant: FLOSFIA INC.

    Inventor: Takayoshi OSHIMA

    Abstract: A semiconductor device includes: a semiconductor film including a Schottky junction region and an Ohmic junction region; a Schottky electrode arranged on the Schottky junction region; and an Ohmic electrode arranged on the Ohmic junction region, the Schottky junction region having a first dislocation density, the Ohmic junction region having a second dislocation region, and the first dislocation density being smaller than the second dislocation density.

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