Abstract:
A dual-personality extended USB (EUSB) system supports both USB and EUSB devices using an extended 9-pin EUSB socket. Each EUSB device includes a PCBA having four standard USB metal contact pads, and several extended purpose contact springs disposed on an upper side of a PCB. A single-shot molding process is used to form a molded housing over passive components and IC dies disposed on the lower PCB surface. The passive components are mounted using SMT methods, and the IC dies are mounted using COB methods. The extended 9-pin EUSB socket includes standard USB contacts and extended use contacts that communicate with the PCBA through the standard USB metal contacts and the contact springs. The EUSB device is optionally used as a modular insert that is mounted onto a metal or plastic case to provide a EUSB assembly having a plug shell similar to a standard USB male connector.
Abstract:
A printed wiring board includes resin insulation layers, conductive layers formed on the resin insulation layers respectively such that each of the conductive layers is formed on a surface of each of the resin insulation layers, and via conductors penetrating through the resin insulation layers respectively such that the via conductors are connecting the conductive layers through the resin insulation layers. The conductive layers and the via conductors are formed such that each of the conductive layers and each of the via conductors includes an electroless copper-plated film, an intermediate compound layer having Cu3N+Cu(NH)x and formed on the electroless copper-plated film, and an electrolytic copper-plated film formed on the intermediate compound layer.
Abstract translation:印刷布线板包括树脂绝缘层,分别形成在树脂绝缘层上的导电层,使得每个导电层形成在每个树脂绝缘层的表面上,以及通孔导体分别贯穿树脂绝缘层,使得 通孔导体通过树脂绝缘层连接导电层。 导电层和通孔导体形成为使得导电层和每个通路导体中的每一个包括无电镀铜膜,具有Cu 3 N + Cu(NH)x的中间化合物层并形成在无电镀铜 膜和在中间化合物层上形成的电解铜电镀膜。
Abstract:
A method of manufacturing a printed circuit board having a buried solder bump, including: preparing a carrier on which a circuit layer, a solder bump, and a circuit pattern formed on the solder bump are formed; pressing the carrier into an insulating layer so that the circuit layer, the solder bump and the circuit pattern are buried in the insulating layer; and removing the carrier.
Abstract:
Disclosed herein are a printed circuit board and a method of manufacturing the same.The printed circuit board according to a preferred embodiment of the present invention may include: an insulating layer; a first via depressed from one surface of the insulating layer; a second via depressed from the other surface of the insulating layer; and a circuit pattern formed in the insulating layer and bonded to the first and second vias.
Abstract:
A wiring substrate includes an insulating layer, a pad, and a solder resist layer. The insulating layer has a first surface formed with a first recess portion. The pad is embedded in the first recess portion. The pad includes a second surface and a third surface. The third surface that is located at a lower position than the first surface so as to expose an inner wall surface of the first recess portion. The pad is formed with a second recess portion in a center portion of the third surface. The solder resist layer is provided on the first surface. An adjacent portion of the first surface to a peripheral portion of the first recess portion is smaller in roughness than a region of the first surface peripheral to the adjacent portion of the first surface.
Abstract:
To provide a substrate for mounting element having sulfurization resistance improved by increasing planarity of the surface of a thick conductor layer.The substrate 10 for mounting element of the present invention has such a structure that on a surface of a LTCC substrate or ceramics substrate as an inorganic insulating substrate 1, a thick conductor layer 2 is formed as an element connection terminal. The thick conductor layer 2 is made of a metal composed mainly of silver (Ag) or copper (Cu) and formed by printing and firing a metal paste. This thick conductor layer has its surface planarized by wet blast treatment to a surface roughness Ra of at most 0.02 μm. A Ni/Au-plated layer 3 is formed on the thick conductor layer 2, so that the surface of the thick conductor layer 2 is completely covered without any space.
Abstract:
A method of mounting a semiconductor chip includes: forming a resin coating on a surface of a path connecting a bonding pad on a surface of a semiconductor chip and an electrode pad formed on a surface of an insulating base material; forming, by laser beam machining, a wiring gutter having a depth that is equal to or greater than a thickness of the resin coating along the path for connecting the bonding pad and the electrode pad; depositing a plating catalyst on a surface of the wiring gutter; removing the resin coating; and forming an electroless plating coating only at a site where the plating catalyst remains.
Abstract:
Disclosed herein is a method for manufacturing a printed circuit board, wherein a protective film for stripping and a metal layer closely adhered to the protective film for stripping are formed on an inner layer pad to protect the inner layer pad at the time of laser processing related to cavity processing and applying an etchant, thereby making it possible to improve reliability of a product.
Abstract:
An electronic device having a printed circuit board is provided. In one embodiment, the printed circuit board includes a plurality of external pads to be coupled with an external device and a plurality of bypass pads for testing an electric circuit. The external pads are exposed and at least one of the plurality of bypass pads are not exposed from an outer surface of the PCB. A system using the electronic device and a method of testing an electronic device are also provided.
Abstract:
A board for mounting electronic circuit parts includes a first connection terminal group including a plurality of connection terminals densely formed on the top surface of a substrate having through holes formed therein, and a second connection terminal group including a plurality of connection terminals formed at at least the peripheral portion of a back surface of the substrate. The first connection terminal group is connected to the second connection terminal group by way of the through holes. A build-up multilayer interconnection layer having via holes is formed on the top surface of the substrate, so that the first connection terminal group is connected to the second connection terminal group through the build-up multilayer interconnection layer and the through holes. According to another aspect, each signal line on the top surface of the build-up multilayer interconnection layer comprises a plurality of wiring patterns having different widths and a taper-shaped pattern that connects those wiring patterns together and whose width continuously changes. Each signal line has a smaller width at an area having a relatively high wiring density than at an area having a relatively low wiring density.