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    Z-Directed Capacitor Components for Printed Circuit Boards
    32.
    发明申请
    Z-Directed Capacitor Components for Printed Circuit Boards 有权
    用于印刷电路板的Z-定向电容器组件

    公开(公告)号：US20110017503A1

    公开(公告)日：2011-01-27

    申请号：US12508158

    申请日：2009-07-23

    Applicant: Keith Bryan Hardin ,  John Thomas Fessler ,  Paul Kevin Hall ,  Brian Lee Nally ,  Robert Aaron Oglesbee

    Inventor： Keith Bryan Hardin ,  John Thomas Fessler ,  Paul Kevin Hall ,  Brian Lee Nally ,  Robert Aaron Oglesbee

    IPC: H05K1/16

    CPC classification number: H05K3/4046 ,  H05K1/0231 ,  H05K1/0233 ,  H05K1/0248 ,  H05K1/0251 ,  H05K1/0298 ,  H05K1/184 ,  H05K2201/09645 ,  H05K2201/10984

    Abstract: A Z-directed capacitor component for insertion into a printed circuit board while allowing electrical connection to internal conductive planes contained within the PCB. In one embodiment the Z-directed capacitor component utilizes semi-cylindrical metallic sheets. In another embodiment, stack annular metallic disks are used. The Z-directed capacitor component mounts within the thickness of the PCB allowing other components to be mounted over it. The body may contain one or more conductors and may include one or more surface channels or wells extending along at least a portion of the length of the body. Methods for mounting Z-directed components are also provided.

    Abstract translation: 用于插入印刷电路板的Z导向电容器组件，同时允许电连接到包含在PCB内部的内部导电平面。 在一个实施例中，Z导向电容器部件使用半圆柱形金属片。 在另一个实施例中，使用堆叠的环形金属盘。 Z导向电容器组件安装在PCB的厚度内，允许其他组件安装在其上。 主体可以包含一个或多个导体并且可以包括沿着身体的长度的至少一部分延伸的一个或多个表面通道或孔。 还提供了用于安装Z向定向部件的方法。

    VIA DESIGN APPARATUS AND VIA DESIGN METHOD
    33.
    发明申请
    VIA DESIGN APPARATUS AND VIA DESIGN METHOD 有权
    通过设计设计和通过设计方法

    公开(公告)号：US20100251200A1

    公开(公告)日：2010-09-30

    申请号：US12781009

    申请日：2010-05-17

    Applicant: Hirofumi MORI ,  Jun YAMADA

    Inventor： Hirofumi MORI ,  Jun YAMADA

    IPC: G06F17/50

    CPC classification number: H05K3/0005 ,  G06F17/5077 ,  H05K1/0251 ,  H05K3/429 ,  H05K2201/09645

    Abstract: A via design apparatus for designing a via providing connections between a plurality of layers inside a multilayer board includes: a determination section that determines a value of a shape parameter indicating a shape of a via in the multilayer board, the via having a hole passing through the plurality of layers and a conductive section on a side wall of the hole; and a calculation section that calculates a value of impedance of the via according to the value of the shape parameter.

    Abstract translation: 一种用于设计在多层板内的多个层之间提供连接的通孔的通孔设计装置，包括：确定部，其确定表示多层板中的通孔的形状的形状参数的值，所述通孔具有穿过的孔 所述多个层和所述孔的侧壁上的导电部分; 以及计算部，其根据形状参数的值来计算通孔的阻抗值。

    Configurable printed circuit board
    36.
    发明授权
    Configurable printed circuit board 有权
    可配置印刷电路板

    公开(公告)号：US07645943B2

    公开(公告)日：2010-01-12

    申请号：US11827442

    申请日：2007-07-11

    Applicant: Jason R. Horiuchi

    Inventor： Jason R. Horiuchi

    IPC: H01R12/04 ,  H05K1/11

    CPC classification number: H05K3/222 ,  H05K1/0263 ,  H05K1/029 ,  H05K3/0047 ,  H05K3/306 ,  H05K2201/09645 ,  H05K2201/09854 ,  H05K2201/10272 ,  H05K2201/10363 ,  H05K2203/0242 ,  H05K2203/175

    Abstract: A configurable printed circuit board can be used with a bussed electrical center in a vehicle and has a dielectric body. The dielectric body defines an array of plated through-holes that are constructed to receive a terminal of an electrical adaptor. A conductive trace is also adhered to a surface of the dielectric body and is routed through some of the plated through-holes for carrying current between them. An aperture is defined through a portion of some of the plated through-holes and the respective conductive traces to electrically isolate one side of the conductive trace from another side; and thus the printed circuit board can accommodate more than one electrical device in a single section.

    Abstract translation: 可配置的印刷电路板可以与车辆中的总线电气中心一起使用并且具有电介质体。 电介质体限定了电镀通孔的阵列，其被构造成接收电适配器的端子。 导电迹线也粘附到电介质体的表面，并且被引导通过一些电镀通孔以在它们之间承载电流。 通过一些电镀通孔和相应的导电迹线的一部分限定孔，以使导电迹线的一侧与另一侧电隔离; 因此印刷电路板可以在单个部分中容纳多于一个的电气设备。

    PRINTED CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE
    37.
    发明申请
    PRINTED CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE 失效
    印刷电路板和半导体封装

    公开(公告)号：US20090266586A1

    公开(公告)日：2009-10-29

    申请号：US12066474

    申请日：2006-09-01

    Applicant: Junya Sato ,  Shinji Watanabe ,  Nobuhiro Mikami ,  Atsumasa Sawada

    Inventor： Junya Sato ,  Shinji Watanabe ,  Nobuhiro Mikami ,  Atsumasa Sawada

    IPC: H05K1/16 ,  H05K1/11 ,  H05K1/00

    CPC classification number: H01L23/49827 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H05K1/0271 ,  H05K1/115 ,  H05K3/108 ,  H05K3/403 ,  H05K3/421 ,  H05K2201/0355 ,  H05K2201/0394 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/09645 ,  H05K2201/09745 ,  H05K2201/09909 ,  H01L2924/00014 ,  H01L2924/00

    Abstract: An object of the present invention is to prevent occurrence of an electrical fault such as signal disconnection due to exfoliation between a via and a printed circuit board, via crack, or the like, caused by various stresses that may arise when the printed circuit board is curved. The printed circuit board includes a first wiring layer 11, an electrical insulating base material 12 formed on the first wiring layer 11 and including a via base hole 12a that leads to the first wiring layer 11, and a second wiring layer 16 that is formed on the electrical insulating base material 12 and is electrically connected to the first wiring layer 11 through the via base hole 12a. In a region of the second wiring layer 16 disposed at least in the vicinity of the via base hole 12a, a stress relieving portion 17 is formed which relieves bending stress, tensile stress, compressive stress, and shear stress that may arise when the electrical insulating base material 12 is curved.

    Abstract translation: 本发明的目的在于防止电路故障的发生，例如由于印刷电路板是由印刷电路板所产生的各种应力引起的通孔和印刷电路板之间的剥离引起的信号断开等。 弯曲。 印刷电路板包括第一布线层11，形成在第一布线层11上的电绝缘基材12，并且包括通向第一布线层11的通孔基底孔12a和形成在第一布线层11上的第二布线层16 电绝缘基材12，并且通过通孔基底孔12a与第一布线层11电连接。 在至少布置在通孔基底孔12a附近的第二布线层16的区域中形成有减轻应力消除部分17，该部分减轻了当电绝缘材料可能产生的弯曲应力，拉伸应力，压缩应力和剪切应力 基材12弯曲。

    Shielded through-via
    38.
    发明授权
    Shielded through-via 有权
    屏蔽通孔

    公开(公告)号：US07589390B2

    公开(公告)日：2009-09-15

    申请号：US11373223

    申请日：2006-03-10

    Applicant: Jun Jason Yao

    Inventor： Jun Jason Yao

    IPC: H01L23/48

    CPC classification number: H01L23/48 ,  H01L23/481 ,  H01L23/552 ,  H01L2223/6622 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0222 ,  H05K1/0239 ,  H05K1/115 ,  H05K3/4602 ,  H05K2201/0959 ,  H05K2201/09645 ,  H05K2201/09809 ,  H01L2924/00

    Abstract: A shielded through-via that reduces the effect of parasitic capacitance between the through-via and surrounding wafer while providing high isolation from neighboring signals. A shield electrode is formed in the insulating region and spaced apart from the through-via. A coupling element couples at least the time-varying portion of the signal carried on the through-via to the shield electrode. This reduces the effect of any parasitic capacitance between the through-via and the shield electrode, hence the surrounding wafer.

    Abstract translation: 一种屏蔽通孔，可减少通孔和周围晶片之间的寄生电容的影响，同时提供与相邻信号的高隔离度。 屏蔽电极形成在绝缘区域中并且与通孔间隔开。 耦合元件至少将通孔上携带的信号的时变部分耦合到屏蔽电极。 这减少了通孔和屏蔽电极之间的任何寄生电容的影响，从而降低了周围的晶片。

    Multilayer wiring substrate
    40.
    发明授权
    Multilayer wiring substrate 有权
    多层布线基板

    公开(公告)号：US07575442B2

    公开(公告)日：2009-08-18

    申请号：US12076014

    申请日：2008-03-12

    Applicant: Eiji Ogata ,  Kazunori Omori ,  Koichi Namimatsu ,  Kazunari Fukagawa

    Inventor： Eiji Ogata ,  Kazunori Omori ,  Koichi Namimatsu ,  Kazunari Fukagawa

    IPC: H01R12/06

    CPC classification number: H05K3/4046 ,  H05K3/3447 ,  H05K2201/0133 ,  H05K2201/09645 ,  H05K2201/1059

    Abstract: A first wiring pattern formed on a first layer of a multilayer wiring substrate, a second wiring pattern formed on a layer different from the first layer on which the first wiring pattern is formed, a penetration hole penetrating the front surface and the back surface of the substrate, and a penetration hole penetrating a front surface and a back surface of the substrate; and a fitting connector having a conductor part on a side surface inscribed in the penetration hole and fitting into the penetration hole are provided. The first wiring pattern and the second wiring pattern are exposed from the internal surface of the penetration hole, and the fitting connector connects a first end part of the conductor part and a second end part with an exposed part of the first wiring pattern and an exposed part of the second wiring pattern, respectively.

    Abstract translation: 形成在多层布线基板的第一层上的第一布线图案，形成在与形成有第一布线图案的第一层不同的层上的第二布线图案，穿透第一布线图案的前表面和后表面的穿透孔 基板和穿透基板的前表面和后表面的穿透孔; 以及配合连接器，其具有位于贯通孔内侧的嵌合于贯通孔的侧面的导体部。 第一布线图案和第二布线图案从穿孔的内表面露出，并且嵌合连接器将导体部分的第一端部和第二端部与第一布线图案的露出部分连接， 分别是第二布线图案的一部分。

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