公开(公告)号：US07170187B2

公开(公告)日：2007-01-30

申请号：US10711185

申请日：2004-08-31

Applicant: William E. Bernier ,  Marie S. Cole ,  Mukta G. Farooq ,  John U. Knickerbocker ,  Tasha E. Lopez ,  Roger A. Quon ,  David J. Welsh

Inventor： William E. Bernier ,  Marie S. Cole ,  Mukta G. Farooq ,  John U. Knickerbocker ,  Tasha E. Lopez ,  Roger A. Quon ,  David J. Welsh

IPC: H01L23/48

CPC classification number: H05K3/321 ,  H01L24/05 ,  H01L24/12 ,  H01L24/16 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05557 ,  H01L2224/13076 ,  H01L2224/13078 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/1319 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/13339 ,  H01L2224/13464 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/838 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/1579 ,  H05K2201/0212 ,  H05K2201/0248 ,  H05K2201/0373 ,  H05K2201/1025 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2924/01026 ,  H01L2924/00015 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299

Abstract: Disclosed is a laminated (or non-laminated) conductive interconnection for joining an integrated circuit device to a device carrier, where the conductive interconnection comprises alternating metal layers and polymer layers. In addition, the polymer can include dendrites, metal projections from the carrier or device, and/or micelle brushes on the outer portion of the polymer. The polymer layers include metal particles and the alternating metal layers and polymer layers form either a cube-shaped structure or a cylinder-shaped structure.

Abstract translation: 公开了用于将集成电路器件连接到器件载体的层压（或非层叠）导电互连，其中导电互连包括交替的金属层和聚合物层。 此外，聚合物可以包括枝晶，来自载体或器件的金属突起，和/或聚合物外部的胶束刷。 聚合物层包括金属颗粒，并且交替的金属层和聚合物层形成立方体结构或圆柱形结构。

公开(公告)号：US07120033B2

公开(公告)日：2006-10-10

申请号：US10196027

申请日：2002-07-16

Applicant: Kurt Gross ,  Hans Rappl

Inventor： Kurt Gross ,  Hans Rappl

IPC: H05K7/10

CPC classification number: H01L23/13 ,  H01L23/3677 ,  H01L2924/0002 ,  H05K1/111 ,  H05K3/308 ,  H05K3/44 ,  H05K2201/1025 ,  H05K2201/10416 ,  H05K2201/1059 ,  Y10T29/49147 ,  Y10T29/49153 ,  H01L2924/00

Abstract: An electrically conducting bonding connection (B) is produced between an electronic circuit (S) arranged on an electrically conducting support plate (1) and the support plate (1) by providing a hole (4, 5), into which an electrically conducting bonding element (2) with a bondable surface (3) is pressed in such a way that the support plate (1) and the bonding element (2) enter into an electrically conducting and frictional connection; the bonding connection is subsequently produced with the bonding element (2).

Abstract translation: 在布置在导电支撑板（1）的电子电路（S）和支撑板（1）之间通过提供一个孔（4,5）而产生导电接合连接（B） 具有可粘合表面（3）的元件（2）以支撑板（1）和接合元件（2）进入导电和摩擦连接的方式被按压; 随后用接合元件（2）产生接合连接。

公开(公告)号：US20050214971A1

公开(公告)日：2005-09-29

申请号：US10907158

申请日：2005-03-23

Applicant: Ching-Fu Hung

Inventor： Ching-Fu Hung

IPC: H01L21/44 ,  H01L21/56 ,  H01L21/60 ,  H01L23/485 ,  H05K3/34

CPC classification number: H01L24/13 ,  H01L21/563 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/1147 ,  H01L2224/1308 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/73203 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/351 ,  H05K3/3436 ,  H05K3/3473 ,  H05K2201/0379 ,  H05K2201/1025 ,  H05K2203/043 ,  Y02P70/613 ,  H01L2924/0105 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/05099

Abstract: A bumping process, a bump structure, a packaging process and a package structure are described. The bump structure comprises a first solder portion, a second solder portion and a conductive layer. The second solder portion is disposed on the first solder portion and the conductive layer is disposed between the first solder portion and the second solder portion. The bumping process produces a bump structure having a greater height. The bumping process can also be applied in a package process to form a package structure having a highly reliable connection between a chip and a packaging substrate.

Abstract translation: 描述了碰撞过程，凸块结构，包装过程和包装结构。 凸块结构包括第一焊料部分，第二焊料部分和导电层。 第二焊料部分设置在第一焊料部分上，并且导电层设置在第一焊料部分和第二焊接部分之间。 碰撞过程产生具有较大高度的凸块结构。 碰撞过程也可以应用于封装工艺中以形成具有在芯片和封装衬底之间的高度可靠连接的封装结构。

公开(公告)号：US20050048770A1

公开(公告)日：2005-03-03

申请号：US10914227

申请日：2004-08-10

Applicant: Naohiro Mashino

Inventor： Naohiro Mashino

IPC: H05K3/40 ,  H05K3/00 ,  H05K3/10 ,  H05K3/22 ,  H05K3/42 ,  H05K3/46 ,  H01L21/44 ,  H01L23/053 ,  H01L23/12 ,  H01L23/34

CPC classification number: H05K3/22 ,  H01L2924/0002 ,  H05K3/102 ,  H05K3/423 ,  H05K3/4602 ,  H05K2201/09536 ,  H05K2201/09563 ,  H05K2201/096 ,  H05K2201/09745 ,  H05K2201/1025 ,  H05K2203/107 ,  H05K2203/128 ,  H01L2924/00

Abstract: A process for manufacturing a wiring board comprising a substrate made of an insulation material and having first and second surfaces, first and second conductor patterns formed on the first and second surfaces, respectively, and a via conductor penetrating the substrate to electrically connect the first conductor pattern with the second conductor pattern; the process comprising the following steps of: forming the substrate with a through-hole penetrating thereto and defining openings at the first and second surfaces, respectively; plating the substrate with a metal so that a metal layer having a predetermined thickness is formed on the respective first and second surfaces of the substrate and the through-hole is substantially filled with the metal to be the via conductor; irradiating a laser beam, as a plurality of spots, around a metal-less portion of the plated metal, such as a dimple or seam, at positions corresponding to the openings of the through-hole, so that the a part of the plated metal melts to fill the metal-less portion with the molten metal.

Abstract translation: 一种制造布线板的方法，包括由绝缘材料制成并具有第一和第二表面的基底，分别形成在第一和第二表面上的第一和第二导体图案，以及穿过基板的通孔导体，以将第一导体 图案与第二导体图案; 该方法包括以下步骤：用穿透其的通孔形成基底并分别在第一和第二表面处限定开口; 用金属电镀基板，使得在基板的相应的第一和第二表面上形成具有预定厚度的金属层，并且通孔基本上填充有作为通路导体的金属; 在对应于通孔的开口的位置处，将激光束作为多个点照射在电镀金属的无金属部分（例如凹坑或接缝）周围，使得电镀金属的一部分 熔化以用熔融金属填充无金属部分。

公开(公告)号：US06424037B1

公开(公告)日：2002-07-23

申请号：US09941384

申请日：2001-08-28

Applicant: Chung W Ho ,  Tsing-Chow Wang

Inventor： Chung W Ho ,  Tsing-Chow Wang

IPC: H01L2348

CPC classification number: H01L24/12 ,  H01L21/4853 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05671 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13583 ,  H01L2224/136 ,  H01L2224/13647 ,  H01L2224/13671 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01054 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K3/3436 ,  H05K2201/0379 ,  H05K2201/1025 ,  H05K2201/2081 ,  H05K2203/0315 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/29099 ,  H01L2924/00

Abstract: Within a method for forming a solder interconnection structure for use within a microelectronic fabrication, there is first provided a substrate having formed thereover a bond pad. There is then formed upon the bond pad a first solder interconnection layer. There is then formed over the first solder interconnection layer an annular solder non-wettable copper oxide layer which does not cover an upper dome portion of the first solder interconnection layer. There is then formed over the upper dome portion of the first solder interconnection layer and not upon the annular solder non-wettable copper oxide layer a second solder interconnection layer.

公开(公告)号：US20190050054A1

公开(公告)日：2019-02-14

申请号：US16067767

申请日：2017-01-12

Applicant: ELECTROLUX HOME PRODUCTS, INC.

Inventor： Paul Stoufer

IPC: G06F3/01 ,  H05K1/16 ,  H05K1/18

CPC classification number: G06F3/016 ,  G08B6/00 ,  H05K1/165 ,  H05K1/181 ,  H05K2201/09072 ,  H05K2201/1003 ,  H05K2201/10083 ,  H05K2201/10151 ,  H05K2201/1025 ,  H05K2201/10265 ,  H05K2201/10522 ,  Y02P70/611

Abstract: An apparatus such as an appliance with a printed circuit board, PCB, (202) mounted haptic feedback device (200) is provided. The apparatus comprises a printed circuit board (PCB) having an opening (204) defined therein, and a spool (206) affixed to the PCB and having a shaft with a coil (208) wound thereabout. The shaft defines an opening aligned with the opening of the PCB. The apparatus also comprises a spring-loaded plunger positioned and movable within the opening of the shaft. The spring-loaded plunger includes a metallic disk operatively coupled to an end of the plunger and distally positioned to the spool. A control component of the apparatus is configured to energize the coil according to a haptic feedback pattern, and thereby cause the coil to at tract the metallic disk and move the plunger within the opening of the shaft of the spool, and through the opening of the PCB.

公开(公告)号：US20150247629A1

公开(公告)日：2015-09-03

申请号：US14436261

申请日：2013-09-03

Applicant: TOSHIBA LIGHTING & TECHNOLOGY CORPORATION

Inventor： Kiyokazu Hino ,  Takahiro Kurihara

IPC: F21V23/00 ,  F21V19/00

CPC classification number: F21V23/002 ,  F21S43/195 ,  F21S43/37 ,  F21S45/50 ,  F21V19/0025 ,  F21V19/003 ,  F21V19/005 ,  F21V19/0055 ,  F21V23/06 ,  F21V29/70 ,  F21Y2101/00 ,  F21Y2105/00 ,  F21Y2115/10 ,  F21Y2115/15 ,  F21Y2115/30 ,  H01R12/58 ,  H01R43/0256 ,  H05K3/306 ,  H05K3/3447 ,  H05K2201/10106 ,  H05K2201/1025 ,  H05K2201/1031 ,  H05K2201/10401 ,  Y02P70/611

Abstract: A light emitting device according to the present embodiment includes a substrate on which a wiring portion is provided; a light emitting element which is provided on the substrate and is electrically connected to the wiring portion; a feeding portion to which an electric power is supplied from the outside; a first connection portion which is provided on the substrate and is electrically connected to the wiring portion; a second connection portion which is joined to the first connection portion through soldering and includes a first opening portion into which the feeding portion is inserted; and a soldering portion which is provided between the first opening portion and the feeding portion.

Abstract translation: 根据本实施例的发光器件包括其上设置有布线部分的基板; 发光元件，其设置在所述基板上并与所述布线部电连接; 从外部供给电力的供给部; 第一连接部，其设置在所述基板上并电连接到所述布线部; 第二连接部，其通过焊接接合到所述第一连接部，并且包括第一开口部，所述供给部插入所述第一开口部; 以及设置在第一开口部和供给部之间的焊接部。

公开(公告)号：US08671564B2

公开(公告)日：2014-03-18

申请号：US12554762

申请日：2009-09-04

Applicant: Hueng Jae Oh ,  Tae Joon Chung ,  Dong Gyu Lee ,  Seon Jae Mun ,  Jin Won Choi

Inventor： Hueng Jae Oh ,  Tae Joon Chung ,  Dong Gyu Lee ,  Seon Jae Mun ,  Jin Won Choi

IPC: H01K3/10

CPC classification number: H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05568 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/12042 ,  H05K3/243 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/1025 ,  Y02P70/613 ,  Y10T29/49147 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00

Abstract: Disclosed is a substrate for flip chip bonding, in which a base solder layer is formed between a pad and a metal post, thereby increasing impact resistance and mounting reliability. A method of fabricating the substrate for flip chip bonding is also provided.

Abstract translation: 公开了一种用于倒装芯片接合的基板，其中在焊盘和金属柱之间形成基底焊料层，从而提高耐冲击性和安装可靠性。 还提供了一种制造用于倒装芯片接合的基板的方法。

公开(公告)号：US08212156B2

公开(公告)日：2012-07-03

申请号：US12146757

申请日：2008-06-26

Applicant: William Louis Brodsky ,  Mark Kenneth Hoffmeyer

Inventor： William Louis Brodsky ,  Mark Kenneth Hoffmeyer

IPC: H05K7/02 ,  H05K1/11 ,  H01R43/02

CPC classification number: H05K3/4015 ,  H01R12/7082 ,  H05K3/20 ,  H05K3/341 ,  H05K2201/0347 ,  H05K2201/1025 ,  H05K2201/10424 ,  H05K2203/0156 ,  H05K2203/167 ,  Y10T29/49124 ,  Y10T29/49222

Abstract: An enhanced contact metallurgy construction for plastic land grid array (PLGA) modules and printed wiring boards (PWBs). The PWB may, for example, have subcomposite laminate construction and/or a double-sided LGA site. A plurality of preform contacts are each respectively soldered to one of a plurality of metal pads on a PLGA module carrier and/or a PWB. Each of the preform contacts comprises a metal preform base (e.g., copper, nickel) soldered to one of the plurality of metal pads and an electrolytic noble metal plating (e.g., gold) over the metal preform base. An electrolytic non-noble metal underplating (e.g., nickel) may be interposed between the metal preform base and the electrolytic noble metal plating. In one embodiment, the electrolytic non-noble metal underplating is 80-400 microinches thick to provide an enhanced diffusion barrier, and the electrolytic noble metal plating is 30-60 microinches thick and incorporates one or more hardening agents to provide enhanced wear and corrosion resistance.

Abstract translation: 用于塑料焊盘网格阵列（PLGA）模块和印刷电路板（PWB）的增强型接触式冶金结构。 PWB可以例如具有亚复合层压结构和/或双面LGA位点。 多个预成型件触点分别焊接到PLGA模块载体和/或PWB上的多个金属焊盘之一。 每个预成型件触点包括焊接到多个金属焊盘中的一个的金属预制棒基座（例如铜，镍）和在金属预制棒基部上的电解贵金属电镀（例如金）。 可以在金属预制棒基体和电解贵金属电镀之间插入底层电镀非贵金属（例如镍）。 在一个实施方案中，底镀电解非贵金属为80-400微英寸，以提供增强的扩散阻挡层，并且电解贵金属镀层为30-60微英寸，并且包含一种或多种硬化剂以提供增强的耐磨性和耐腐蚀性 。

公开(公告)号：US20100314161A1

公开(公告)日：2010-12-16

申请号：US12554762

申请日：2009-09-04

Applicant: Hueng Jae OH ,  Tae Joon Chung ,  Dong Gyu Lee ,  Seon Jae Mun ,  Jin Won Choi

Inventor： Hueng Jae OH ,  Tae Joon Chung ,  Dong Gyu Lee ,  Seon Jae Mun ,  Jin Won Choi

IPC: H05K1/09 ,  B05D5/12

CPC classification number: H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05026 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05568 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/12042 ,  H05K3/243 ,  H05K3/3436 ,  H05K3/3484 ,  H05K2201/1025 ,  Y02P70/613 ,  Y10T29/49147 ,  Y10T29/49165 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/13099 ,  H01L2924/00

Abstract: Disclosed is a substrate for flip chip bonding, in which a base solder layer is formed between a pad and a metal post, thereby increasing impact resistance and mounting reliability. A method of fabricating the substrate for flip chip bonding is also provided.

Abstract translation: 公开了一种用于倒装芯片接合的基板，其中在焊盘和金属柱之间形成基底焊料层，从而提高耐冲击性和安装可靠性。 还提供了一种制造用于倒装芯片接合的基板的方法。