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    VERTICAL CROSS-POINT MEMORY ARRAYS
    41.
    发明申请
    VERTICAL CROSS-POINT MEMORY ARRAYS 审中-公开

    公开(公告)号：US20200258940A1

    公开(公告)日：2020-08-13

    申请号：US16735394

    申请日：2020-01-06

    Applicant: Unity Semiconductor Corporation

    Inventor： Lidia Vereen ,  Bruce Lynn Bateman ,  David Alan Eggleston ,  Louis C. Parrillo

    IPC: H01L27/24 ,  H01L45/00 ,  H01L23/528

    Abstract: A method of manufacturing a memory structure includes forming a plurality of vertically-stacked horizontal line layers, interleaving a plurality of electrically conductive vertical lines with the electrically conductive horizontal lines, and forming a memory film at and between intersections of the electrically conductive vertical lines and the horizontal lines. In one embodiment of the invention, the electrically conductive vertical lines are interleaved with the horizontal lines such that a row of vertical lines is positioned between each horizontally-adjacent pair of horizontal lines in each horizontal line layer. By configuring the electrically conductive vertical lines and electrically conductive horizontal lines so that a row of vertical lines is positioned between each horizontally-adjacent pair of horizontal lines, a unit memory cell footprint of just 2F2 may be realized.

    CONDUCTIVE METAL OXIDE STRUCTURES IN NON-VOLATILE RE-WRITABLE MEMORY DEVICES
    43.
    发明申请
    CONDUCTIVE METAL OXIDE STRUCTURES IN NON-VOLATILE RE-WRITABLE MEMORY DEVICES 审中-公开

    公开(公告)号：US20190371396A1

    公开(公告)日：2019-12-05

    申请号：US16429411

    申请日：2019-06-03

    Applicant: Unity Semiconductor Corporation

    Inventor： Lawrence Schloss ,  Julie Casperson Brewer ,  Wayne Kinney ,  Rene Meyer

    IPC: G11C13/00 ,  G11C11/56 ,  H01L27/24 ,  H01L45/00

    Abstract: A memory cell including a memory element comprising an electrolytic insulator in contact with a conductive metal oxide (CMO) is disclosed. The CMO includes a crystalline structure and can comprise a pyrochlore oxide, a conductive binary oxide, a multiple B-site perovskite, and a Ruddlesden-Popper structure. The CMO includes mobile ions that can be transported to/from the electrolytic insulator in response to an electric field of appropriate magnitude and direction generated by a write voltage applied across the electrolytic insulator and CMO. The memory cell can include a non-ohmic device (NOD) that is electrically in series with the memory element. The memory cell can be positioned between a cross-point of conductive array lines in a two-terminal cross-point memory array in a single layer of memory or multiple vertically stacked layers of memory that are fabricated over a substrate that includes active circuitry for data operations on the array layer(s).

    High voltage switching circuitry for a cross-point array
    44.
    发明授权
    High voltage switching circuitry for a cross-point array 有权

    公开(公告)号：US10347332B2

    公开(公告)日：2019-07-09

    申请号：US16004705

    申请日：2018-06-11

    Applicant: Unity Semiconductor Corporation

    Inventor： Christophe Chevallier ,  Chang Hua Siau

    IPC: G11C11/00 ,  G11C13/00 ,  G11C8/08 ,  G11C8/10 ,  H03K3/356 ,  H03K19/0185

    Abstract: A system includes a cross-point memory array and a decoder circuit coupled to the cross-point memory array. The decoder circuit includes a predecoder having predecode logic to generate a control signal and a level shifter circuit to generate a voltage signal. The decoder circuit further includes a post-decoder coupled to the predecoder, the post-decoder including a first stage and a second stage coupled to the first stage, the control signal to control the first stage and the second stage to route the voltage signal through the first stage and the second stage to a selected conductive array line of a plurality of conductive array lines coupled to a memory array.

    VERTICAL CROSS-POINT ARRAYS FOR ULTRA-HIGH-DENSITY MEMORY APPLICATIONS
    50.
    发明申请
    VERTICAL CROSS-POINT ARRAYS FOR ULTRA-HIGH-DENSITY MEMORY APPLICATIONS 审中-公开

    公开(公告)号：US20180012934A1

    公开(公告)日：2018-01-11

    申请号：US15633050

    申请日：2017-06-26

    Applicant: Unity Semiconductor Corporation

    Inventor： Bruce Lynn Bateman

    IPC: H01L27/24 ,  H01L45/00

    Abstract: An ultra-high-density vertical cross-point array comprises a plurality of horizontal line layers having horizontal lines interleaved with a plurality of vertical lines arranged in rows and columns. The vertical lines are interleaved with the horizontal lines such that a row of vertical lines is positioned between each consecutive pair of horizontal lines in each horizontal line layer. Each vertical line comprises a center conductor surrounded by a single or multi-layered memory film. Accordingly, when interleaved with the horizontal lines, two-terminal memory cells are integrally formed between the center conductor of each vertical line and each crossing horizontal line. By configuring the vertical and horizontal lines so that a row of vertical lines is positioned between each consecutive pair of horizontal lines, a unit memory cell footprint of just 2 F2 may be realized.

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