公开(公告)号：US20050103522A1

公开(公告)日：2005-05-19

申请号：US10990280

申请日：2004-11-15

Applicant: Kevin Grundy ,  William Wiedemann ,  Joseph Fjelstad

Inventor： Kevin Grundy ,  William Wiedemann ,  Joseph Fjelstad

IPC: H05K1/18 ,  H05K3/30 ,  H05K3/34 ,  H05K3/46

CPC classification number: H05K3/3405 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/73204 ,  H01L2924/15311 ,  H01L2924/19107 ,  H01L2924/3011 ,  H05K1/183 ,  H05K3/308 ,  H05K3/3421 ,  H05K3/3447 ,  H05K3/4602 ,  H05K3/4697 ,  H05K2201/0919 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K2201/10189 ,  H05K2201/1059 ,  H05K2201/10689 ,  H05K2201/10704 ,  H05K2201/10727 ,  H05K2201/10734 ,  H01L2924/00

Abstract: Disclosed are stair stepped PCB structures which provide high performance, direct path, via-less interconnections between various elements of an electronic interconnection structure including, among others, IC packages and connectors.

Abstract translation: 公开了楼梯级PCB结构，其提供包括IC封装和连接器在内的电子互连结构的各种元件之间的高性能，直接路径，无通孔互连。

公开(公告)号：USRE37840E1

公开(公告)日：2002-09-17

申请号：US09159360

申请日：1998-09-23

Applicant: Anilkumar C. Bhatt ,  Roy H. Magnuson ,  Voya R. Markovich ,  Konstantinos I. Papathomas ,  Douglas O. Powell

Inventor： Anilkumar C. Bhatt ,  Roy H. Magnuson ,  Voya R. Markovich ,  Konstantinos I. Papathomas ,  Douglas O. Powell

IPC: H01K316

CPC classification number: H05K3/0094 ,  H01L23/5384 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2924/01004 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H05K1/112 ,  H05K3/0023 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/092 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096 ,  H05K2201/09845 ,  H05K2201/10734 ,  H05K2203/0191 ,  H05K2203/0278 ,  Y10T29/49126 ,  Y10T29/49165

Abstract: Disclosed is a printed circuit board and a method of preparing the printed circuit board. The printed circuit board has two types of plated through holes. The first type of plated through holes extend to and through an exterior surface of the printed circuit board for receipt of a pin-in-through-hole module or component pin. The second type of plated through holes are for surface mount technology and terminate below the exterior surfaces of the printed circuit board. These plated through holes contain a bill composition.

Abstract translation: 公开了印刷电路板和制备印刷电路板的方法。 印刷电路板有两种电镀通孔。 第一类型的电镀通孔延伸到印刷电路板的外表面并通过印刷电路板的外表面，用于接收针式通孔模块或部件销。 第二种类型的电镀通孔用于表面贴装技术，并终止在印刷电路板的外表面之下。 这些电镀通孔包含纸币组合物。

公开(公告)号：US06323436B1

公开(公告)日：2001-11-27

申请号：US08833614

申请日：1997-04-08

Applicant: Jeffrey Curtis Hedrick ,  Kostas Papathomas ,  Amarjit Singh Rai ,  Stephen Leo Tisdale ,  Alfred Viehbeck

Inventor： Jeffrey Curtis Hedrick ,  Kostas Papathomas ,  Amarjit Singh Rai ,  Stephen Leo Tisdale ,  Alfred Viehbeck

IPC: H05K104

CPC classification number: H05K1/0366 ,  H01L23/145 ,  H01L2224/16225 ,  H01L2924/1433 ,  H01L2924/15311 ,  H05K3/0023 ,  H05K3/0035 ,  H05K3/0041 ,  H05K3/429 ,  H05K3/4602 ,  H05K2201/0278 ,  H05K2201/068 ,  H05K2201/092 ,  H05K2201/09518 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/096

Abstract: Disclosed is a printed circuit board, and a method of preparing a printed circuit board, which possesses a coefficient of thermal expansion substantially similar to that of silicon for use in direct semiconductor chip attach structures and similar solder mounted devices. The printed circuit board is fabricated from prepreg having a thermosetting resin and a reinforcement layer consisting of non-woven aramid mat or a liquid crystalline polymer paper. The composite dielectric layer optionally includes plated through holes which are either filled or non-filled, and one or more thin film redistribution layers to provide high density electronic packages. The design places the solder pads at the PTHs where needed. The redistribution layer can be formed using photoimagable dielectrics or laminated controlled-CTE composites and laser via imaging.

Abstract translation: 公开了一种印刷电路板，以及一种制备印刷电路板的方法，该印刷电路板的热膨胀系数基本上类似于用于直接半导体芯片连接结构和类似的焊接安装器件的硅的热膨胀系数。 印刷电路板由具有热固性树脂的预浸料和由无纺芳族聚酰胺垫或液晶聚合物纸构成的加强层制成。 复合电介质层可选地包括填充或未填充的电镀通孔以及一个或多个薄膜再分配层以提供高密度电子封装。 该设计将焊盘放置在需要的PTH处。 可以使用光可光电介质或层压的受控CTE复合材料和激光通孔成像形成再分布层。

公开(公告)号：US5665525A

公开(公告)日：1997-09-09

申请号：US540573

申请日：1995-10-06

Applicant: Seppo Pienimaa

Inventor： Seppo Pienimaa

IPC: H05K1/11 ,  H05K3/00 ,  H05K3/18 ,  H05K3/42 ,  H05K3/46 ,  G03F7/00

CPC classification number: H05K3/426 ,  H05K1/115 ,  H05K3/4602 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K3/0023 ,  H05K3/184 ,  H05K3/429

Abstract: A method for producing printed circuit boards (PCB), wherein a base material of a PCB, having copper claddings respectively on its opposed faces, is subject to the following subsequent processing steps. Holes are punched in the base material and claddings. The copper claddings are cleaned and deburred by mechanical and/or chemical techniques. Using image transfer and etching techniques, a pattern is produced in the cladding layers that exposes surface portions and leaves cladding portions adjacent to the holes of the base material. A photoimageable polymer insulating layer is applied to the exposed surfaces of the PCB base material and to the remaining pattern of cladding. The PCB is subjected to exposure and development, which exposes selected portions of the cladding layers including cladding portions adjacent to the holes. The opposite faces of the PCB are subjected to an adhesion improvement and activation treatment necessary for chemical deposition of metal. Image transfer is performed using a second photoimageable and developable insulating layer, and then metallization is applied to the hole walls and cladding portions adjacent to the holes by chemical deposition. In this process the desired conductor patterns, contact areas and interconnections are also produced onto activated areas not protected with the latter photoimageable insulating layer. A solder mask is applied to the PCB that protects the conductor pattern at areas except those intended for establishing contacts.

Abstract translation: 一种制造印刷电路板（PCB）的方法，其中分别在其相对面上具有铜包层的PCB​​的基底材料经受以下后续处理步骤。 孔在基材和包层上冲孔。 铜包层被机械和/或化学技术清洗和去毛刺。 使用图像转印和蚀刻技术，在包覆层中产生图案，其暴露表面部分并且使包覆部分邻近基材的孔留下。 将可光成像的聚合物绝缘层施加到PCB基材的暴露表面和剩余的包层图案。 PCB经受曝光和显影，其暴露包括邻近孔的包层部分的包层的选定部分。 对PCB的相对面进行金属化学沉积所需的附着改善和活化处理。 使用第二可光成像和可显影的绝缘层进行图像转印，然后通过化学沉积将金属化施加到邻近孔的孔壁和包层部分。 在这个过程中，期望的导体图案，接触区域和互连也被产生到未被后者的可光成像绝缘层保护的激活区域上。 焊接掩模被施加到PCB，其保护除了用于建立触点的那些区域之外的导体图案。

公开(公告)号：US3606677A

公开(公告)日：1971-09-21

申请号：US3606677D

申请日：1967-12-26

Applicant: RCA CORP

Inventor： RYAN ROBERT J

IPC: H05K3/38 ,  H05K3/42 ,  H05K3/46 ,  B41M3/08

CPC classification number: H05K3/4626 ,  H05K3/386 ,  H05K3/423 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4623 ,  H05K2201/0195 ,  H05K2201/092 ,  H05K2201/09509 ,  H05K2201/09536 ,  H05K2201/096 ,  H05K2203/063 ,  H05K2203/0733 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49155

Abstract: THE DISCLOSED TECHNIQUE COMPRISES THE LAMINATION OF TWO OR MORE CIRCUIT BOARDS USING A CONTROLLED FLOW ADHESIVE LAYER, THE CONTROLLED FLOW ADHESIVE PERMITTING THROUGH HOLES TO REMAIN UNOBSTRUCTED AFTER LAMINATION. FINAL INTERCONNECTION IS MADE BY PLATING THROUGH THE HOLES, THEREBY PROVIDING THE REQUISITE INTERCONNECTIONS BETWEEN SURFACES.

公开(公告)号：US3322881A

公开(公告)日：1967-05-30

申请号：US39064664

申请日：1964-08-19

Applicant: SCHNEBLE JR FREDERICK W ,  JOSEPH POLICHETTE ,  LEECH EDWARD J

Inventor： SCHNEBLE JR FREDERICK W ,  JOSEPH POLICHETTE ,  LEECH EDWARD J

IPC: H05K3/18 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K3/429 ,  H05K3/182 ,  H05K3/426 ,  H05K3/4602 ,  H05K2201/0236 ,  H05K2201/092 ,  H05K2203/0709 ,  H05K2203/1157 ,  H05K2203/125 ,  H05K2203/1476

公开(公告)号：US09713258B2

公开(公告)日：2017-07-18

申请号：US11411920

申请日：2006-04-27

Applicant: Young Hoon Kwark

Inventor： Young Hoon Kwark

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H05K1/18 ,  H01L23/13 ,  H01L23/367 ,  H01L23/66 ,  H01L23/00 ,  H01L25/16

CPC classification number: H05K1/183 ,  H01L23/13 ,  H01L23/3677 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/165 ,  H01L2223/6627 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/49109 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/1903 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K2201/092 ,  H05K2201/09845 ,  H05K2203/049 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: An electrical circuit device that includes a circuit board with an integrated circuit chip in a cavity that extends from a surface of the circuit board to an embedded conductor, and an electrical connection between the integrated circuit chip and the embedded conductor.

公开(公告)号：US08743529B2

公开(公告)日：2014-06-03

申请号：US13143637

申请日：2010-01-06

Applicant: Todd Hubing ,  Hocheol Kwak ,  Haixin Ke

Inventor： Todd Hubing ,  Hocheol Kwak ,  Haixin Ke

IPC: H01G4/228

CPC classification number: H01G4/232 ,  H01G2/06 ,  H01G4/30 ,  H01G4/35 ,  H01G4/40 ,  H05K1/184 ,  H05K2201/092 ,  H05K2201/09309

Abstract: A capacitor having a stem that is designed to be inserted into a single, large-diameter via hole drilled in a printed circuit board is provided, wherein the stem may have conductive rings for making the positive and negative connections to the printed circuit board power distribution planes. Inside the capacitive stem, current, or at least a portion thereof, may be carried to the main body of the capacitor through low-inductance plates that are interleaved to maximize their own mutual inductance and, therefore, minimize the connection inductance. Alternatively, the capacitor may include a coaxial stem that forms a coaxial transmission line with the anode and cathode terminals forming the inner and outer conductors.

Abstract translation: 提供一种电容器，其具有设计成插入到印刷电路板中钻出的单个大直径通孔中的阀杆，其中所述阀杆可具有导电环，用于使得与所述印刷电路板配电的正极和负极连接 飞机 在电容杆内部，电流或其至少一部分可以通过交错的低电感板传送到电容器的主体，以使其自身的互感最大化，从而使连接电感最小化。 或者，电容器可以包括形成同轴传输线的同轴杆，阳极和阴极端子形成内导体和外导体。

公开(公告)号：US08378225B2

公开(公告)日：2013-02-19

申请号：US12563975

申请日：2009-09-21

Applicant: Hsien-Chieh Lin

Inventor： Hsien-Chieh Lin

IPC: H05K1/03

CPC classification number: H05K3/3457 ,  H05K1/116 ,  H05K3/3452 ,  H05K3/4092 ,  H05K3/4644 ,  H05K2201/0397 ,  H05K2201/092 ,  H05K2201/09436 ,  H05K2201/09781 ,  H05K2203/043

Abstract: The invention provides a printed circuit board and method for fabricating the same. The printed circuit board includes a substrate having an internal circuit structure. An additional circuit structure is disposed on the substrate, electrically connected to the internal circuit structure. A solder mask insulating layer having an opening is disposed on the additional circuit structure. A conductive bump pattern is disposed in the solder mask insulating layer, wherein the conductive bump pattern extends into the opening horizontally, wherein a side, a portion of an upper surface and a portion of a lower surface of the conductive bump pattern are exposed from the opening. A solder ball is formed in the opening, wherein the solder ball is electrically connected to the additional circuit structure.

Abstract translation: 本发明提供一种印刷电路板及其制造方法。 印刷电路板包括具有内部电路结构的基板。 附加的电路结构设置在基板上，电连接到内部电路结构。 具有开口的焊接掩模绝缘层设置在附加电路结构上。 导电凸块图案设置在焊料掩模绝缘层中，其中导电凸块图案水平地延伸到开口中，其中导电凸块图案的一侧，上表面的一部分和下表面的一部分从 开放 在开口中形成焊球，其中焊球与附加电路结构电连接。

公开(公告)号：US08299582B2

公开(公告)日：2012-10-30

申请号：US12261156

申请日：2008-10-30

Applicant: Min Suk Suh

Inventor： Min Suk Suh

IPC: H01L29/40

CPC classification number: H01L23/481 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L25/0657 ,  H01L2224/0554 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/13021 ,  H01L2224/13025 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/078 ,  H01L2924/15311 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K1/183 ,  H05K1/184 ,  H05K2201/092 ,  H05K2201/10674 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A semiconductor package includes a substrate including a substrate body having a first face and a second face opposing the first face. A first through electrode passes through the substrate body between the first face and the second face. An insulation member is disposed over the first face; and a connection member having a first conductive unit disposed inside of the insulation member is electrically connected to the first through electrode, and a second conductive unit electrically connected to the first conductive unit is exposed at side faces of the insulation member. A semiconductor chip having third and fourth faces is disposed over the first face of the substrate body in a vertical direction. A second through electrode passes through the substrate body between the third and fourth faces and is electrically connected to the second conductive unit.

Abstract translation: 半导体封装包括：衬底，其包括具有第一面的衬底主体和与第一面相对的第二面。 第一穿透电极在第一面和第二面之间通过衬底本体。 绝缘构件设置在第一面上; 并且具有设置在所述绝缘构件内部的第一导电单元的连接构件与所述第一通孔电连接，并且与所述第一导电单元电连接的第二导电单元在所述绝缘构件的侧面露出。 具有第三和第四面的半导体芯片在垂直方向上设置在基板主体的第一面上。 第二穿透电极在第三和第四面之间通过衬底主体并且电连接到第二导电单元。