公开(公告)号：US20140097013A1

公开(公告)日：2014-04-10

申请号：US14031209

申请日：2013-09-19

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Koichi Hara ,  Toshihisa Yoda

IPC: H05K1/11 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K1/115 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81192 ,  H05K3/423 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2201/09536 ,  H05K2201/09854 ,  H05K2203/0789 ,  H05K2203/1476 ,  Y10T29/302 ,  Y10T29/49165 ,  H01L2924/00012

Abstract: A method for manufacturing a wiring substrate includes forming a through-hole penetrating a core layer from one to another surface of the core layer, forming a first metal layer covering the one and the other surface of the core layer and an inner wall surface of the through-hole, forming a second metal layer on the first metal layer, and forming a patterned third metal layer on the second metal layer toward the one surface of the core layer along with forming a patterned fourth metal layer on the second metal layer toward the other surface of the core layer. The forming of the second metal layer includes covering the one and the other surfaces of the core layer and the first metal layer in the through-hole with the second metal layer and closing up a center part of the through-hole with the second metal layer.

Abstract translation: 一种布线基板的制造方法，其特征在于，在所述芯层的一面到另一面形成贯通芯层的通孔，形成覆盖所述芯层的一面和另一面的第一金属层和所述芯层的内壁面 通孔，在第一金属层上形成第二金属层，并且在第二金属层上形成图案化的第三金属层朝向芯层的一个表面，同时在第二金属层上形成图案化的第四金属层，朝向 核心层的其他表面。 第二金属层的形成包括用第二金属层覆盖通孔中的芯层和第一金属层的一个表面和第二金属层，并用第二金属层封闭通孔的中心部分 。

公开(公告)号：US20140090878A1

公开(公告)日：2014-04-03

申请号：US14041858

申请日：2013-09-30

Applicant: Ibiden Co., Ltd.

Inventor： Takema ADACHI

IPC: H05K1/03 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K1/036 ,  H05K3/427 ,  H05K3/429 ,  H05K3/4602 ,  H05K3/465 ,  H05K3/4676 ,  H05K2201/09854 ,  Y10T29/49165

Abstract: A printed circuit board has a core substrate, a first conductive pattern on first surface of the substrate, a second conductive pattern on second surface of the substrate, and a through-hole conductor formed of plated material through the substrate such that the conductor is connecting the first and second patterns. The plated material is filling a through hole in the substrate, the substrate includes an insulation layer including inorganic fiber and resin, a first resin layer on one surface of the insulation layer and having the first surface of the substrate, and a second resin layer on the opposite surface of the insulation layer and having the second surface of the substrate, the first and second resin layers do not contain inorganic fiber material, and the sum of thicknesses of the first and second resin layers is set in the range of 20% or less of thickness of the substrate.

Abstract translation: 印刷电路板具有芯基板，在基板的第一表面上的第一导电图案，在基板的第二表面上的第二导电图案，以及由电镀材料穿过基板形成的通孔导体，使得导体连接 第一和第二种模式。 电镀材料填充基板中的通孔，基板包括绝缘层，其包括无机纤维和树脂，在绝缘层的一个表面上具有第一树脂层并且具有基板的第一表面，以及第二树脂层， 绝缘层的相对表面并具有基板的第二表面，第一和第二树脂层不含有无机纤维材料，第一和第二树脂层的厚度之和设定在20％的范围内 衬底厚度较小。

公开(公告)号：US20140083749A1

公开(公告)日：2014-03-27

申请号：US14018644

申请日：2013-09-05

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Daisuke TAKIZAWA

IPC: H05K1/02

CPC classification number: H05K1/0271 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L2224/16225 ,  H01L2924/1531 ,  H05K1/185 ,  H05K3/0026 ,  H05K3/005 ,  H05K3/303 ,  H05K3/4602 ,  H05K2201/0187 ,  H05K2201/09072 ,  H05K2201/09854 ,  H05K2201/10636 ,  Y02P70/611

Abstract: A wiring substrate is provided with a substrate core including a first main surface, a second main surface, and a through hole. An electronic component is arranged in the through hole. A projection projects from a wall of the through hole toward a connection terminal of the electronic component. An insulator is filled between the wall of the through hole and the electronic component. A first insulation layer covers the electronic component and the first main surface. A second insulation layer covers the electronic component and the second main surface. The electronic component includes an electronic component body and the connection terminal formed on a side of the electronic component body. The connection terminal of the electronic component includes an engagement groove formed by the projection and extending along a direction in which the electronic component is fitted into the through hole.

Abstract translation: 布线基板设置有包括第一主表面，第二主表面和通孔的基底芯。 电子部件布置在通孔中。 突起从通孔的壁朝向电子部件的连接端子突出。 绝缘体填充在通孔的壁和电子部件之间。 第一绝缘层覆盖电子元件和第一主表面。 第二绝缘层覆盖电子部件和第二主表面。 电子部件包括形成在电子部件主体侧的电子部件主体和连接端子。 电子部件的连接端子包括由突起形成的接合槽，并且沿着电子部件嵌入通孔的方向延伸。

公开(公告)号：US20140042122A1

公开(公告)日：2014-02-13

申请号：US13963907

申请日：2013-08-09

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jae Mok Jung ,  Min Soo Kim ,  Hun June Song ,  Ba Wool Kim

IPC: H05K3/00 ,  H05K3/10

CPC classification number: H05K3/0079 ,  H05K3/0041 ,  H05K3/0082 ,  H05K3/107 ,  H05K3/421 ,  H05K2201/09827 ,  H05K2201/09854 ,  H05K2203/0594

Abstract: Disclosed herein is a method of manufacturing a printed circuit board, the method including: preparing a base substrate having an insulating layer and a connection pad formed in the insulating layer; forming a photosensitive resist on the insulating layer; forming an opening part of which a side surface has a foot shape by patterning the photosensitive resist; forming a via hole exposing the connection pad by etching the insulating layer exposed by the opening part; and forming a via by filling the via hole.

Abstract translation: 本发明公开了一种制造印刷电路板的方法，该方法包括：制备具有绝缘层的基底和形成在该绝缘层中的连接焊盘; 在绝缘层上形成光敏抗蚀剂; 通过对感光性抗蚀剂进行图案化而形成侧面具有脚形的开口部; 形成通孔，通过蚀刻由所述开口部露出的绝缘层而暴露所述连接焊盘; 以及通过填充通孔形成通孔。

公开(公告)号：US08621750B2

公开(公告)日：2014-01-07

申请号：US12623682

申请日：2009-11-23

Applicant: Richard Schmachtenberg, III ,  John R. Andrews ,  Bradley J. Gerner ,  Jonathan R. Brick ,  Samuel Schultz ,  Chad J. Slenes

Inventor： Richard Schmachtenberg, III ,  John R. Andrews ,  Bradley J. Gerner ,  Jonathan R. Brick ,  Samuel Schultz ,  Chad J. Slenes

IPC: H01K3/10

CPC classification number: H05K3/361 ,  H05K3/305 ,  H05K3/321 ,  H05K3/363 ,  H05K2201/09854 ,  H05K2201/10977 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49165 ,  Y10T156/10 ,  Y10T156/1052

Abstract: An electrical interconnect has an adhesive layer in which is formed an array of apertures, the apertures being of non-circular shape. An electrical circuit apparatus has a first circuit having at least one electrical contact, a second circuit having at least one electrical contact aligned to the electrical contact of the first circuit, and a standoff structure between the first and second circuits having at least one aperture aligned to one electrical contact of the first and second circuits, the aperture being of a non-circular shape.

Abstract translation: 电互连具有粘合剂层，其中形成有孔阵列，孔是非圆形的。 电路装置具有至少一个电接触的第一电路，具有与第一电路的电触点对准的至少一个电接触的第二电路，以及第一和第二电路之间的至少一个孔对准的间隔结构 到第一和第二电路的一个电接触，该孔是非圆形的。

公开(公告)号：US08592989B2

公开(公告)日：2013-11-26

申请号：US11673558

申请日：2007-02-09

Applicant: Guichea Na ,  Soohan Park ,  Gwangjin Kim

Inventor： Guichea Na ,  Soohan Park ,  Gwangjin Kim

IPC: H01L23/48

CPC classification number: H05K3/4007 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13025 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H05K2201/0367 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2201/098 ,  H05K2201/09854 ,  H05K2203/0733

Abstract: An integrated circuit package system includes a substrate, forming a resist layer having an elongated recess over the substrate, forming a via in the substrate below the elongated recess, and forming an elongated bump in the elongated recess over the via.

Abstract translation: 集成电路封装系统包括衬底，形成在衬底上具有细长凹槽的抗蚀剂层，在细长凹槽下方的衬底中形成通孔，以及在通孔上的细长凹槽中形成细长凸点。

公开(公告)号：US20130277099A1

公开(公告)日：2013-10-24

申请号：US13452600

申请日：2012-04-20

Applicant: Paul Y. Wu

Inventor： Paul Y. Wu

IPC: H05K1/11

CPC classification number: H05K1/0221 ,  H05K1/0242 ,  H05K1/0251 ,  H05K2201/09672 ,  H05K2201/098 ,  H05K2201/09854

Abstract: An electrical circuit structure can include a first trace formed using a first conductive layer and a second trace formed using a second conductive layer. The first trace can be vertically aligned with the second trace. The electrical circuit structure can include a via segment formed of conductive material in a third conductive layer between the first conductive layer and the second conductive layer. The via segment can contact the first trace and the second trace forming a first conductor structure configured to convey an electrical signal in a direction parallel to the first conductive layer.

Abstract translation: 电路结构可以包括使用第一导电层形成的第一迹线和使用第二导电层形成的第二迹线。 第一条迹线可以与第二条迹线垂直对齐。 电路结构可以包括在第一导电层和第二导电层之间的第三导电层中由导电材料形成的通孔段。 通路段可以接触第一迹线和第二迹线，形成构造成在平行于第一导电层的方向上传送电信号的第一导体结构。

公开(公告)号：US08535959B2

公开(公告)日：2013-09-17

申请号：US13512328

申请日：2010-11-04

Applicant: Young Seob Lee

Inventor： Young Seob Lee

IPC: H01L21/00

CPC classification number: H01L33/647 ,  F21K9/00 ,  F21V29/20 ,  F21V29/70 ,  F21V29/89 ,  F21W2131/103 ,  F21Y2115/10 ,  H01L33/642 ,  H01L2224/48091 ,  H05K1/0206 ,  H05K3/0047 ,  H05K3/0061 ,  H05K2201/0305 ,  H05K2201/09854 ,  H05K2201/10106 ,  H05K2203/1572 ,  H01L2924/00014

Abstract: The present invention relates to a method for manufacturing large lighting which uses a power LED, such as for large LED lighting for street lamps, which incorporates a heat dissipation device that has the ability to dissipate heat with natural convection to maintain ambient temperature. The disclosed method is novel applied technology for producing a large LED lighting, such as for street lamps, which has a power LED device with a unique, rear heat dissipation capability. In addition to maximum thermal efficiency by heat dissipation, the present LED lighting system also increases luminous efficiency by providing high light emission with only a small quantity of LED power.

Abstract translation: 本发明涉及一种制造大型照明的方法，其使用功率LED，例如用于路灯的大型LED照明，其包括具有通过自然对流散热以维持环境温度的能力的散热装置。 所公开的方法是用于生产诸如路灯的大型LED照明的新颖应用技术，其具有具有独特的后部散热能力的功率LED装置。 除了通过散热的最大热效率之外，目前的LED照明系统还通过仅提供少量LED功率的高发光量来提高发光效率。

公开(公告)号：US08488329B2

公开(公告)日：2013-07-16

申请号：US12776888

申请日：2010-05-10

Applicant: Tae H. Kim ,  Sang Y. Lee ,  Nam H. Pham

Inventor： Tae H. Kim ,  Sang Y. Lee ,  Nam H. Pham

IPC: H05K7/00 ,  H05K1/11

CPC classification number: H05K3/40 ,  H01L2224/16225 ,  H01L2924/19105 ,  H05K1/0265 ,  H05K1/115 ,  H05K2201/09854 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A system for providing power and ground vias for power distributions systems includes first and second conductive layers on a microelectronic package. The conductive layers may include one or more conductive components such as, but not limited to, power planes, ground planes, pads, traces, and the like for electrically connecting to electronic components. A via may electrically connect the first and second conductive layers. The via may have a cross-section of at least three partially-overlapping shapes. Each of the shapes partially overlaps at least two of the other shapes. The shapes may be, for example, circular, triangular, rectangular, square, polygonal, rhomboidal shape, or any other shape.

Abstract translation: 用于为功率分配系统提供电源和接地通孔的系统包括微电子封装上的第一和第二导电层。 导电层可以包括一个或多个导电部件，例如但不限于用于电连接到电子部件的电源平面，接地平面，焊盘，迹线等。 通孔可以电连接第一和第二导电层。 通孔可以具有至少三个部分重叠形状的横截面。 每个形状部分地与至少两个其他形状重叠。 形状可以是例如圆形，三角形，矩形，正方形，多边形，菱形或任何其它形状。

公开(公告)号：US20130145619A1

公开(公告)日：2013-06-13

申请号：US13757295

申请日：2013-02-01

Applicant: Micron Technology, Inc.

Inventor： Teck Kheng Lee

IPC: H05K13/00

CPC classification number: H05K13/00 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/115 ,  H05K3/4602 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09645 ,  H05K2201/09854 ,  H01L2924/00

Abstract: Partitioned vias, interconnects, and substrates that include such vias and interconnects are disclosed herein. In one embodiment, a substrate has a non-conductive layer and a partitioned via formed in a portion of the non-conductive layer. The non-conductive layer includes a top side, a bottom side, and a via hole extending between the top and bottom sides and including a sidewall having a first section a second section. The partitioned via includes a first metal interconnect within the via on the first section of the sidewall and a second metal interconnect within the via hole on the second section of the sidewall and electrically isolated from the first metal interconnect. In another embodiment, the first metal interconnect is separated from the second metal interconnect by a gap within the via hole.

Abstract translation: 包括这种通孔和互连的分隔的过孔，互连和衬底在本文中公开。 在一个实施例中，衬底具有形成在非导电层的一部分中的非导电层和分隔通孔。 非导电层包括顶侧，底侧和在顶侧和底侧之间延伸的通孔，并且包括具有第一部分和第二部分的侧壁。 分隔通孔包括在侧壁的第一部分上的通孔内的第一金属互连和在侧壁的第二部分上的通孔内的第二金属互连，并与第一金属互连电隔离。 在另一个实施例中，第一金属互连通过通孔内的间隙与第二金属互连分开。