Patent search cpc:"H05K2201/10121" Page 5

41.

发明授权
Electronic device mounting substrate and electronic apparatus 有权

公开(公告)号：US09947836B2

公开(公告)日：2018-04-17

申请号：US15321417

申请日：2015-03-26

Applicant: KYOCERA Corporation

Inventor： Mitsuharu Sakai , Shou Yamasaki , Shigetoshi Inuyama , Noritaka Niino

IPC: H01L33/00 , H01L33/48 , H01L23/053 , H01L27/146 , H01L31/0203 , H01L23/498 , H01L31/0232 , H01L33/58 , H01L31/02 , H01L33/62

CPC classification number: H01L33/483 , H01L23/053 , H01L23/49822 , H01L27/14 , H01L27/14618 , H01L27/14625 , H01L27/14636 , H01L31/02 , H01L31/02002 , H01L31/0203 , H01L31/02325 , H01L33/58 , H01L33/62 , H01L2224/48091 , H01L2224/49175 , H01L2224/73265 , H01L2924/16151 , H01L2924/16152 , H04N5/335 , H05K1/021 , H05K3/0061 , H05K3/4629 , H05K3/4688 , H05K2201/10121 , H05K2203/049 , H01L2924/00014

Abstract: An electronic device mounting substrate includes: a first wiring substrate shaped in a rectangular frame, an interior of the rectangular frame constituting a first through hole; a second wiring substrate shaped in a rectangular frame or plate, the second wiring substrate being disposed so as to overlie a lower surface of the first wiring substrate and be electrically connected to the first wiring substrate; a metallic plate disposed so as to overlie a lower surface of the second wiring substrate so that the second wiring substrate is sandwiched between the metallic plate and the first wiring substrate; and a lens holder secured to an outer periphery of the metallic plate. A frame interior of the first wiring substrate, or a frame interior of each of the first wiring substrate and the second wiring substrate, constitutes an electronic device mounting space.

42.

发明申请
BACKLIGHT UNIT INCLUDING CURVED LIGHT SOURCE UNIT AND DISPLAY APPARATUS HAVING THE SAME 审中-公开

公开(公告)号：US20180092207A1

公开(公告)日：2018-03-29

申请号：US15450188

申请日：2017-03-06

Applicant: Samsung Display Co., Ltd.

Inventor： Minsu JUNG , Dong-wook KIM , Jaesul AN

IPC: H05K1/02 , H05K1/18 , H05K7/02 , F21V8/00

CPC classification number: H05K1/0284 , G02B6/002 , G02B6/0068 , G02B6/0083 , G02B6/009 , G02B6/0091 , H05K1/18 , H05K7/02 , H05K2201/10121 , H05K2201/10128

Abstract: A display apparatus includes a display panel which displays an image with light and a backlight unit which provides the light to the display panel. The backlight unit includes a first light source, a second light source and a circuit board. The circuit board includes in a top plan view, a first edge lengthwise extending parallel to a first direction and a second edge lengthwise extending parallel to a second direction crossing the first direction, and a sidewall portion extending from the bottom portion. In a third direction crossing the first and second directions, the sidewall portion includes first and second sidewall portions respectively extending from the first and second edges, and on which the first and second light sources are mounted.

43.

发明授权
Technologies for high-performance single-stream LZ77 compression 有权

公开(公告)号：US09929747B2

公开(公告)日：2018-03-27

申请号：US15395702

申请日：2016-12-30

Applicant: Intel Corporation

Inventor： Vinodh Gopal , James D. Guilford , Daniel F. Cutter , Kirk S. Yap

IPC: H03M7/38 , H03M7/40 , H04L29/06 , H03M7/30

CPC classification number: H04Q11/0005 , B25J15/0014 , B65G1/0492 , G02B6/3882 , G02B6/3893 , G02B6/3897 , G02B6/4292 , G02B6/4452 , G05D23/1921 , G05D23/2039 , G06F1/183 , G06F3/061 , G06F3/0611 , G06F3/0616 , G06F3/0619 , G06F3/0625 , G06F3/0631 , G06F3/0638 , G06F3/064 , G06F3/0647 , G06F3/0653 , G06F3/0658 , G06F3/0659 , G06F3/0664 , G06F3/0665 , G06F3/067 , G06F3/0673 , G06F3/0679 , G06F3/0683 , G06F3/0688 , G06F3/0689 , G06F8/65 , G06F9/4401 , G06F9/5016 , G06F9/5044 , G06F9/505 , G06F9/5072 , G06F9/5077 , G06F11/141 , G06F11/3414 , G06F12/0862 , G06F12/0893 , G06F12/10 , G06F12/109 , G06F12/1408 , G06F13/161 , G06F13/1668 , G06F13/1694 , G06F13/4022 , G06F13/4068 , G06F13/409 , G06F13/42 , G06F13/4282 , G06F15/8061 , G06F17/30949 , G06F2209/5019 , G06F2209/5022 , G06F2212/1008 , G06F2212/1024 , G06F2212/1041 , G06F2212/1044 , G06F2212/152 , G06F2212/202 , G06F2212/401 , G06F2212/402 , G06F2212/7207 , G06Q10/06 , G06Q10/06314 , G06Q10/087 , G06Q10/20 , G06Q50/04 , G07C5/008 , G08C17/02 , G08C2200/00 , G11C5/02 , G11C5/06 , G11C7/1072 , G11C11/56 , G11C14/0009 , H03M7/30 , H03M7/3084 , H03M7/3086 , H03M7/40 , H03M7/4031 , H03M7/4056 , H03M7/4081 , H03M7/6005 , H03M7/6023 , H04B10/25 , H04B10/2504 , H04L9/0643 , H04L9/14 , H04L9/3247 , H04L9/3263 , H04L12/2809 , H04L29/12009 , H04L41/024 , H04L41/046 , H04L41/0813 , H04L41/082 , H04L41/0896 , H04L41/12 , H04L41/145 , H04L41/147 , H04L41/5019 , H04L43/065 , H04L43/08 , H04L43/0817 , H04L43/0876 , H04L43/0894 , H04L43/16 , H04L45/02 , H04L45/52 , H04L47/24 , H04L47/765 , H04L47/782 , H04L47/805 , H04L47/82 , H04L47/823 , H04L49/15 , H04L49/25 , H04L49/357 , H04L49/45 , H04L49/555 , H04L67/02 , H04L67/10 , H04L67/1004 , H04L67/1008 , H04L67/1012 , H04L67/1014 , H04L67/1029 , H04L67/1034 , H04L67/1097 , H04L67/12 , H04L67/16 , H04L67/306 , H04L67/34 , H04L69/04 , H04L69/329 , H04Q1/04 , H04Q11/00 , H04Q11/0003 , H04Q11/0062 , H04Q11/0071 , H04Q2011/0037 , H04Q2011/0041 , H04Q2011/0052 , H04Q2011/0073 , H04Q2011/0079 , H04Q2011/0086 , H04Q2213/13523 , H04Q2213/13527 , H04W4/023 , H04W4/80 , H05K1/0203 , H05K1/181 , H05K5/0204 , H05K7/1418 , H05K7/1421 , H05K7/1422 , H05K7/1447 , H05K7/1461 , H05K7/1485 , H05K7/1487 , H05K7/1489 , H05K7/1491 , H05K7/1492 , H05K7/1498 , H05K7/2039 , H05K7/20709 , H05K7/20727 , H05K7/20736 , H05K7/20745 , H05K7/20836 , H05K13/0486 , H05K2201/066 , H05K2201/10121 , H05K2201/10159 , H05K2201/10189 , Y10S901/01

Abstract: Technologies for high-performance single-stream data compression include a computing device that updates an index data structure based on an input data stream. The input data stream is divided into multiple chunks. Each chunk has a predetermined length, such as 136 bytes, and overlaps the previous chunk by a predetermine amount, such as eight bytes. The computing device processes multiple chunks in parallel using the index data to generate multiple token streams. The tokens include literal tokens and reference tokens that refer to matching data from earlier in the input data stream. The computing device thus searches for matching data in parallel. The computing device merges the token streams to generate a single output token stream. The computing device may merge a pair of tokens from two different chunks to generate one or more synchronized tokens that are output to the output token stream. Other embodiments are described and claimed.

44.

发明授权
Interconnect structure for E/O engines having impedance compensation at the integrated circuits' front end 有权

公开(公告)号：US09923636B2

公开(公告)日：2018-03-20

申请号：US15403157

申请日：2017-01-10

Applicant: Finisar Corporation

Inventor： Andrei Kaikkonen , Lennart Lundquist , Lars-Goete Svensson , Robert Smith

IPC: H04B10/40 , H05K1/02 , G02B6/42

CPC classification number: H04B10/40 , G02B6/4274 , G02B6/4279 , G02B6/4281 , H04B10/801 , H05K1/0213 , H05K1/0225 , H05K1/0245 , H05K1/0253 , H05K1/11 , H05K2201/10121

Abstract: Disclosed embodiments relate to an interconnect structure for coupling at least one electronic unit for outputting and/or receiving electric signals, and at least one optical unit for converting said electric signals into optical signals and/or vice versa, to a further electronic component. The interconnect structure comprises an electrically insulating substrate and a plurality of signal lead pairs to be coupled between said electronic unit and a front end contact region for electrically contacting said interconnect structure by said further electronic component. A ground plane layer is electrically insulated from said pairs of signal leads, wherein each pair of signal leads has a circuit connecting region for electrically contacting respective terminals of said at least one electronic unit, and wherein in a region adjacent to said terminals of said at least one electronic unit said ground plane layer has a plurality of clearances that are each allocated to one pair of signal leads and separated from a respective neighboring clearance.

45.

发明授权
Process of an embedded component structure 有权

公开(公告)号：US09913418B2

公开(公告)日：2018-03-06

申请号：US15152564

申请日：2016-05-12

Applicant: Unimicron Technology Corp.

Inventor： Tzyy-Jang Tseng , Wei-Ming Cheng

IPC: H05K13/04 , H05K1/11 , H05K1/18 , H05K3/28

CPC classification number: H05K13/04 , H05K1/11 , H05K1/114 , H05K1/183 , H05K1/184 , H05K1/186 , H05K3/284 , H05K2201/09072 , H05K2201/10083 , H05K2201/10121 , H05K2201/10151

Abstract: A wiring board is provided, wherein electrical function of the wiring board is normal, the wiring board has a front side, a reverse side opposite to the front side, an opening and an interconnection layer, the opening penetrates the wiring board and connects the front side and the reverse side, and the interconnection layer is located on the front side and extends toward the opening. A component is bonded to the wiring board, wherein electrical function of the component is normal, the component has an active surface, a back surface opposite to the active surface, and a working area located on the active surface, the active surface is bonded to the interconnection layer, the component is located in the opening, and the active surface and the front side of the wiring board face in a same direction. An encapsulant is filled into the opening, so as to cover the component and expose the working area.

46.

发明授权
Array imaging module and molded photosensitive assembly and manufacturing method thereof for electronic device 有权

公开(公告)号：US09906700B2

公开(公告)日：2018-02-27

申请号：US15473609

申请日：2017-03-30

Applicant: NINGBO SUNNY OPOTECH CO., LTD.

Inventor： Mingzhu Wang , Bojie Zhao , Takehiko Tanaka , Nan Guo , Zhenyu Chen , Heng Jiang , Zhongyu Luan , Fengsheng Xi , Feifan Chen , Liang Ding

IPC: H04N5/225 , G02B3/00 , H05K1/18 , G02B7/00 , H05K1/02 , G02B5/20 , G02B7/02 , H04M1/02 , H01L27/146

CPC classification number: H04N5/2257 , G02B3/0075 , G02B5/201 , G02B7/006 , G02B7/021 , H01L27/14625 , H04M1/0264 , H04N5/2252 , H04N5/2253 , H04N5/2254 , H04N5/2258 , H05K1/0203 , H05K1/0274 , H05K1/183 , H05K1/185 , H05K1/189 , H05K2201/0141 , H05K2201/0158 , H05K2201/0175 , H05K2201/09036 , H05K2201/10121

Abstract: An array imaging module includes a molded photosensitive assembly which includes a supporting member, at least a circuit board, at least two photosensitive units, at least two lead wires, and a mold sealer. The photosensitive units are coupled at the chip coupling area of the circuit board. The lead wires are electrically connected the photosensitive units at the chip coupling area of the circuit board. The mold sealer includes a main mold body and has two optical windows. When the main mold body is formed, the lead wires, the circuit board and the photosensitive units are sealed and molded by the main mold body of the mold sealer, such that after the main mold body is formed, the main mold body and at least a portion of the circuit board are integrally formed together at a position that the photosensitive units are aligned with the optical windows respectively.

47.

发明授权
Display apparatus 有权

公开(公告)号：US09894766B2

公开(公告)日：2018-02-13

申请号：US15149541

申请日：2016-05-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Cheon Ho Park , Jong-Hoi Kim , Han Mi Choi

IPC: G09F13/04 , G09F13/08 , H05K1/14 , F21V7/05 , G02F1/1335 , F21Y101/00 , F21Y105/10 , F21Y115/10

CPC classification number: H05K1/142 , F21V7/05 , F21Y2101/00 , F21Y2105/10 , F21Y2115/10 , G02F1/133603 , G02F1/133605 , G02F1/133608 , G02F2001/133607 , H05K2201/09045 , H05K2201/10106 , H05K2201/10121

Abstract: A display apparatus includes: a display panel; a chassis including a flat part and an inclined part that extends from a side border of the flat part and is inclined with respect to the flat part; at least one printed circuit board (PCB) disposed on the chassis; and a plurality of light sources arranged on the at least one PCB and configured to emit light toward the display panel, wherein at least one light source of the plurality of light sources is arranged at a position corresponding to the inclined part of the chassis.

48.

发明申请
CAMERA SYSTEM 审中-公开

公开(公告)号：US20180042106A1

公开(公告)日：2018-02-08

申请号：US15669921

申请日：2017-08-05

Applicant: HEXAGON TECHNOLOGY CENTER GMBH

Inventor： Jochen SCHEJA

IPC: H05K1/02 , H04N5/225

CPC classification number: H05K1/0271 , H04N5/2253 , H04N5/2254 , H05K2201/068 , H05K2201/10121 , H05K2201/10151

Abstract: A camera system including an objective, an objective holder carrying the objective, an image sensor and a printed circuit board. The printed circuit board and the image sensor are connected to one another in an electronically conductive manner, and the image sensor and the objective are arranged such that an image is n focus on the image sensor. The printed circuit board has a circuit layer made of an electrically insulating material and a printed circuit board substrate, wherein the printed circuit board substrate is manufactured from a material with a coefficient of thermal expansion aL which deviates by no more than 30% from the coefficient of thermal expansion of a material from which the objective holder is manufactured.

49.

发明申请
High Thermal Conductivity Region for Optoelectronic Devices 审中-公开

公开(公告)号：US20180035531A1

公开(公告)日：2018-02-01

申请号：US15224406

申请日：2016-07-29

Applicant: Ravi Kiran Nalla , Raymond Kirk Price

Inventor： Ravi Kiran Nalla , Raymond Kirk Price

IPC: H05K1/02 , G02B6/42 , H05K3/46 , H05K1/18 , H05K3/32

CPC classification number: H05K1/0206 , G02B6/4267 , G02B6/428 , G02B6/4283 , H05K1/0204 , H05K1/0274 , H05K1/183 , H05K3/32 , H05K3/4697 , H05K2201/10106 , H05K2201/10121 , H05K2201/10416 , H05K2201/2054

Abstract: This document describes techniques and apparatuses that implement a high thermal conductivity region for optoelectronic devices. In some embodiments, a printed circuit board (PCB) includes a high thermal conductivity region that extends through the PCB. The high thermal conductivity region has first and second surfaces that are approximately coplanar with exterior layers of the PCB. A side-emitting optoelectronic device is mounted to the first surface of the high thermal conductivity region via conductive material that enables conduction of the device's heat into the high thermal conductivity region. The high thermal conductivity region can then transfer the heat away from the device and toward the second surface of the high thermal conductivity region, thereby improving the device's thermal performance.