公开(公告)号：US20180246145A1

公开(公告)日：2018-08-30

申请号：US15556916

申请日：2016-03-01

Applicant: FRONIUS INTERNATIONAL GmbH

Inventor： Christian MAGERL ,  Franz Peter MUSIL ,  Robert EBERL ,  Friedrich STEINMAURER

IPC: G01R15/00 ,  H01F27/29 ,  H05K1/18 ,  H02M7/06 ,  G01R19/00

CPC classification number: G01R15/005 ,  B23K9/1043 ,  B23K9/32 ,  G01R19/0084 ,  H01F27/29 ,  H02M3/335 ,  H02M7/06 ,  H02M7/155 ,  H02M7/1555 ,  H05K1/181 ,  H05K2201/10166 ,  H05K2201/10174

Abstract: To enable in a circuit arrangement (8) with a transformer with center tap the voltage measurement on the secondary side simply and safely, it is provided that at least two series-connected resistors (R3, R4) are connected between the two outer connections (A1, A2) of the secondary side of the transformer (T) to form a measurement point (P) between the two resistors (R3, R4), and a voltage measurement unit (V) is provided to measure the voltage (UP) between the measurement point (P) and the second output pole (13), which corresponds to the output voltage (UA).

公开(公告)号：US09941235B2

公开(公告)日：2018-04-10

申请号：US15509492

申请日：2015-09-28

Applicant: MITSUBISHI MATERIALS CORPORATION

Inventor： Shuji Nishimoto ,  Yoshiyuki Nagatomo

IPC: H01L21/00 ,  H01L23/12 ,  H01L23/36 ,  H01L23/40 ,  H01L25/07 ,  H01L25/18 ,  H05K3/24 ,  H05K3/26 ,  H01L23/00

CPC classification number: H01L24/32 ,  H01L23/12 ,  H01L23/36 ,  H01L23/3735 ,  H01L23/40 ,  H01L23/473 ,  H01L25/07 ,  H01L25/18 ,  H01L2224/32225 ,  H01L2924/01047 ,  H01L2924/12041 ,  H01L2924/13055 ,  H01L2924/141 ,  H05K1/0203 ,  H05K3/24 ,  H05K3/248 ,  H05K3/26 ,  H05K3/32 ,  H05K2201/10106 ,  H05K2201/10166

Abstract: A power module substrate with a Ag underlayer of the invention includes: a circuit layer that is formed on one surface of an insulating layer; and a Ag underlayer that is formed on the circuit layer, in which the Ag underlayer is composed of a glass layer that is formed on the circuit layer side and a Ag layer that is formed by lamination on the glass layer, and regarding the Ag underlayer, in a Raman spectrum obtained by a Raman spectroscopy with incident light made incident from a surface of the Ag layer on a side opposite to the glass layer, when a maximum value of intensity in a wavenumber range of 3,000 cm−1 to 4,000 cm−1 indicated by IA, and a maximum value of intensity in a wavenumber range of 450 cm−1 to 550 cm−1 is indicated by IB, IA/IB is 1.1 or greater.

公开(公告)号：US20180090412A1

公开(公告)日：2018-03-29

申请号：US15492604

申请日：2017-04-20

Applicant: HITACHI POWER SEMICONDUCTOR DEVICE, LTD.

Inventor： Osamu IKEDA ,  Takayuki KUSHIMA ,  Shinji OKUBO ,  Takaaki MIYAZAKI

IPC: H01L23/367 ,  H01L23/00 ,  H01L23/29 ,  H01L23/15 ,  H01L23/373

CPC classification number: H01L23/3675 ,  H01L23/053 ,  H01L23/15 ,  H01L23/24 ,  H01L23/293 ,  H01L23/3157 ,  H01L23/3735 ,  H01L23/3736 ,  H01L23/49866 ,  H01L23/49894 ,  H01L23/60 ,  H01L24/45 ,  H01L24/46 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L2224/45655 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/183 ,  H05K1/0254 ,  H05K1/0259 ,  H05K1/0306 ,  H05K2201/10166 ,  H01L2924/00014

Abstract: A power module includes: a ceramic substrate that includes a principal surface and a back surface, and is provided with a plurality of metal wirings on the principal surface; a semiconductor chip mounted on any metal wiring of the plurality of metal wirings; and a resin part disposed around each of the plurality of metal wirings. Further, side faces of the metal wirings each have: a first region in which a plating film is formed; a second region that is positioned above the first region and that is a non-plating region; and a third region that is positioned between the first region and the second region and in which metal particles are formed. The resin part is bonded to the metal particles, the plating film, and the principal surface of the ceramic substrate.

公开(公告)号：US20180064363A1

公开(公告)日：2018-03-08

申请号：US15799628

申请日：2017-10-31

Applicant: THALMIC LABS INC.

Inventor： Cezar Morun ,  Stephen Lake

IPC: A61B5/0492 ,  H05K1/16

CPC classification number: A61B5/0492 ,  H05K1/162 ,  H05K1/167 ,  H05K2201/10151 ,  H05K2201/10166 ,  Y10T29/4913

Abstract: Systems, articles, and methods for surface electromyography (“EMG”) sensors that combine elements from traditional capacitive and resistive EMG sensors are described. For example, capacitive EMG sensors that are adapted to resistively couple to a user's skin are described. Resistive coupling between a sensor electrode and the user's skin is galvanically isolated from the sensor circuitry by a discrete component capacitor included downstream from the sensor electrode. The combination of a resistively coupled electrode and a discrete component capacitor provides the respective benefits of traditional resistive and capacitive (respectively) EMG sensor designs while mitigating respective drawbacks of each approach. A wearable EMG device that provides a component of a human-electronics interface and incorporates such capacitive EMG sensors is also described.

公开(公告)号：US09911679B2

公开(公告)日：2018-03-06

申请号：US15425614

申请日：2017-02-06

Applicant: Infineon Techonologies Americas Corp.

Inventor： Eung San Cho

IPC: H01L23/367 ,  H05K1/18 ,  H01L25/18 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01F27/24 ,  H01F1/03

CPC classification number: H01L23/3675 ,  H01F1/0306 ,  H01F27/24 ,  H01L23/13 ,  H01L23/3121 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/645 ,  H01L24/31 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/2919 ,  H01L2224/32013 ,  H01L2224/32245 ,  H01L2224/32265 ,  H01L2224/37124 ,  H01L2224/37144 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/41173 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48108 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/49173 ,  H01L2224/73263 ,  H01L2224/73265 ,  H01L2224/83424 ,  H01L2224/83447 ,  H01L2224/84424 ,  H01L2224/84447 ,  H01L2224/84801 ,  H01L2224/8484 ,  H01L2224/8485 ,  H01L2224/85424 ,  H01L2224/85447 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/13055 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/14252 ,  H01L2924/1426 ,  H01L2924/1427 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/19011 ,  H01L2924/19042 ,  H01L2924/19102 ,  H05K1/0209 ,  H05K1/165 ,  H05K1/181 ,  H05K1/184 ,  H05K1/185 ,  H05K2201/1003 ,  H05K2201/10166 ,  H01L2924/00014

Abstract: A semiconductor package includes a semiconductor die comprising a control transistor and a sync transistor, an integrated output inductor comprising a winding around a core, and coupled to the semiconductor die. The winding comprises a plurality of conductive clips situated above a printed circuit board (PCB) and connected to a plurality of conductive segments in the PCB. The control transistor and the sync transistor are configured as a half-bridge. The integrated output inductor is coupled to a switched node of the half-bridge. At least one of the plurality of conductive clips includes a partially etched portion and a non-etched portion. The semiconductor die is attached to the integrated output inductor by a die attach material. The semiconductor die and the integrated output inductor are encapsulated in a molding compound.

公开(公告)号：US20180048270A1

公开(公告)日：2018-02-15

申请号：US15349225

申请日：2016-11-11

Applicant: QUALCOMM INCORPORATED

Inventor： Tianzuo Xi ,  Haichuan Kang ,  ZhenQi Chen ,  Zhenying Luo ,  Xiangdong Zhang ,  Xinwei Wang ,  Yanjie Sun ,  Yan Kit Gary Hau ,  Jing-Hwa Chen

IPC: H03F1/56 ,  H03F3/24 ,  H01L29/20 ,  H01L29/737 ,  H04B1/38 ,  H01L23/498 ,  H01L23/66 ,  H05K1/18 ,  H05K1/11 ,  G06F1/16 ,  H03F3/195 ,  H01L23/00

CPC classification number: H03F1/565 ,  G06F1/1616 ,  G06F1/1626 ,  H01L23/49827 ,  H01L23/49844 ,  H01L23/66 ,  H01L24/06 ,  H01L24/46 ,  H01L29/20 ,  H01L29/737 ,  H01L2223/6616 ,  H01L2223/6655 ,  H01L2224/04042 ,  H01L2224/16225 ,  H01L2224/4813 ,  H01L2224/4911 ,  H01L2224/73257 ,  H03F3/193 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/387 ,  H04B1/38 ,  H05K1/115 ,  H05K1/18 ,  H05K2201/10015 ,  H05K2201/1003 ,  H05K2201/10166

Abstract: A circuit including a radio frequency (RF) amplifier including a transistor configured to receive an RF signal at its control terminal, a capacitor coupled to a first terminal of the transistor, an inductor coupled to a second terminal of the transistor, wherein the capacitor and inductor form a loop from the first terminal to the second terminal, wherein the loop bypasses a parasitic inductance between the second terminal and ground.

公开(公告)号：US20180035544A1

公开(公告)日：2018-02-01

申请号：US15223621

申请日：2016-07-29

Applicant: International Business Machines Corporation

Inventor： Ralph HELLER ,  Patricia Maria SAGMEISTER ,  Martin Leo SCHMATZ

IPC: H05K1/18 ,  H05K3/30

CPC classification number: H05K3/4007 ,  H05K3/366 ,  H05K2201/049 ,  H05K2201/10166

Abstract: Embodiments of the present invention are directed to an integrated circuit (IC) package assembly. The IC package assembly includes a base printed circuit board (PCB), and a set of IC packages. Each of the IC packages includes at least one IC chip, mounted on or partly in a support component, which mechanically supports and electrically connects to the IC chip. In addition, each of the IC packages is laterally soldered to the base PCB (e.g., a motherboard PCB) and arranged transversally to the base PCB and forms an angle α therewith. As a result, a slanted stack of IC packages is obtained, wherein the IC packages are essentially parallel to each other. Further embodiments are directed to related devices, including the above assembly, and to related fabrication methods.

公开(公告)号：US20180014373A1

公开(公告)日：2018-01-11

申请号：US15587567

申请日：2017-05-05

Applicant: Lumileds LLC

Inventor： Zhihua Song ,  Wouter Soer ,  Ron Bonne ,  Yifeng Qiu

IPC: H05B33/08 ,  H05K1/02 ,  H05K3/40 ,  H05K1/11 ,  H05K1/18 ,  H05K3/46 ,  H05K3/30 ,  H05K1/05

CPC classification number: H05B33/0845 ,  H01L25/167 ,  H01L25/50 ,  H01R13/6591 ,  H05B33/0809 ,  H05B33/0815 ,  H05B33/0884 ,  H05B33/0887 ,  H05K1/0203 ,  H05K1/0215 ,  H05K1/0224 ,  H05K1/024 ,  H05K1/0243 ,  H05K1/0251 ,  H05K1/0262 ,  H05K1/053 ,  H05K1/056 ,  H05K1/111 ,  H05K1/115 ,  H05K1/181 ,  H05K3/0061 ,  H05K3/107 ,  H05K3/146 ,  H05K3/16 ,  H05K3/181 ,  H05K3/303 ,  H05K3/4076 ,  H05K3/44 ,  H05K3/4608 ,  H05K3/4644 ,  H05K3/465 ,  H05K3/4661 ,  H05K3/467 ,  H05K3/4679 ,  H05K3/4688 ,  H05K9/0084 ,  H05K9/0088 ,  H05K13/00 ,  H05K2201/066 ,  H05K2201/0723 ,  H05K2201/093 ,  H05K2201/09327 ,  H05K2201/09563 ,  H05K2201/10106 ,  H05K2201/10166 ,  H05K2201/10522

Abstract: A multi-layer metal core printed circuit board (MCPCB) has mounted on it at least one or more heat-generating LEDs and one or more devices configured to provide current to the one or more LEDs. The one or more devices may include a device that carries a steep slope voltage waveform. Since there is typically a very thin dielectric between the patterned copper layer and the metal substrate, the steep slope voltage waveform may produce a current in the metal substrate due to AC coupling via parasitic capacitance. This AC-coupled current may produce electromagnetic interference (EMI). To reduce the EMI, a local shielding area may be formed between the metal substrate and the device carrying the steep slope voltage waveform. The local shielding area may be conductive and may be electrically connected, to a DC voltage node adjacent to the one or more devices.

公开(公告)号：US09807848B2

公开(公告)日：2017-10-31

申请号：US14792092

申请日：2015-07-06

Applicant: YISSUM RESEARCH DEVELOPMENT COMPANY OF THE HEBREW UNIVERSITY OF JERUSALEM, LTD.

Inventor： Shlomo Magdassi ,  Michael Grouchko ,  Michael Layani

IPC: H05B33/28 ,  H01B1/02 ,  H01B1/10 ,  H01L31/0224 ,  C23C4/18 ,  C23C26/00 ,  H01L31/18 ,  H05K1/03 ,  H05K1/09 ,  H05K3/12 ,  C23C16/513 ,  B05D3/10 ,  B05D5/06 ,  B05D5/12 ,  H01L33/42 ,  H05K1/02 ,  H05K3/14

CPC classification number: H05B33/28 ,  B05D3/107 ,  B05D5/061 ,  B05D5/12 ,  C23C4/18 ,  C23C16/513 ,  C23C26/00 ,  H01B1/02 ,  H01B1/026 ,  H01B1/10 ,  H01L31/022466 ,  H01L31/1884 ,  H01L33/42 ,  H01L2924/0002 ,  H01L2933/0016 ,  H05K1/0225 ,  H05K1/0278 ,  H05K1/0306 ,  H05K1/0313 ,  H05K1/0386 ,  H05K1/0393 ,  H05K1/092 ,  H05K1/095 ,  H05K1/097 ,  H05K3/125 ,  H05K3/14 ,  H05K2201/0257 ,  H05K2201/026 ,  H05K2201/0302 ,  H05K2201/0323 ,  H05K2201/0329 ,  H05K2201/0338 ,  H05K2201/035 ,  H05K2201/0391 ,  H05K2201/0969 ,  H05K2201/10053 ,  H05K2201/10106 ,  H05K2201/10151 ,  H05K2201/10166 ,  H05K2201/10174 ,  H05K2203/0545 ,  H05K2203/1173 ,  H05K2203/125 ,  Y02E10/50 ,  Y10T428/24273 ,  Y10T428/24331 ,  Y10T428/249978 ,  Y10T428/249979 ,  H01L2924/00

Abstract: The invention provides processes for the manufacture of conductive transparent films and electronic or optoelectronic devices comprising same.

公开(公告)号：US09788411B2

公开(公告)日：2017-10-10

申请号：US15090207

申请日：2016-04-04

Applicant: DENSO CORPORATION

Inventor： Tsuyoshi Tashima

IPC: H05K7/20 ,  H05K1/02

CPC classification number: H05K1/0209 ,  H05K2201/066 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/1003 ,  H05K2201/10053 ,  H05K2201/10166 ,  H05K2201/10409 ,  H05K2201/10545 ,  H05K2201/1056

Abstract: An electronic control unit includes a substrate, an electronic component, a heat sink, a cover, a heat accumulator, and a screw. A wiring pattern is formed on the substrate. The electronic component is mounted on the substrate and generates heat upon energization thereof. The heat sink is provided on one side of the substrate in its thickness direction. The cover is made of resin and is provided on the other side of the substrate in its thickness direction. The heat accumulator is fixed to a part of the cover on the substrate-side and is in contact with a surface of the substrate on the cover-side. One end of the screw is connected to the heat sink. A central portion of the screw is inserted through a hole passing through the substrate in its thickness direction. The other end of the screw is connected to the heat accumulator.