Abstract:
In a lead frame board, while a heat radiation wall member formed by a resin having a relatively high thermal conductivity is provided in a low heat-resistance heat generating component mounting region where a low heat-resistance heat generating component is mounted, heat block wall members formed by resins having relatively low thermal conductivities are provided in a high heat-resistance heat generating component mounting region where a high heat-resistance heat generating component is mounted and in a non-heat generating component mounting region where a non-heat generating component is mounted. Thus, heat block is performed between the low heat-resistance heat generating component mounting region and the high heat-resistance heat generating component mounting region and non-heat generating component mounting region, and a heat radiation function is enhanced in the low heat-resistance heat generating component.
Abstract:
Embodiments of the invention relate to a method of functional materials deposition using a polymer template fabricated on a substrate. Such template forms an exposed and masked areas of the substrate material, and can be fabricated using polymer resists or Self-assembled monolayers. Deposition is performed using an applicator, which is fabricated in the shape of cylinder or cone made of soft elastomeric materials or laminated with soft elastomeric film. Functional materials, for example, metals, semiconductors, sol-gels, colloids of particles are deposited on the surface of applicator using liquid immersion, soaking, contact with wetted surfaces, vapor deposition or other techniques. Then wetted applicator is contacted the surface of the polymer template and rolled over it's surface. During this dynamic contact functional material is transferred selectively to the areas of the template. Patterning of functional material is achieved by lift-off of polymeric template after deposition. According to another embodiment, where self-assembled monolayers are used as template, selective deposition of functional materials is achieved either due to low surface energy of SAM or reactivity of terminal groups.
Abstract:
An upper sealing ring and a lower sealing ring are adhered by sealing solder. The width of tip end of sealing projection is narrower than the width of the lower sealing ring. Therefore, the sealing solder is placed on lower sealing ring and on the side surface of upper sealing ring. Further, an upper connection pad and a lower connection pad are adhered by connecting solder. The width of a tip end of a connection projection is narrower than the width of lower connection pad. Therefore, the connecting solder is placed on the lower connection pad and on the side surface of upper connection pad. Thus, a package is provided, which attains satisfactory electrical connection and hermetic seal after solder joint of the upper and lower substrates.
Abstract:
A pedestal connector that incorporates one or more grouped element channel link transmission lines is seen to have a dielectric body and two opposing contact ends that are intended to contact opposing contacts or traces. The dielectric body has an S-shaped configuration such that the transmission lines supported thereon make at least one change in direction, thereby permitting the use of such connector to interconnect elements lying in two different planes. The transmission lines include slots that extend within the frame and which define opposing, conductive surfaces formed on the dielectric body which are separated by an intervening air gap.
Abstract:
A porous resin substrate and a manufacturing method thereof. The substrate comprises a porous resin film having at least one functional part including electrodes or circuits, or both of them, and the porous resin film has a height-altered part, the height of which is different from the height of the functional part.
Abstract:
An electronic component has an element, a pair of terminal portions which are disposed on the element, and an external covering material which covers a part of the terminal portions and the element. The electronic component is configured such that inclined portions are disposed on corner portions of a bottom surface and side surfaces of the external covering material, and the terminal portions are protruded from corner portions where the inclined portions and the bottom surface of the external covering material intersect.
Abstract:
Methods are disclosed for manufacturing electronic devices (e.g., transistors, and etc.), solar arrays, optical display arrays, portions of such devices and arrays, and the like. Utilizing a scrape coating and/or a tip printing process, various electronic and solar arrays are manufactured.
Abstract:
A carrier body for electrical or electronic component elements or circuits, the carrier body being electrically nonconductive or virtually nonconductive. In order to simplify the carrier body while at the same time providing extremely improved heat dissipation, the invention process that the carrier body is provided integrally with heat-dissipating or heat-supplying cooling elements.
Abstract:
There is provided a case structure having a conductive pattern and a method of manufacturing the same. A case structure having a conductive pattern according to an aspect of the invention includes a case having at least one via hole formed therein; at least conductive pattern formed on an outer surface of the case; and a conductive via formed within the via hole and electrically connecting the at least one conductive pattern to a board inside the case.
Abstract:
Methods here disclosed provide for selectively coating the top surfaces or ridges of a 3-D substrate while avoiding liquid coating material wicking into micro cavities on 3-D substrates. The substrate includes holes formed in a three-dimensional substrate by forming a sacrificial layer on a template. The template includes a template substrate with posts and trenches between the posts. The steps include subsequently depositing a semiconductor layer and selectively etching the sacrificial layer. Then, the steps include releasing the semiconductor layer from the template and coating the 3-D substrate using a liquid transfer coating step for applying a liquid coating material to a surface of the 3-D substrate. The method may further include coating the 3-D substrate by selectively coating the top ridges or surfaces of the substrate. Additional features may include filling the micro cavities of the substrate with a filling material, removing the filling material to expose only the substrate surfaces to be coated, coating the substrate with a layer of liquid coating material, and removing said filling material from the micro cavities of the substrate.