公开(公告)号：US07541883B2

公开(公告)日：2009-06-02

申请号：US11598491

申请日：2006-11-13

Applicant: Thomas A. Knecht ,  Robert Jacobson ,  Glen Reeser

Inventor： Thomas A. Knecht ,  Robert Jacobson ,  Glen Reeser

IPC: H03B5/18 ,  H03L7/099

CPC classification number: H03B5/1805 ,  H03B5/1221 ,  H03B5/1231 ,  H03B5/1243 ,  H03L7/06 ,  H03L7/099 ,  H03L7/16 ,  H05K1/0243 ,  H05K1/141 ,  H05K3/403 ,  H05K2201/09181 ,  H05K2201/1006 ,  H05K2201/10068 ,  H05K2201/10075 ,  H05K2201/10689

Abstract: A synthesizer module/oscillator assembly includes a voltage controlled oscillator with a coaxial resonator. In one embodiment, the module measures 20.3 mm×14.8 mm×3.9 mm and the coaxial resonator is positioned on the circuit board of the module between a phase locked loop integrated circuit and a main section of the voltage controlled oscillator. The phase locked loop circuit includes a loop filter and is adapted to receive the frequency signal generated by the voltage controlled oscillator and generate an adjusted frequency signal.

Abstract translation: 合成器模块/振荡器组件包括具有同轴谐振器的压控振荡器。 在一个实施例中，该模块测量为20.3mm×14.8mm×3.9mm，并且同轴谐振器位于模块的电路板之间的锁相环集成电路和压控振荡器的主要部分之间。 锁相环电路包括环路滤波器，并且适于接收由压控振荡器产生的频率信号并产生经调整的频率信号。

公开(公告)号：US20090130369A1

公开(公告)日：2009-05-21

申请号：US11984559

申请日：2007-11-20

Applicant: Chien-Hao Huang ,  Wen-Chih Li

Inventor： Chien-Hao Huang ,  Wen-Chih Li

IPC: B32B5/00 ,  B05D5/12

CPC classification number: H05K1/0234 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/141 ,  H05K1/167 ,  H05K1/185 ,  H05K3/3442 ,  H05K3/4611 ,  H05K3/4688 ,  H05K2201/09181 ,  H05K2201/09309 ,  H05K2201/10045 ,  Y10T428/239

Abstract: An embedded type multifunctional integrated structure and a method for manufacturing the same are disclosed. The present invention utilizes the concept of multi-layer design to integrated more than two passive components on a component structure that would be adhered to a substrate. Hence, the embedded type multifunctional integrated structure has an OCP function, an OVP function, an anti-EMI function, and an anti-ESD function at the same time. Therefore, the present invention effectively integrated two or more than one passive components in order to increase function of the embedded type multifunctional integrated structure. Moreover, the present invention effectively reduces the size of the passive components on a PCB and reduces the number of solder joints.

Abstract translation: 公开了一种嵌入式多功能一体化结构及其制造方法。 本发明利用多层设计的概念将多于两个的无源部件集成在将粘附到基板上的部件结构上。 因此，嵌入式多功能一体化结构同时具有OCP功能，OVP功能，抗EMI功能和抗ESD功能。 因此，为了增加嵌入式多功能一体化结构的功能，本发明有效地集成了两个或多个无源部件。 此外，本发明有效地减小了PCB上的无源部件的尺寸，并且减少了焊点的数量。

公开(公告)号：US07532485B2

公开(公告)日：2009-05-12

申请号：US11435716

申请日：2006-05-18

Applicant: Junichi Kimura ,  Kazuhiko Honjo ,  Eiji Kawamoto ,  Shinji Harada ,  Motoyoshi Kitagawa

Inventor： Junichi Kimura ,  Kazuhiko Honjo ,  Eiji Kawamoto ,  Shinji Harada ,  Motoyoshi Kitagawa

IPC: H05K1/14

CPC classification number: H05K1/144 ,  H01L23/49827 ,  H01L23/5384 ,  H01L24/97 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/117 ,  H01L25/50 ,  H01L2224/16225 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06565 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01087 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/1627 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K1/0237 ,  H05K1/185 ,  H05K3/0052 ,  H05K3/3436 ,  H05K3/403 ,  H05K3/42 ,  H05K2201/09181 ,  H05K2201/10371 ,  H05K2201/10666 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

Abstract: A multilayer module includes a parts-containing module whose circuit board has been mounted at one surface with an electronic component and the electronic component is covered with a resin layer. Connection terminals are provided either at the resin layer or at the other surface of the circuit board, and a through hole is provided for connection between the two surfaces of the module. Also included is a module, which is provided with connection terminals at a place corresponding to the connection terminal, and the through hole for connection between the connection terminals and electronic component. An insulation layer is disposed between conductor layers, the insulation layer having a conductive bond for connection between connection terminals, respectively. Locations of a through hole and an electronic component in the module are not restricted by a location of the through hole.

Abstract translation: 多层模块包括其电路板已经在一个表面上安装有电子部件并且电子部件被树脂层覆盖的部件容纳模块。 连接端子设置在电路板的树脂层或另一表面处，并且设置用于在模块的两个表面之间连接的通孔。 还包括在与连接端子相对应的位置处设置有连接端子的模块和用于连接端子和电子部件之间的连接的通孔。 绝缘层设置在导体层之间，绝缘层分别具有用于连接端子之间连接的导电接合。 模块中的通孔和电子部件的位置不受通孔的位置的限制。

公开(公告)号：US07506438B1

公开(公告)日：2009-03-24

申请号：US09712749

申请日：2000-11-14

Applicant: Chia-Yu Fu ,  Thomas A. Wetteroth ,  Rong-Fong Huang

Inventor： Chia-Yu Fu ,  Thomas A. Wetteroth ,  Rong-Fong Huang

IPC: H01K3/10

CPC classification number: H05K3/403 ,  H01L21/4857 ,  H01L23/49805 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2924/00014 ,  H05K1/0306 ,  H05K3/0052 ,  H05K3/341 ,  H05K3/3442 ,  H05K3/3484 ,  H05K3/4061 ,  H05K2201/09181 ,  H05K2201/09781 ,  H05K2201/10969 ,  Y02P70/613 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2224/05599

Abstract: A low profile integrated module is fabricated to include sheets of material, such as ceramic or PCB, fixed together and including a via extending through at least one of the plurality of sheets from the lower module surface partially to the upper module surface and in a side module surface. The via is filled with conductive material. The module is then mounted on a supporting substrate having a solder pad on the mounting surface with an area greater than the lower surface of the via. The lower surface of the via is positioned adjacent the upper surface of the mounting pad and soldered so that solder wicks up the via along the side module surface.

Abstract translation: 制造薄型集成模块以包括固定在一起的片材材料，例如陶瓷或PCB，并且包括通过多个片材中的至少一个从下模块表面部分地延伸到上模块表面并在侧面 模块表面。 通孔填充有导电材料。 然后将该模块安装在具有在安装表面上的焊盘的支撑基板上，其面积大于通孔的下表面。 通孔的下表面邻近安装焊盘的上表面定位并焊接，使得焊料沿着侧模块表面吸取通孔。

公开(公告)号：US20090045495A1

公开(公告)日：2009-02-19

申请号：US12186573

申请日：2008-08-06

Applicant: Yoshiki Takayama

Inventor： Yoshiki Takayama

IPC: H01L23/48

CPC classification number: H01L23/49805 ,  H01L2924/0002 ,  H05K3/3442 ,  H05K2201/09181 ,  H05K2201/10727 ,  Y02P70/613 ,  H01L2924/00

Abstract: Side terminals 3 at respective corners of a package are higher than side terminals 4 on each side of the package. Thus, even if the side terminals 4 on each side are lower than those according to the conventional art owing to miniaturization or the like, when a device is mounted on a mounting substrate by soldering, a solder fillet 11 of a sufficient size can be formed between each of the corner side terminals 3, which significantly affect reliability, and a corresponding terminal on the mounting substrate. Thus, the device can be more reliably mounted on the mounting substrate by soldering.

Abstract translation: 在封装的各个角部处的侧端子3比包装的每一侧上的侧端子4高。 因此，即使由于小型化等而使两侧的侧端子4比现有技术那样低，所以当通过焊接将装置安装在安装基板上时，可以形成足够尺寸的焊接圆角11 在每个角部侧端子3之间，其显着影响可靠性，以及安装基板上的相应端子。 因此，可以通过焊接将装置更可靠地安装在安装基板上。

公开(公告)号：US20080084225A1

公开(公告)日：2008-04-10

申请号：US11545958

申请日：2006-10-10

Applicant: Amir Salehi ,  Reese Cutler ,  David Reha

Inventor： Amir Salehi ,  Reese Cutler ,  David Reha

IPC: G01R31/02

CPC classification number: G01R31/2818 ,  G01R31/2808 ,  H05K1/0268 ,  H05K3/403 ,  H05K2201/09181

Abstract: Methods and apparatuses for testing circuit boards having side mounted test pads are described here.In one aspect of the invention, a test method includes applying test probes to test pads located on at least one side plane of a circuit board. The test method further includes testing components of the circuit board by applying electrical signals to the test pads that are each coupled to at least one of a plurality of conductive members coupled to the circuit board.

Abstract translation: 这里描述了用于测试具有侧面安装的测试焊盘的电路板的方法和装置。 在本发明的一个方面，测试方法包括将测试探针应用于位于电路板的至少一个侧面上的测试焊盘。 测试方法还包括通过将电信号施加到测试焊盘来测试电路板的组件，每个耦合到耦合到电路板的多个导电构件中的至少一个。

公开(公告)号：US20070285740A1

公开(公告)日：2007-12-13

申请号：US11799106

申请日：2007-04-30

Applicant: Hiroaki Onishi ,  Hideki Sawada ,  Hiromi Ogata

Inventor： Hiroaki Onishi ,  Hideki Sawada ,  Hiromi Ogata

IPC: H04N1/04

CPC classification number: H05K1/148 ,  H04N1/02815 ,  H04N1/02835 ,  H04N1/0312 ,  H04N1/0315 ,  H04N1/0318 ,  H04N2201/03112 ,  H04N2201/03133 ,  H04N2201/03141 ,  H04N2201/03145 ,  H04N2201/03179 ,  H05K1/0306 ,  H05K3/0052 ,  H05K3/3405 ,  H05K3/3447 ,  H05K3/366 ,  H05K2201/09063 ,  H05K2201/0909 ,  H05K2201/09181 ,  H05K2201/0969 ,  H05K2201/10106 ,  H05K2201/1034 ,  H05K2201/10386 ,  H05K2201/10446

Abstract: An image sensor module includes a first substrate, a second substrate, a plurality of light receiving elements mounted on the first substrate, a light source mounted on the second substrate, and a light guide for emitting light from the light source as linear light extending in the primary scanning direction. The light receiving elements are aligned in the primary scanning direction. The second substrate is arranged perpendicularly to the primary scanning direction. The light source includes an LED chip mounted on the second substrate.

Abstract translation: 图像传感器模块包括第一基板，第二基板，安装在第一基板上的多个光接收元件，安装在第二基板上的光源，以及用于从光源发射光的光导， 主扫描方向。 光接收元件在主扫描方向上对齐。 第二基板垂直于主扫描方向布置。 光源包括安装在第二基板上的LED芯片。

公开(公告)号：US07259639B2

公开(公告)日：2007-08-21

申请号：US10403343

申请日：2003-03-28

Applicant: Deirdre Anne DeBhailis ,  Bill Allen Keeney ,  Piotr Miroslaw Solski

Inventor： Deirdre Anne DeBhailis ,  Bill Allen Keeney ,  Piotr Miroslaw Solski

IPC: H03H7/48

CPC classification number: H05K1/165 ,  H01F17/0006 ,  H03H7/0115 ,  H03H7/0123 ,  H05K1/0231 ,  H05K1/141 ,  H05K3/0052 ,  H05K3/3442 ,  H05K3/403 ,  H05K2201/086 ,  H05K2201/09063 ,  H05K2201/09181 ,  H05K2201/1006 ,  H05K2203/171

Abstract: Inductor topologies for filters used in broadband applications are described. In one implementation, an apparatus, such as an interface module includes a printed circuit board and a filter. The filter includes a generally circular high Quality factor (Q) value spiral planar inductor etched directly into the printed circuit board. The generally circular high Q value spiral planar inductor is configured to operate in a broadband application. Other implementations involve the use of decoupling structures with respect to the planar inductors as well as a design methodology for the filters.

Abstract translation: 描述了宽带应用中使用的滤波器的电感拓扑。 在一个实现中，诸如接口模块的装置包括印刷电路板和滤波器。 滤波器包括直接蚀刻到印刷电路板中的大致圆形的高质量因子（Q）值螺旋平面电感器。 通常圆形的高Q值螺旋平面电感器被配置为在宽带应用中操作。 其他实现涉及使用关于平面电感器的去耦结构以及用于滤波器的设计方法。

公开(公告)号：US20070103269A1

公开(公告)日：2007-05-10

申请号：US11642771

申请日：2006-12-19

Applicant: Jun-Ku Han ,  Su-An Choi ,  Chang-Mo Ko ,  An-Na Lee ,  Jong-Hwan Lee ,  Ju-Dam Kim ,  Jong-Ho Lee ,  Dong-Hyun Kim

Inventor： Jun-Ku Han ,  Su-An Choi ,  Chang-Mo Ko ,  An-Na Lee ,  Jong-Hwan Lee ,  Ju-Dam Kim ,  Jong-Ho Lee ,  Dong-Hyun Kim

IPC: H01C7/13 ,  H01C7/10

CPC classification number: H05K3/3442 ,  H01C1/148 ,  H01C7/008 ,  H05K2201/09181 ,  H05K2201/09381 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

Abstract: A thermistor, which is to be mounted on a PCB, for protecting other circuit elements is disclosed. Electrode patterns separately formed on both surfaces of a film resistance element are respectively shaped into two parts which are engaged to each other with a non-conductive gap interposed therebetween. Thus, a Tombstone phenomenon caused by asymmetric structure may be fundamentally prevented. Grooves are formed in both sides of the thermistor, and connection portions for electrically connecting the electrodes formed on both surfaces of the thermistor are formed through the inside of the grooves or through the sides except the grooves. Thus, though a crack arises in the connection portion, it is possible to prevent the crack from being propagated to the entire connection portion along the side of the thermistor.

Abstract translation: 公开了一种要安装在PCB上的热敏电阻，用于保护其他电路元件。 分别形成在膜电阻元件的两个表面上的电极图案分别成形为彼此接合的两个部分，其间插入非导电间隙。 因此，可以从根本上防止由不对称结构引起的墓碑现象。 在热敏电阻的两侧形成槽，并且通过槽的内部或通过除了凹槽之外的侧面形成用于电连接形成在热敏电阻的两个表面上的电极的连接部。 因此，尽管在连接部分发生裂缝，但是可以防止裂纹沿着热敏电阻的一侧传播到整个连接部分。

公开(公告)号：US07173511B2

公开(公告)日：2007-02-06

申请号：US10859505

申请日：2004-06-01

Applicant: Jun-Ku Han ,  Su-An Choi ,  Chang-Mo Ko ,  An-Na Lee ,  Jong-Hwan Lee ,  Ju-Dam Kim ,  Jong-Ho Lee ,  Dong-Hyun Kim

Inventor： Jun-Ku Han ,  Su-An Choi ,  Chang-Mo Ko ,  An-Na Lee ,  Jong-Hwan Lee ,  Ju-Dam Kim ,  Jong-Ho Lee ,  Dong-Hyun Kim

IPC: H01C7/10

CPC classification number: H05K3/3442 ,  H01C1/148 ,  H01C7/008 ,  H05K2201/09181 ,  H05K2201/09381 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

Abstract: A thermistor, which is to be mounted on a PCB, for protecting other circuit elements is disclosed. Electrode patterns separately formed on both surfaces of a film resistance element are respectively shaped into two parts which are engaged to each other with a non-conductive gap interposed therebetween. Thus, a Tombstone phenomenon caused by asymmetric structure may be fundamentally prevented. Grooves are formed in both sides of the thermistor, and connection portions for electrically connecting the electrodes formed on both surfaces of the thermistor are formed through the inside of the grooves or through the sides except the grooves. Thus, though a crack arises in the connection portion, it is possible to prevent the crack from being propagated to the entire connection portion along the side of the thermistor.