公开(公告)号：US20100188167A1

公开(公告)日：2010-07-29

申请号：US12376738

申请日：2007-09-07

Applicant: Jeff Devereux ,  Fritz Gerd Berger ,  William A. Johnston ,  Mohammad Ali Tassoudji ,  Scott Aldern

Inventor： Jeff Devereux ,  Fritz Gerd Berger ,  William A. Johnston ,  Mohammad Ali Tassoudji ,  Scott Aldern

IPC: H01P5/12

CPC classification number: H01P5/085 ,  H05K1/0243 ,  H05K1/116 ,  H05K3/3447 ,  H05K2201/09718 ,  H05K2201/09809 ,  Y10T29/49139

Abstract: A compact Ku band microwave diplexer configured as a three port surface mount component on a miniature alumina substrate. Input signals occurring at a common port having frequencies within a first pass band are passed to a second port while being isolated from signals occurring at a third port. Signals occurring at the third port are passed to the common port while being isolated from the signals at the second port. A microstrip dual spur line filter is used combined with open circuit stubs to provide enhanced second harmonic suppression on the transmit side, while using a coupled line microstrip filter on the receive side. This approach allows for compact size and automated component assembly through pick and place and reflow manufacturing techniques.

Abstract translation: 在微型氧化铝基板上构造为三端口表面安装部件的紧凑型Ku波段微波双工器。 在具有第一通带内的频率的公共端口处发生的输入信号被传递到第二端口，同时与在第三端口处发生的信号隔离。 在第三个端口发生的信号被传递到公共端口，同时与第二个端口的信号隔​​离。 微带双支路线路滤波器与开路短路组合使用，以在发射侧提供增强的二次谐波抑制，同时在接收侧使用耦合线路微带滤波器。 这种方法允许通过拾取和放置和回流制​​造技术实现紧凑的尺寸和自动部件组装。

公开(公告)号：US07754980B2

公开(公告)日：2010-07-13

申请号：US11620031

申请日：2007-01-04

Applicant: Chien Hao Wang

Inventor： Chien Hao Wang

IPC: H01R12/04 ,  H05K1/11

CPC classification number: H05K1/0222 ,  H05K1/115 ,  H05K3/428 ,  H05K2201/09809 ,  H05K2203/135

Abstract: A structure with a multilayer plated through hole is disclosed. At least one dielectric layer formed by deposition and a conductive layer are formed in an original plated through hole (PTH). The dielectric layer partially covers wiring layers of the substrate to electrically isolate the PTH and the conductive layer to form a multilayer PTH so as to save PTH occupation space of the substrate. Preferably, the formation of the dielectric layer is electrophoretic deposition to control the deposition thickness in the PTH very even and thin, no drilling is necessary. Accordingly, it can increase electrical performance and decrease cross-talk effect.

Abstract translation: 公开了具有多层电镀通孔的结构。 在原电镀通孔（PTH）中形成由沉积形成的至少一个电介质层和导电层。 电介质层部分地覆盖基板的布线层，以电隔离PTH和导电层以形成多层PTH，以便节省基板的PTH占用空间。 优选地，电介质层的形成是电泳沉积，以控制PTH中的沉积厚度非常均匀且薄，不需要钻孔。 因此，可以提高电气性能并降低串扰效果。

公开(公告)号：US20100163296A1

公开(公告)日：2010-07-01

申请号：US12468058

申请日：2009-05-19

Applicant: Cheng-Ta Ko ,  Min-Lin Lee ,  Wei-Chung Lo ,  Shur-Fen Liu ,  Jinn-Shing King ,  Shinn-Juh Lai ,  Yu-Hua Chen

Inventor： Cheng-Ta Ko ,  Min-Lin Lee ,  Wei-Chung Lo ,  Shur-Fen Liu ,  Jinn-Shing King ,  Shinn-Juh Lai ,  Yu-Hua Chen

IPC: H05K1/11 ,  B44C1/22

CPC classification number: H05K1/0222 ,  H05K3/429 ,  H05K2201/09636 ,  H05K2201/09645 ,  H05K2201/09809

Abstract: A plurality of coaxial leads is made within a single via in a circuit substrate to enhance the density of vertical interconnection so as to match the demand for higher density multi-layers circuit interconnection between top circuit layer and bottom circuit layer of the substrate. Coaxial leads provide electromagnetic interference shielding among the plurality of coaxial leads in a single via.

Abstract translation: 多个同轴引线在电路基板中的单个通孔内形成，以增强垂直互连的密度，以便匹配在衬底的顶层电路层和底层电路层之间的较高密度多层电路互连的需求。 同轴引线在单个通孔中的多个同轴引线之间提供电磁干扰屏蔽。

公开(公告)号：US20100127814A1

公开(公告)日：2010-05-27

申请号：US12639886

申请日：2009-12-16

Applicant: Ronald W. Whittaker ,  Joe D. Guerra ,  Ciprian Marcoci

Inventor： Ronald W. Whittaker ,  Joe D. Guerra ,  Ciprian Marcoci

IPC: H01F27/28

CPC classification number: H01F17/0033 ,  H01F17/062 ,  H01F19/04 ,  H01F27/266 ,  H01F27/2804 ,  H01F41/046 ,  H01F2017/002 ,  H05K1/165 ,  H05K1/189 ,  H05K3/389 ,  H05K3/429 ,  H05K3/4644 ,  H05K2201/0179 ,  H05K2201/086 ,  H05K2201/097 ,  H05K2201/09809 ,  H05K2201/10416

Abstract: Miniature circuitry and inductor components in which multiple levels of printed circuitry are formed on each side of a support panel, typically a printed circuit board or rigid flex. Magnetic members are embedded in one or more cavities in said support panel. Electrical connection between the plural levels of circuitry and multiple windings around the magnetic members are provided by plural plated through hole conductors. Small through hole openings accommodate a plurality of the plated through hole conductors since each is insulated from the others by a very thin layer of vacuum deposited organic layer such as parylene having a high dielectric strength. Adhesion of this plated copper to the organic layer is provided by first applying an adhesive promotor to the surface of the organic layer followed by the vacuum deposition of the organic layer.

Abstract translation: 微型电路和电感器部件，其中在支撑面板的每一侧，通常是印刷电路板或刚性柔性件上形成多层印刷电路。 磁性构件嵌入在所述支撑面板中的一个或多个空腔中。 由多个电镀通孔导体提供多层电路与磁性构件周围的多个绕组之间的电连接。 小的通孔开口容纳多个电镀通孔导体，因为它们通过非常薄的真空沉积的有机层（例如具有高介电强度的聚对二甲苯）绝缘。 通过首先在有机层的表面上施加粘合剂促进剂，然后真空沉积有机层，来提供该镀铜的有机层的附着力。

公开(公告)号：US20100124035A1

公开(公告)日：2010-05-20

申请号：US12274407

申请日：2008-11-20

Applicant: Justin P. Bandholz ,  Jonathan R. Hinkle ,  Pravin Patel

Inventor： Justin P. Bandholz ,  Jonathan R. Hinkle ,  Pravin Patel

IPC: H05K1/18

CPC classification number: H05K1/162 ,  H05K1/0239 ,  H05K3/429 ,  H05K2201/09536 ,  H05K2201/09809

Abstract: A printed circuit board (‘PCB’) with a capacitor integrated within a via of the PCB, the PCB including layers of laminate; a via that includes a via hole traversing layers of the PCB, the via hole characterized by a generally tubular inner surface; a capacitor integrated within the via, the capacitor including two capacitor plates, an inner plate and an outer plate, the two plates composed of electrically conductive material disposed upon the inner surface of the via hole, both plates traversing layers of the laminate, the inner plate traversing more layers of the laminate than are traversed by the outer plate; and a layer of dielectric material disposed between the two plates.

Abstract translation: 印刷电路板（“PCB”），其电容器集成在PCB的通孔内，PCB包括层压板; 通孔，其包括穿过所述PCB的层的通孔，所述通孔的特征在于大致管状的内表面; 集成在通孔内的电容器，电容器包括两个电容器板，内板和外板，两个板由设置在通孔内表面上的导电材料组成，两个板横跨层压板，内部 板穿过层压板比由外板穿过的多层; 以及设置在两个板之间的介电材料层。

公开(公告)号：US20100117245A1

公开(公告)日：2010-05-13

申请号：US12691255

申请日：2010-01-21

Applicant: Chonghua Zhong

Inventor： Chonghua Zhong

IPC: H01L23/488 ,  H05K1/11

CPC classification number: H01L23/5382 ,  H01L24/16 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0293 ,  H05K3/321 ,  H05K3/3452 ,  H05K2201/0305 ,  H05K2201/09381 ,  H05K2201/09809 ,  H05K2201/0989 ,  H05K2201/10674 ,  H05K2203/173 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Methods, systems, and apparatuses for integrated circuit package substrates, integrated circuit packages, and processes for assembling the same, are provided. A substrate for a flip chip integrated circuit package includes a substrate body having opposing first and second surfaces. A solder mask layer covers at least a portion of the first surface of the substrate body. First and second electrically conductive features are formed on the substrate body. The first electrically conductive feature is a portion of a first electrical signal net, and the second electrically conductive feature is a portion of a second electrical signal net. The first and second electrically conductive features are configured to be selectively electrically coupled together by application of an electrically conductive material. The electrically conductive material may be a conductive epoxy, a jumper, a solder paste, a solder ball, or a solder bump that couples a flip chip die to the substrate.

Abstract translation: 提供了用于集成电路封装基板，集成电路封装以及用于组装其的工艺的方法，系统和装置。 用于倒装芯片集成电路封装的衬底包括具有相对的第一和第二表面的衬底本体。 焊接掩模层覆盖基板主体的第一表面的至少一部分。 第一和第二导电特征形成在衬底主体上。 第一导电特征是第一电信号网的一部分，第二导电特征是第二电信号网的一部分。 第一和第二导电特征被配置为通过施加导电材料选择性地电耦合在一起。 导电材料可以是导电环氧树脂，跳线，焊膏，焊球或将倒装芯片裸片耦合到衬底的焊料凸块。

公开(公告)号：US20100097158A1

公开(公告)日：2010-04-22

申请号：US12253008

申请日：2008-10-16

Applicant: Raymond D. Eppich ,  James M. Irion, II

Inventor： Raymond D. Eppich ,  James M. Irion, II

IPC: H01P1/02 ,  H01P3/06

CPC classification number: H01P5/085 ,  H05K1/0222 ,  H05K2201/096 ,  H05K2201/09618 ,  H05K2201/09809

Abstract: A coaxial transition includes a first conductor aligned along a first axis. The transition also includes a ground shield surrounding the first conductor such that a first gap exists between the first conductor and the ground shield. An electric field radiates between the first conductor and the ground shield through the first gap. The transition further includes a second conductor aligned along a second axis and coupled to the first conductor. The second conductor forms a second gap between the second conductor and a portion of the ground shield. A first portion of the electric field radiates between the second conductor and the ground shield through the second gap. The transition also includes a top ground plane aligned substantially parallel to the second conductor. A third gap exists between the top ground plane and the second conductor. The second gap and the third gap are substantially parallel with the second conductor therebetween.

Abstract translation: 同轴转移包括沿着第一轴排列的第一导体。 该转变还包括围绕第一导体的接地屏蔽，使得在第一导体和接地屏蔽之间存在第一间隙。 电场通过第一间隙在第一导体和接地屏蔽之间辐射。 该转变还包括沿着第二轴对准并且耦合到第一导体的第二导体。 第二导体在第二导体和接地屏蔽的一部分之间形成第二间隙。 电场的第一部分通过第二间隙在第二导体和接地屏蔽之间辐射。 该转变还包括基本上平行于第二导体排列的顶部接地平面。 在顶部接地平面和第二导体之间存在第三间隙。 第二间隙和第三间隙基本上平行于它们之间的第二导体。

公开(公告)号：US20090306475A1

公开(公告)日：2009-12-10

申请号：US12458067

申请日：2009-06-30

Applicant: Goki Yamamoto ,  Kazuaki Takahashi ,  Takashi Yashiro ,  Ryou Kitano ,  Kazushige Yamamoto

Inventor： Goki Yamamoto ,  Kazuaki Takahashi ,  Takashi Yashiro ,  Ryou Kitano ,  Kazushige Yamamoto

IPC: A61B1/04

CPC classification number: H05K1/0243 ,  A61B1/05 ,  A61B1/051 ,  H01R9/0515 ,  H05K1/0219 ,  H05K3/3405 ,  H05K2201/09809 ,  H05K2201/10356

Abstract: An electronic endoscope has an insert section to be introduced into a human body cavity. A distal portion of the insert section contains a CCD and a printed circuit board to which the CCD is bonded. In the insert section, a cable bundle being a bundle of coaxial cables extends. Each coaxial cable consists of a signal line, insulation surrounding the signal line, a braided wire surrounding the insulation, and an insulating jacket. The cylindrical braided wire is stranded into a single line, and is soldered as a ground line to a ground terminal of the printed circuit board. The signal line is pulled out of the coaxial cable with a length longer than the ground line. The signal line is soldered to an input/output terminal of the printed circuit board with a larger sag than the ground line.

Abstract translation: 电子内窥镜具有插入人体腔内的插入部。 插入部分的远端部分包含CCD和连接有CCD的印刷电路板。 在插入部分中，作为一束同轴电缆的电缆束延伸。 每个同轴电缆由信号线，围绕信号线的绝缘体，围绕绝缘体的编织线和绝缘护套组成。 圆柱编织线绞合成单根线，并作为接地线焊接到印刷电路板的接地端子。 信号线从长度大于地线的同轴电缆拉出。 信号线被焊接到印刷电路板的输入/输出端子，其下降比地线大。

公开(公告)号：US07629541B2

公开(公告)日：2009-12-08

申请号：US11454896

申请日：2006-06-19

Applicant: David V. Caletka ,  Frank D. Egitto

Inventor： David V. Caletka ,  Frank D. Egitto

IPC: H05K1/16

CPC classification number: H05K1/0219 ,  H01R12/523 ,  H01R13/2414 ,  H05K1/113 ,  H05K3/4046 ,  H05K3/429 ,  H05K3/4614 ,  H05K2201/0959 ,  H05K2201/09809 ,  H05K2201/10303 ,  H05K2201/10378 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A high speed interposer which includes a substrate having alternatingly oriented dielectric and conductive layers which form a substrate, openings which extend from one opposing surface of the substrate to a second opposing surface, conductive members positioned within the openings and also extending from surface to surface (and beyond, in some embodiments), and a plurality of shielding members positioned substantially around the conductive members to provide shielding therefore during the passage of high frequency signals through the conductive members.

Abstract translation: 高速插入器，其包括具有交替取向的介电层和导电层的基板，其形成基板，从基板的一个相对表面延伸到第二相对表面的开口，定位在开口内并且还从表面延伸到表面的导电构件 并且在一些实施例中超越）以及基本上围绕导电构件定位的多个屏蔽构件，从而在高频信号通过导电构件期间提供屏蔽。

公开(公告)号：US07589416B2

公开(公告)日：2009-09-15

申请号：US11420219

申请日：2006-05-24

Applicant: Hajime Kuwajima ,  Masashi Gotoh

Inventor： Hajime Kuwajima ,  Masashi Gotoh

IPC: H01L23/12 ,  H01L23/053

CPC classification number: H05K1/116 ,  H05K1/0293 ,  H05K3/421 ,  H05K3/423 ,  H05K3/4614 ,  H05K3/462 ,  H05K3/4652 ,  H05K2201/0394 ,  H05K2201/09809 ,  H05K2203/0733 ,  H05K2203/1476 ,  H05K2203/173

Abstract: To fill a conductive material in an opening portion formed in a base of an electronic component, a groove is formed to surround an opening in an upper conductor, and the upper conductor is divided into a first conductive portion and a second conductive portion surrounding the first conductive portion. A mask is formed such that a conductor to be filled in the opening portion may not contact the second conductive portion. Metal plate is grown from the side of a lower conductor in the opening portion by using the lower conductor as electrode to fill the opening portion with metal plate. The metal plate filled in the opening portion and the upper conductor are joined by plating by using the upper conductor or the lower conductor as electrode.

Abstract translation: 为了填充形成在电子部件的基部中的开口部分中的导电材料，形成沟槽以包围上导体中的开口，并且上导体被分成第一导电部分和围绕第一导体部分的第二导电部分 导电部分。 形成掩模，使得填充在开口部分中的导体可以不接触第二导电部分。 金属板通过使用下导体作为电极从开口部分中的下导体的侧面生长，以用金属板填充开口部分。 填充在开口部分的金属板和上导体通过使用上导体或下导体作为电极通过电镀而接合。