公开(公告)号：US20130021062A1

公开(公告)日：2013-01-24

申请号：US13532080

申请日：2012-06-25

Applicant: Pierre Sardat ,  Bruno Hadjelis ,  Hubert Lescot

Inventor： Pierre Sardat ,  Bruno Hadjelis ,  Hubert Lescot

IPC: H05K7/06 ,  H03K19/0175

CPC classification number: H02M3/33523 ,  H02M7/003 ,  H05K1/0227 ,  H05K1/0262 ,  H05K2201/09972

Abstract: This printed circuit board (12) comprising: a first portion (20) having first electronic components (22) of which the earth electrode is on a first voltage source (14); a second portion (24) having second electronic components (26) of which the earth electrode is on a second voltage source (16); a switched-mode power supply circuit (34) of which one input is connected to the first portion (20) and of which at least one output is connected to the second portion (24), is characterized in that it comprises modification means (36) for modifying a switching frequency of the switched-mode power supply circuit (34) depending on data values (32) to be transmitted between the first portion (20) and the second portion (24), the said data being able to take at least two distinct values.

Abstract translation: 该印刷电路板（12）包括：具有第一电子部件（22）的第一部分（20），其中接地电极在第一电压源（14）上; 具有第二电子部件（26）的第二部分（24），其中接地电极位于第二电压源（16）上; 一个开关模式电源电路（34），其一个输入端连接到第一部分（20），其中至少一个输出端连接到第二部分（24），其特征在于它包括修改装置（36） ），用于根据要在第一部分（20）和第二部分（24）之间传输的数据值（32）来修改开关模式电源电路（34）的开关频率，所述数据能够接收 至少两个不同的值。

公开(公告)号：US08253347B2

公开(公告)日：2012-08-28

申请号：US12508361

申请日：2009-07-23

Applicant: Robert F. Fiermuga

Inventor： Robert F. Fiermuga

IPC: H05B37/02 ,  F21V19/04

CPC classification number: H05K1/181 ,  F21S9/022 ,  F21V33/0076 ,  F21Y2115/10 ,  H05B33/0854 ,  H05B33/0887 ,  H05K1/189 ,  H05K2201/0909 ,  H05K2201/09972 ,  H05K2201/10037 ,  H05K2201/10106 ,  Y02P70/611

Abstract: An egress lighting system which utilizes an efficient primary and emergency light source and complies with the NEC standards for emergency egress lighting. This invention combines two sets of LEDs onto a single circuit board to provide primary lighting and secondary emergency egress lighting while keeping the circuits of the primary and secondary lighting electrically separate or isolated.

Abstract translation: 出口照明系统，利用有效的主要和应急光源，并符合NEC紧急出口照明标准。 本发明将两组LED组合到单个电路板上，以提供初级照明和次级紧急出口照明，同时保持主照明和次照明的电路电气分离或隔离。

公开(公告)号：US20120182066A1

公开(公告)日：2012-07-19

申请号：US13348295

申请日：2012-01-11

Applicant: Thomas MERKLE ,  Stefan Koch ,  Joo-Young Choi

Inventor： Thomas MERKLE ,  Stefan Koch ,  Joo-Young Choi

IPC: H01L25/00 ,  H05K1/02 ,  H05K13/00 ,  H01L21/56

CPC classification number: H05K3/4697 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/66 ,  H01L25/16 ,  H01L2223/6616 ,  H01L2223/6633 ,  H01L2223/6677 ,  H01L2223/6683 ,  H01L2924/0002 ,  H05K1/0243 ,  H05K1/16 ,  H05K1/185 ,  H05K3/301 ,  H05K3/465 ,  H05K2201/0715 ,  H05K2201/0723 ,  H05K2201/09972 ,  H05K2201/09981 ,  H05K2203/1469 ,  H01L2924/00

Abstract: The present invention relates to the field of integrating electronic systems that operate at mm-wave and THz frequencies. A monolithic multichip package, a carrier structure for such a package as well as manufacturing methods for manufacturing such a package and such a carrier structure are proposed to obtain a package that fully shields different functions of the mm-wave/THz system. The package is poured into place by polymerizing photo sensitive monomers. It gradually grows around and above the MMICs (Monolithically Microwave Integrated Circuit) making connection to the MMICs but recessing the high frequency areas of the chip. The proposed approach leads to functional blocks that are electromagnetically completely shielded. These units can be combined and cascaded according to system needs.

Abstract translation: 本发明涉及以毫米波和太赫兹频率工作的集成电子系统的领域。 提出了一种单片多芯片封装，这种封装的载体结构以及用于制造这种封装和这种载体结构的制造方法，以获得完全屏蔽mm波/ THz系统的不同功能的封装。 通过聚合光敏单体将包装倒入适当位置。 它逐渐在MMIC（单片微波集成电路）之上和之上增长，连接到MMIC，但使芯片的高频区域变得困难。 所提出的方法导致电磁完全屏蔽的功能块。 这些单元可以根据系统需要进行组合和级联。

公开(公告)号：US20120152608A1

公开(公告)日：2012-06-21

申请号：US13329209

申请日：2011-12-16

Applicant: Alexander Weigel ,  Mario Mitzel

Inventor： Alexander Weigel ,  Mario Mitzel

IPC: H05K9/00

CPC classification number: H05K1/0218 ,  H05K1/0228 ,  H05K1/0237 ,  H05K2201/09354 ,  H05K2201/09618 ,  H05K2201/09972

Abstract: A printed circuit board having a generally box-like carrier plate with a top side and an underside. The board has at least first and second conductor track plane separated by a first distance and an electrical circuit which occupies at least one section of the carrier plate. The section contains a screen for protecting the circuit from electromagnetic interference. The screen has a first screening conductor track which is arranged on the first conductor track plane and surrounds the section, and a second screening conductor track which is arranged on the second conductor track plane and also surrounds the section. The first and second screening conductor tracks are congruent at least in a circumferential region which surrounds the circuit. The screen has, in the circumferential region, a plurality of plated-through holes which penetrate the carrier plate and connect the first and second screening conductor tracks.

Abstract translation: 一种印刷电路板，其具有通常具有顶侧和下侧的盒状载体板。 板具有至少分开第一距离的第一和第二导体轨道平面和占据载体板的至少一个部分的电路。 该部分包含用于保护电路免受电磁干扰的屏幕。 屏幕具有布置在第一导体轨道平面上并围绕该部分的第一屏蔽导体轨道，以及布置在第二导体轨道平面上并且还包围该部分的第二屏蔽导体轨迹。 第一和第二屏蔽导体轨道至少在围绕电路的圆周区域中是一致的。 该屏幕在圆周区域中具有穿过载体板并连接第一和第二屏蔽导体轨道的多个电镀通孔。

公开(公告)号：US20120018872A1

公开(公告)日：2012-01-26

申请号：US12843680

申请日：2010-07-26

Applicant: Mudasir Ahmad ,  Kuo-Chuan Liu ,  Mohan Nagar ,  Bangalore Shanker

Inventor： Mudasir Ahmad ,  Kuo-Chuan Liu ,  Mohan Nagar ,  Bangalore Shanker

IPC: H01L23/04 ,  H01L21/50

CPC classification number: H01L23/3675 ,  H01L21/563 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/291 ,  H01L2224/29191 ,  H01L2224/2929 ,  H01L2224/29339 ,  H01L2224/29393 ,  H01L2224/32227 ,  H01L2224/33181 ,  H01L2224/48227 ,  H01L2224/73153 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/83191 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/1615 ,  H01L2924/16235 ,  H01L2924/16251 ,  H01L2924/163 ,  H01L2924/3511 ,  H05K1/0203 ,  H05K1/141 ,  H05K3/3436 ,  H05K2201/09972 ,  H05K2201/10371 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: To minimize the warpage of an organic substrate that supports at least one electrical hardware component (e.g., a system-in-package module), a bottom surface of a lid is attached to a top surface of the electrical hardware component. The lid includes a leg that extends from the bottom surface of the lid towards a top surface of the substrate. A portion of the leg closest to the substrate may move relative to the substrate. As the lid warps, the lid does not also cause distortion of the substrate. The leg may be a flange that extends at least a portion of the width or at least a portion of the length of the lid, may be a post located at the perimeter of the lid, or may be any other portion extending from above the electrical component towards the substrate.

Abstract translation: 为了最小化支持至少一个电气硬件部件（例如，系统级封装模块）的有机基板的翘曲，盖的底表面附接到电气硬件部件的顶表面。 盖子包括从盖的底表面朝向衬底的顶表面延伸的腿部。 最靠近基底的腿的一部分可以相对于基底移动。 当盖子翘曲时，盖子也不会引起基板的变形。 该腿部可以是延伸至该宽度的至少一部分的凸缘或该盖的长度的至少一部分，该凸缘可以是位于盖的周边的柱，或者可以是从上方延伸的任何其它部分 元件朝向基板。

公开(公告)号：US20120016504A1

公开(公告)日：2012-01-19

申请号：US13259393

申请日：2009-09-17

Applicant: David Gough ,  Arthur L. Daniel ,  Kevin L. Massaro

Inventor： David Gough ,  Arthur L. Daniel ,  Kevin L. Massaro

IPC: G06F17/00

CPC classification number: H05K1/0227 ,  H05K1/0219 ,  H05K1/0259 ,  H05K2201/09618 ,  H05K2201/09663 ,  H05K2201/09972

Abstract: There is provided an electronic device having an audio system for reproducing audio signals. An exemplary electronic device has an analog region and a separate and non-overlapping digital region. The electronic device comprises an analog ground plane disposed within the analog region and a digital ground plane disposed within the digital region. Digital circuitry is disposed opposite the digital ground plane, wherein digital signals are routed on or over the digital ground plane. Analog circuitry is disposed opposite the analog ground plane, wherein analog signals are routed on or over the analog ground plane. At least one audio output channel disposed opposite the analog ground plane.

Abstract translation: 提供了一种具有用于再现音频信号的音频系统的电子设备。 示例性电子设备具有模拟区域和单独且非重叠的数字区域。 电子设备包括设置在模拟区域内的模拟接地平面和设置在数字区域内的数字接地平面。 数字电路与数字接地平面相对设置，其中数字信号在数字接地平面上或上方布线。 模拟电路与模拟地平面相对设置，其中模拟信号在模拟地平面上或上方布线。 与模拟地平面相对设置的至少一个音频输出通道。

公开(公告)号：US20110304993A1

公开(公告)日：2011-12-15

申请号：US13156496

申请日：2011-06-09

Applicant: Tadaji TAKEMURA

Inventor： Tadaji TAKEMURA

IPC: H05K1/02

CPC classification number: H01L23/3121 ,  H01L23/49811 ,  H01L23/552 ,  H01L25/0655 ,  H01L25/165 ,  H01L2224/16225 ,  H01L2924/19105 ,  H05K1/0216 ,  H05K3/284 ,  H05K9/0039 ,  H05K2201/09972 ,  H05K2201/10371

Abstract: In a circuit module, a conductive partition is defined by a plurality of conductive chips provided on a component mounting surface. The component mounting surface is divided into a first block and a second block by the conductive partition. The shape of the conductive partition can be freely changed in accordance with the size of a circuit board and the arrangement of electronic components in the first block and the second block by changing the positions of the conductive chips and the number of conductive chips. Electromagnetic interference between the first block and the second block is prevented by the conductive partition.

Abstract translation: 在电路模块中，导电隔板由设置在部件安装表面上的多个导电芯片限定。 部件安装表面由导电隔板分成第一块和第二块。 通过改变导电芯片的位置和导电芯片的数量，可以根据电路板的尺寸和第一块和第二块中的电子部件的布置自由地改变导电隔板的形状。 通过导电隔板防止第一块和第二块之间的电磁干扰。

公开(公告)号：US08068346B2

公开(公告)日：2011-11-29

申请号：US10838406

申请日：2004-05-04

Applicant: Josef Maier ,  Daniel M. Lynch

Inventor： Josef Maier ,  Daniel M. Lynch

IPC: H05K7/00

CPC classification number: H01L25/162 ,  H01L25/16 ,  H01L2924/0002 ,  H05K1/0201 ,  H05K1/0203 ,  H05K1/181 ,  H05K2201/062 ,  H05K2201/09063 ,  H05K2201/09972 ,  H05K2201/10166 ,  H01L2924/00

Abstract: A circuit board is provided with a plurality of MOSFETs (metal oxide semiconductor field effect transistors) each of which include a field effect transistor and an associated control circuit. The control circuits are mounted in a control section of the board remote from a power section mounting the MOSFETs. The present invention reduces the assembly steps required in the prior art wherein the MOSFET and its control circuit were mounted as preassembled units to the board. Moreover, the number of MOSFETs per unit area of board is increased by the present invention.

Abstract translation: 电路板设置有多个MOSFET（金属氧化物半导体场效应晶体管），每个MOSFET包括场效应晶体管和相关联的控制电路。 控制电路安装在远离安装MOSFET的电源部分的板的控制部分中。 本发明减少了现有技术中所需的组装步骤，其中MOSFET及其控制电路作为预先组装的单元安装到板上。 此外，通过本发明，板单位面积的MOSFET的数量增加。

公开(公告)号：US20110284281A1

公开(公告)日：2011-11-24

申请号：US13109030

申请日：2011-05-17

Applicant: Takahiro AKIYAMA

Inventor： Takahiro AKIYAMA

IPC: H05K1/11

CPC classification number: H05K1/0218 ,  H05K1/0219 ,  H05K1/0243 ,  H05K1/0298 ,  H05K3/4611 ,  H05K2201/09327 ,  H05K2201/09336 ,  H05K2201/09618 ,  H05K2201/09972

Abstract: In a laminated high-frequency module, a laminate includes a plurality of dielectric layers. In a lower layer region including some of the plurality of dielectric layers, a digital circuit is provided. In an interlayer region including some of the plurality of dielectric layers, a digital circuit and an analog circuit are arranged so that they do not overlap in plan view of the laminate. In an upper layer region including some of the plurality of dielectric layers, a digital circuit is provided. Digital ICs are mounted on the surface of the uppermost dielectric layer in the upper layer region. An inner-layer ground electrode is provided on substantially an entire boundary surface between the lower layer region and the interlayer region and on substantially an entire boundary surface between the interlayer region and the upper layer region. In the interlayer region, a digital line and an inner-layer ground electrode are alternately arranged in the lamination direction.

Abstract translation: 在层压高频模块中，层叠体包括多个电介质层。 在包括多个电介质层中的一些的下层区域中，提供数字电路。 在包括多个电介质层中的一些的层间区域中，布置数字电路和模拟电路，使得它们在叠层的平面图中不重叠。 在包括多个电介质层中的一些的上层区域中，提供数字电路。 数字IC被安装在上层区域中最上层的电介质层的表面上。 内层接地电极设置在下层区域和层间区域之间的基本整个边界表面上以及在层间区域和上层区域之间的大致整个边界表面上。 在层间区域中，数字线和内层接地电极在层叠方向上交替布置。

公开(公告)号：US08058562B2

公开(公告)日：2011-11-15

申请号：US12337965

申请日：2008-12-18

Applicant: Toshiyuki Kuramochi

Inventor： Toshiyuki Kuramochi

IPC: H05K1/00

CPC classification number: H05K1/0271 ,  H05K3/4602 ,  H05K3/4694 ,  H05K2201/0187 ,  H05K2201/068 ,  H05K2201/09036 ,  H05K2201/09063 ,  H05K2201/09972 ,  Y10T29/49124

Abstract: A wiring substrate is provided. The wiring substrate includes: a core layer in which a gap is formed; and a lamination layer which includes an insulating layer and a wiring layer and which is formed on at least one surface of the core layer. The lamination layer has a thermal expansion coefficient different from that of the core layer. A plurality of mounting regions on which an electronic component is to be mounted are provided on the lamination layer to be spaced from each other. The gap in the core layer is filled with an insulating member having the same material as the insulating layer and surrounds each of the plurality of mounting regions or each of mounting region groups including one or more of the mounting regions.

Abstract translation: 提供布线基板。 布线基板包括：形成有间隙的芯层; 以及层叠层，其包括绝缘层和布线层，并且形成在所述芯层的至少一个表面上。 层叠层的热膨胀系数与芯层的热膨胀系数不同。 要在其上安装电子部件的多个安装区域设置在层压层上以彼此间隔开。 芯层中的间隙填充有与绝缘层具有相同材料的绝缘构件，并且围绕多个安装区域中的每一个或包括一个或多个安装区域的每个安装区域组。