公开(公告)号：US20080007932A1

公开(公告)日：2008-01-10

申请号：US11531000

申请日：2006-09-12

Applicant: Yueh-Ming Tung ,  Kuo-Yang Sun ,  Chia-Ming Yang ,  Chung-Lun Lee ,  Jin-Chun Wen ,  Yuan-Wei Liu ,  Wei-Mao Hung

Inventor： Yueh-Ming Tung ,  Kuo-Yang Sun ,  Chia-Ming Yang ,  Chung-Lun Lee ,  Jin-Chun Wen ,  Yuan-Wei Liu ,  Wei-Mao Hung

IPC: H05K9/00

CPC classification number: H05K1/0259 ,  G06K19/07 ,  G06K19/07732 ,  H05K2201/09336 ,  H05K2201/09354 ,  H05K2201/10159

Abstract: A memory card with electrostatic discharge (ESD) protection is provided. The memory card includes a board, a set of contacts, at least one chip and an ESD protection path. The board having a signal path not electrically connected to the edge of the board. The ESD protection path for transmitting ESD current is disposed on the board. Furthermore, a part of the ESD protection path extends to the edge of the board.

Abstract translation: 提供了具有静电放电（ESD）保护的存储卡。 存储卡包括板，一组触点，至少一个芯片和ESD保护路径。 该电路板具有不电连接到电路板边缘的信号路径。 用于传输ESD电流的ESD保护路径配置

公开(公告)号：US20070285898A1

公开(公告)日：2007-12-13

申请号：US11757977

申请日：2007-06-04

Applicant: Andy Paul ,  Dan Solvin ,  Don Lieberman ,  John Beekley ,  Martin Mueller ,  Robert Pearce

Inventor： Andy Paul ,  Dan Solvin ,  Don Lieberman ,  John Beekley ,  Martin Mueller ,  Robert Pearce

IPC: H05K7/20

CPC classification number: H01L23/367 ,  H01L23/3128 ,  H01L25/105 ,  H01L2924/0002 ,  H01L2924/15311 ,  H05K1/0206 ,  H05K1/0207 ,  H05K2201/066 ,  H05K2201/09309 ,  H05K2201/09354 ,  H05K2201/09781 ,  H05K2201/10734 ,  H01L2924/00

Abstract: A thermally enhanced memory module is claimed. The memory module includes a first extended electrical plane, and a thermal connection between a surface plane of its substrate and the first extended electrical plane. A first thermal management, such as a heat spreader, is coupled to the surface plane of the substrate and to the thermal connection.

Abstract translation: 要求保护热增强型存储器模块。 存储器模块包括第一扩展电平面，以及在其基板的表面和第一延伸电平面之间的热连接。 诸如散热器的第一热管理耦合到衬底的表面平面和热连接。

公开(公告)号：US20070181996A1

公开(公告)日：2007-08-09

申请号：US11616902

申请日：2006-12-28

Applicant: Arthur Chang ,  Fu-Ming Chen

Inventor： Arthur Chang ,  Fu-Ming Chen

IPC: H01L23/053

CPC classification number: H01L23/49805 ,  H01L2924/0002 ,  H05K1/0218 ,  H05K3/403 ,  H05K3/429 ,  H05K2201/09354 ,  H01L2924/00

Abstract: A circuit board including a first surface, a second surface, and a third surface is provided. The first surface has a first conductive region, and the second surface is opposite to the first surface. The third surface located between the first surface and the second surface and is connected with the first surface and the second surface. The third surface has a second conductive region, and the first conductive region is electrically connected to at least a part of the second conductive region. The circuit board has good electromagnetic compatibility.

Abstract translation: 提供了包括第一表面，第二表面和第三表面的电路板。 第一表面具有第一导电区域，第二表面与第一表面相对。 第三表面位于第一表面和第二表面之间，并与第一表面和第二表面连接。 第三表面具有第二导电区域，并且第一导电区域电连接到第二导电区域的至少一部分。 电路板具有良好的电磁兼容性。

公开(公告)号：US20070145539A1

公开(公告)日：2007-06-28

申请号：US11315903

申请日：2005-12-22

Applicant: Ken Lam

Inventor： Ken Lam

IPC: H01L21/00 ,  H01L23/552

CPC classification number: H01L23/552 ,  H01L21/561 ,  H01L23/3121 ,  H01L24/97 ,  H01L2224/16 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K3/0052 ,  H05K3/284 ,  H05K2201/09354 ,  H01L2924/00

Abstract: A method and system for fabricating an electromagnetic radiation shield for an electronics package is disclosed. The electronics package includes a substrate, at least one ground contact feature, and a protective layer. The electronics package is physically coupled to at least one additional electronics package through at least the substrate. The method and system include exposing a portion of the ground contact feature(s) by removing a portion of the electronics package above the ground contact feature(s). The exposing step forms at least one trench above the ground contact feature(s). The method and system also include depositing an electromagnetic radiation shield that substantially covers the electronics package, fills the trench(es), and is electrically connected to the ground contact feature(s). The method and system also include separating the electronics package from the additional electronics package(s) such that a remaining portion of the electromagnetic radiation shield that substantially encloses a portion of the electronics package above the ground contact feature(s) remains.

Abstract translation: 公开了一种用于制造电子封装的电磁辐射屏蔽的方法和系统。 电子封装包括衬底，至少一个接地接触特征和保护层。 所述电子封装通过至少所述衬底与至少一个额外的电子封装物理耦合。 该方法和系统包括通过移除地面接触特征之上的电子组件的一部分来暴露接地接触特征的一部分。 曝光步骤在地面接触特征之上形成至少一个沟槽。 该方法和系统还包括沉积基本上覆盖电子封装的电磁辐射屏蔽物，填充沟槽，并且电连接到接地触点特征。 该方法和系统还包括将电子封装与附加的电子封装分开，使得电磁辐射屏蔽的剩余部分基本上封闭电子封装在接地触头特征之上的部分。

公开(公告)号：US07124502B2

公开(公告)日：2006-10-24

申请号：US10917553

申请日：2004-08-11

Applicant: Joel R. Goergen

Inventor： Joel R. Goergen

IPC: H01K3/22

CPC classification number: H05K3/4688 ,  H05K1/0218 ,  H05K1/024 ,  H05K1/0243 ,  H05K1/0271 ,  H05K1/116 ,  H05K3/382 ,  H05K3/429 ,  H05K3/4626 ,  H05K3/4641 ,  H05K2201/0209 ,  H05K2201/044 ,  H05K2201/0723 ,  H05K2201/09236 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09318 ,  H05K2201/09327 ,  H05K2201/09354 ,  H05K2201/09381 ,  H05K2201/09454 ,  H05K2201/09636 ,  H05K2201/09663 ,  H05K2201/09718 ,  H05K2201/09781 ,  H05K2203/061 ,  Y10T29/49117 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49162 ,  Y10T29/49163 ,  Y10T29/49165

Abstract: The disclosed board fabrication techniques and design features enable the construction of a reliable, high-layer-count, and economical backplane for routers and the like that require a large number of signaling paths across the backplane at speeds of 2.5 Gbps or greater, as well as distribution of significant amounts of power to router components. The disclosed techniques and features allow relatively thick (e.g., three- or four-ounce copper) power distribution planes to be combined with large numbers of high-speed signaling layers in a common backplane. Using traditional techniques, such a construction would not be possible because of the number of layers required and the thickness of the power distribution layers. The disclosed embodiments use novel layer arrangements, material selection, processing techniques, and panel features to produce the desired high-speed layers and low-noise high-power distribution layers in a single mechanically stable board.

公开(公告)号：US07088592B2

公开(公告)日：2006-08-08

申请号：US10921144

申请日：2004-08-19

Applicant: Po-Chang Su ,  Po-Hsun Chen

Inventor： Po-Chang Su ,  Po-Hsun Chen

IPC: H05K9/00

CPC classification number: H05K1/0259 ,  G11B33/1493 ,  H05K3/244 ,  H05K9/0039 ,  H05K9/0067 ,  H05K2201/09354 ,  H05K2201/09736 ,  H05K2201/10446

Abstract: An electronic device utilizing an electrostatic discharge (ESD) protection structure. The electronic device comprises a housing and a printed circuit board (PCB) with an ESD protection structure disposed thereon. The PCB has at least one metal layer with a ground circuit and a functional circuit. The ground circuit includes at least one device-protecting area near the edge of the PCB and exposed on the surface thereof. The device-protecting area is covered by a thick conductive layer, and electric components are disposed nearby, such that static electricity can be transferred to ground through the ground circuit of the PCB to protect the electronic device from interferences and damages.

Abstract translation: 一种利用静电放电（ESD）保护结构的电子设备。 电子设备包括壳体和布置在其上的ESD保护结构的印刷电路板（PCB）。 PCB具有至少一个具有接地电路和功能电路的金属层。 接地电路包括在PCB的边缘附近的至少一个器件保护区域，并暴露在其表面上。 器件保护区域由厚的导电层覆盖，电气部件设置在附近，使得静电可以通过PCB的接地电路传输到地面，以保护电子设备免受干扰和损坏。

公开(公告)号：US07084355B2

公开(公告)日：2006-08-01

申请号：US10409792

申请日：2003-04-08

Applicant: Yoshiyuki Kosaka ,  Kazuyasu Sugisawa ,  Kimihiro Yamanaka

Inventor： Yoshiyuki Kosaka ,  Kazuyasu Sugisawa ,  Kimihiro Yamanaka

IPC: H01R12/04

CPC classification number: H05K1/0271 ,  H05K3/4602 ,  H05K2201/09354 ,  H05K2201/0959

Abstract: A multilayer printed circuit board is provided in which microcracks or metallic migration is mitigated when a Resin Fill Plated Through Hole (RFP) is arranged near the edge thereof. The multilayer printed circuit board includes an inner layer having an RFP, outer layers, RFP lands, and conductor layers. The conductor layers are positioned over the RFP lands and the outer edges of the conductor layers extends outward further than the outer edges of the RFP lands. When the multilayer printed circuit board is heated, a stress is generated in and near the RFP. The conductor layers positioned so as to cover the RFP lands, exert a reaction against the stress to suppress generation of microcracks in the multilayer printed circuit board and thereby mitigate metallic migration in the board.

公开(公告)号：US20050088832A1

公开(公告)日：2005-04-28

申请号：US10921144

申请日：2004-08-19

Applicant: Po-Chang Su ,  Po-Hsun Chen

Inventor： Po-Chang Su ,  Po-Hsun Chen

IPC: G11B33/14 ,  H01L23/60 ,  H02H3/22 ,  H05K1/02 ,  H05K3/24 ,  H05K5/00 ,  H05K5/04 ,  H05K5/06 ,  H05K9/00

CPC classification number: H05K1/0259 ,  G11B33/1493 ,  H05K3/244 ,  H05K9/0039 ,  H05K9/0067 ,  H05K2201/09354 ,  H05K2201/09736 ,  H05K2201/10446

Abstract: An electronic device utilizing an electrostatic discharge (ESD) protection structure. The electronic device comprises a housing and a printed circuit board (PCB) with an ESD protection structure disposed thereon. The PCB has at least one metal layer with a ground circuit and a functional circuit. The ground circuit includes at least one device-protecting area near the edge of the PCB and exposed on the surface thereof. The device-protecting area is covered by a thick conductive layer, and electric components are disposed nearby, such that static electricity can be transferred to ground through the ground circuit of the PCB to protect the electronic device from interferences and damages.

Abstract translation: 一种利用静电放电（ESD）保护结构的电子设备。 电子设备包括壳体和布置在其上的ESD保护结构的印刷电路板（PCB）。 PCB具有至少一个具有接地电路和功能电路的金属层。 接地电路包括在PCB的边缘附近的至少一个器件保护区域，并暴露在其表面上。 器件保护区域由厚的导电层覆盖，电气部件设置在附近，使得静电可以通过PCB的接地电路传输到地面，以保护电子设备免受干扰和损坏。

公开(公告)号：US20040115405A1

公开(公告)日：2004-06-17

申请号：US10316665

申请日：2002-12-11

Inventor： Yeo Kong Hoo ,  Christopher Vernon Smith

IPC: B32B003/00

CPC classification number: B32B15/08 ,  B32B15/14 ,  B32B15/20 ,  B32B27/308 ,  B32B2250/40 ,  B32B2260/021 ,  B32B2260/046 ,  B32B2307/206 ,  B32B2457/08 ,  H01G2/20 ,  H05K1/0256 ,  H05K1/162 ,  H05K3/027 ,  H05K2201/0761 ,  H05K2201/09309 ,  H05K2201/09354 ,  H05K2203/162 ,  Y10T29/49156 ,  Y10T428/24917

Abstract: A laminate comprising an insulation layer sandwiched between a pair of electrically conductive layers is prepared for electrical insulation testing by using a laser to remove a strip from at least one of the conductive layers proximate the edge of the laminate to electrically isolate a central, bulk portion of the conductive layer from the edges of the laminate. Conductive material that may be smeared across an edge of the laminate will not therefore provide an electrical short between the portion of the conductive layer surrounded by the slot and the second conductive layer on the opposite side of the insulation layer.

Abstract translation: 通过使用激光从邻近层压体的边缘的至少一个导电层去除条带来制备夹在一对导电层之间的绝缘层的层压板，用于电绝缘测试，以电绝缘中间部分 的导电层。 因此，可能被涂抹在层压体的边缘上的导电材料将不会在由狭缝围绕的导电层的部分与绝缘层的相对侧上的第二导电层之间提供电短路。

公开(公告)号：US06707686B2

公开(公告)日：2004-03-16

申请号：US09860653

申请日：2001-05-18

Applicant: Gregory J. Fritz ,  Alejandra Anderson ,  Robin Berg ,  Todd Husom ,  Eric Sit

Inventor： Gregory J. Fritz ,  Alejandra Anderson ,  Robin Berg ,  Todd Husom ,  Eric Sit

IPC: H05K714

CPC classification number: H05K7/1425 ,  H04Q1/03 ,  H04Q1/035 ,  H04Q1/10 ,  H04Q1/116 ,  H04Q2201/06 ,  H04Q2201/10 ,  H04Q2201/12 ,  H05K1/0216 ,  H05K1/14 ,  H05K1/18 ,  H05K7/186 ,  H05K2201/044 ,  H05K2201/093 ,  H05K2201/09354 ,  H05K2201/09663

Abstract: A chassis and associated telecommunication circuit card are disclosed. The chassis has heat dissipation and flame containment features while accommodating a high density of the circuitry cards. Embodiments include an inner housing with a double-layer middle floor dividing the chassis into top and bottom chambers. Each layer has partially aligned slots, and an air gap is provided between the two layers. Embodiments also include a double-layer mesh cover with an air gap existing between the two mesh layers. Projections and grooves are provided on the inner surfaces of the inner housing to receive circuit cards having a guide on one edge and a fin on another. The circuit card includes conductor structures such as multiple board layers with paired and segregated conductors. The circuit card also includes some components positioned to cooperate with the ventilation features of the chassis and includes some components chosen for low-power consumption or reduced flammability.

Abstract translation: 公开了一种底盘和相关通信电路卡。 底盘具有散热和阻燃特征，同时容纳高密度的电路卡。 实施例包括具有双层中间层的内壳，其将底盘分成顶部和底部室。 每个层具有部分对准的槽，并且在两层之间提供气隙。 实施例还包括在两个网格层之间具有气隙的双层网状覆盖物。 在内壳体的内表面上设置突起和凹槽，以接收在一个边缘上具有引导件和另一个边缘上的翅片的电路卡。 电路卡包括导体结构，例如具有成对和分离的导体的多个板层。 电路卡还包括定位成与底盘的通风特征配合的一些组件，并且包括一些选择用于低功耗或降低可燃性的组件。