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    Layered board and electronic apparatus having the layered board
    61.
    发明授权
    Layered board and electronic apparatus having the layered board 有权
    具有分层板的分层板和电子设备

    公开(公告)号：US07393580B2

    公开(公告)日：2008-07-01

    申请号：US11258856

    申请日：2005-10-27

    Applicant: Takashi Kanda

    Inventor： Takashi Kanda

    IPC: B32B3/00 ,  H05K1/14

    CPC classification number: H05K1/0271 ,  H05K1/056 ,  H05K3/445 ,  H05K3/4608 ,  H05K2201/0323 ,  H05K2201/068 ,  H05K2201/09145 ,  H05K2201/09581 ,  Y10T428/24777 ,  Y10T428/24917 ,  Y10T428/24926

    Abstract: A layered board is disclosed which can avoid the occurrence of cracks in a core layer due to shearing stress caused by a difference in coefficient of thermal expansion between the core layer and a buildup layer. The layered board includes a core layer which serves as a printed board, a buildup layer which includes an insulation part and a wiring part, is overlaid on the core layer, and is electrically connected to the core layer, and an edge layer formed at least at an edge on the periphery of the core layer, the edge layer being different from the core layer. Alternatively, the core layer projects outward from an edge on the periphery of the buildup layer.

    Abstract translation: 公开了一种分层板，其可以避免由于芯层和堆积层之间的热膨胀系数的差异而导致的剪切应力在芯层中产生裂纹。 层叠板包括用作印刷板的芯层，包括绝缘部分和布线部分的堆积层，覆盖在芯层上，并且电连接到芯层，并且至少形成边缘层 在芯层周边的边缘处，边缘层与芯层不同。 或者，芯层从积层的外围的边缘向外突出。

    Multilayer structure forming method, method of manufacturing wiring board, and method manufacturing of electronic apparatus
    65.
    发明申请
    Multilayer structure forming method, method of manufacturing wiring board, and method manufacturing of electronic apparatus 有权
    多层结构形成方法，制造布线板的方法和电子设备的方法制造

    公开(公告)号：US20060068573A1

    公开(公告)日：2006-03-30

    申请号：US11222851

    申请日：2005-09-12

    Applicant: Tsuyoshi Shintate ,  Kazuaki Sakurada ,  Jun Yamada

    Inventor： Tsuyoshi Shintate ,  Kazuaki Sakurada ,  Jun Yamada

    IPC: H01L21/20

    CPC classification number: H05K3/4664 ,  H01L51/0004 ,  H05K3/125 ,  H05K2201/09581 ,  H05K2201/09909 ,  H05K2203/013 ,  H05K2203/1173 ,  H05K2203/1476

    Abstract: A droplet discharge apparatus is used in a multilayer structure forming method of the invention. The multilayer structure forming method includes: discharging droplets of a first conductive material to form a first conductive material pattern on a surface of an object; baking the first conductive material pattern to form a wiring pattern; discharging droplets of a first insulating material including a first photo-curable material to form a first insulating material pattern bordering via holes on the wiring pattern; curing the first insulating material pattern to form a first insulating pattern bordering the via holes; making the surface of the object lyophilic; discharging droplets of a second insulating material including a second photo-curable material to form a second insulating material pattern that covers the wiring pattern and the surface of the object which has been made lyophilic, and surrounds the first insulating pattern; and curing the second insulating material pattern to form a second insulating pattern that surrounds the first insulating pattern. In addition, preferably, the first conductive material includes silver (Ag) nanoparticles.

    Abstract translation: 液滴喷射装置用于本发明的多层结构形成方法中。 多层结构形成方法包括：排出第一导电材料的液滴以在物体的表面上形成第一导电材料图案; 烘烤第一导电材料图案以形成布线图案; 排出包括第一可光固化材料的第一绝缘材料的液滴，以形成与布线图案上的通孔邻接的第一绝缘材料图案; 固化第一绝缘材料图案以形成与通孔相邻的第一绝缘图案; 使物体的表面亲液; 排出包含第二可光固化材料的第二绝缘材料的液滴，以形成覆盖所述布线图形和所述物体表面的第二绝缘材料图案，所述第二绝缘材料图案已经被制成亲液性，并围绕所述第一绝缘图案; 以及固化所述第二绝缘材料图案以形成围绕所述第一绝缘图案的第二绝缘图案。 此外，优选地，第一导电材料包括银（Ag）纳米颗粒。

    Contact-forming method
    67.
    发明授权
    Contact-forming method 失效
    接触形成法

    公开(公告)号：US06916734B2

    公开(公告)日：2005-07-12

    申请号：US10676493

    申请日：2003-09-30

    Applicant: Ming-Tung Shen

    Inventor： Ming-Tung Shen

    IPC: H01L21/60 ,  H01L21/768 ,  H01L23/522 ,  H01L23/60 ,  H05K3/40 ,  H05K3/46 ,  H01L21/4763

    CPC classification number: H01L24/02 ,  H01L23/5226 ,  H01L23/60 ,  H01L24/11 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/014 ,  H05K3/4061 ,  H05K3/4644 ,  H05K2201/09581

    Abstract: A semiconductor device has a lower metal layer, a lower dielectric layer on top of the lower metal layer, an upper metal layer on top of the lower dielectric layer, an upper dielectric layer on top of the upper metal layer, and a contact region formed as a cavity that extends through the upper dielectric layer, the upper metal layer and the lower dielectric layer for access to a solder pad portion of the lower metal layer. A dielectric lining layer lines a peripheral cavity-confining surface of the cavity, and is transverse to a plane of the lower metal layer. The dielectric lining layer isolates the upper metal layer from the lower metal layer while permitting access to the solder pad portion of the lower metal layer. An electrical contact fills the cavity, and enables external electrical connection with the lower metal layer.

    Abstract translation: 半导体器件具有下金属层，在下金属层顶部的下介电层，在下介电层的顶部上的上金属层，在上金属层的顶部上的上电介质层和形成的接触区域 作为延伸穿过上电介质层的空腔，上金属层和下电介质层，用于进入下金属层的焊盘部分。 电介质衬里层对空腔的外围空腔限制表面进行排列，并且横向于下部金属层的平面。 电介质衬里层将上金属层与下金属层隔离，同时允许接近下金属层的焊盘部分。 电触点填充空腔，并且能够与下金属层进行外部电连接。

    Capacitor sheet, method for producing the same, board with built-in capacitors, and semiconductor device
    68.
    发明授权
    Capacitor sheet, method for producing the same, board with built-in capacitors, and semiconductor device 失效
    电容器片，其制造方法，具有内置电容器的板和半导体器件

    公开(公告)号：US06916706B2

    公开(公告)日：2005-07-12

    申请号：US10833817

    申请日：2004-04-27

    Applicant: Fumio Echigo ,  Tadashi Nakamura ,  Daizo Andoh

    Inventor： Fumio Echigo ,  Tadashi Nakamura ,  Daizo Andoh

    IPC: H01L21/02 ,  H05K1/14 ,  H05K1/16 ,  H05K3/40 ,  H05K3/42 ,  H01L21/8242

    CPC classification number: H05K1/162 ,  H01L28/60 ,  H05K1/141 ,  H05K3/4069 ,  H05K3/429 ,  H05K2201/09309 ,  H05K2201/09581

    Abstract: A capacitor sheet includes a laminate sheet, interface-connection feedthrough conductors for electrically connecting faces of the laminate sheet, and capacitor-connection feedthrough conductors. The laminate sheet has at least one laminate which is composed of a power source layer electrode, a grounding layer electrode, and a dielectric layer interposed between the power source layer electrode and the grounding layer electrode. The interface-connection feedthrough conductors are formed in through holes that pass through the dielectric layer, the power source layer electrode, and the grounding layer electrode, and are insulated by insulation walls from the power source layer electrode and the grounding layer electrode provided inside. The capacitor-connection feedthrough conductors are formed in regions where only either the power source layer electrode or the grounding layer electrode is provided, and are connected electrically with either the power source layer electrode or the grounding layer electrode. This configuration makes the electric connection for employing the capacitors and the electric connection between faces of the sheet independent from each other. Thus, it is possible to provide a capacitor sheet in which the adverse effects of inductances of vias are minimized.

    Abstract translation: 电容器片包括层压片，用于电连接层压片的表面的接口连接馈通导体和电容器连接馈通导体。 层叠片具有至少一层由电源层电极，接地层电极和插在电源层电极和接地层电极之间的电介质层构成的层叠体。 界面连接馈通导体形成在穿过电介质层，电源层电极和接地层电极的通孔中，并且由设置在内部的电源层电极和接地层电极的绝缘壁绝缘。 电容器连接馈通导体形成在仅设置电源层电极或接地层电极的区域中，并且与电源层电极或接地层电极电连接。 这种构造使得用于采用电容器的电连接和片材的面之间的电连接彼此独立。 因此，可以提供一种电容器片，其中通孔的电感的不利影响被最小化。

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