公开(公告)号：US08836204B2

公开(公告)日：2014-09-16

申请号：US13643955

申请日：2011-04-27

Applicant: Akihito Kagotani ,  Makoto Arisawa ,  Hideki Kamada

Inventor： Akihito Kagotani ,  Makoto Arisawa ,  Hideki Kamada

IPC: H05B33/06 ,  H05B33/04 ,  H05B33/02 ,  H01L51/52 ,  B32B17/10 ,  F21V29/00 ,  F21Y105/00

CPC classification number: H05B33/06 ,  B32B17/10036 ,  B32B17/10541 ,  F21V29/74 ,  F21V29/89 ,  F21Y2105/00 ,  F21Y2115/20 ,  H01L51/5203 ,  H01L51/524 ,  H01L51/5253 ,  H01L51/529 ,  H01L2251/5361 ,  H05B33/02 ,  H05B33/04 ,  H05K1/14 ,  H05K3/323 ,  H05K3/361 ,  H05K2201/041 ,  H05K2201/09027 ,  H05K2201/09836 ,  H05K2201/10128

Abstract: Disclosed is an organic EL illumination device—which is provided with: an organic EL element (13) on a glass substrate (10); and a plurality of anode terminal electrodes (11) and cathode terminal electrodes (12) for evenly supplying current to the aforementioned organic EL element (13) on the aforementioned glass substrate (10)—wherein the organic EL illumination device is provided with a wiring board (1) to which a circuit having anode wiring (1a) corresponding to the position of each of the aforementioned anode terminal electrodes (11), and a circuit having cathode wiring (1b) corresponding to the position of each of the aforementioned cathode terminal electrodes (12) are formed.

Abstract translation: 公开了一种有机EL照明装置，其设置有：玻璃基板（10）上的有机EL元件（13）。 以及用于向上述玻璃基板（10）上的上述有机EL元件（13）均匀地供给电流的多个阳极端子电极（11）和阴极端子电极（12），在有机EL照明装置中设置有布线 具有与上述阳极端子电极（11）的位置对应的阳极配线（1a）的电路的电路板（1）和与上述阴极端子的位置对应的阴极配线（1b）的电路 形成电极（12）。

公开(公告)号：US20140254120A1

公开(公告)日：2014-09-11

申请号：US14282693

申请日：2014-05-20

Applicant: FUJIKURA LTD.

Inventor： Satoshi YAMAMOTO ,  Hiroyuki HIRANO ,  Takanao SUZUKI

IPC: H05K1/11 ,  H05K3/00

CPC classification number: H05K3/0094 ,  H01L21/486 ,  H01L23/473 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/13101 ,  H01L2224/16225 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/06589 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/15174 ,  H01L2924/15184 ,  H05K1/113 ,  H05K2201/09836 ,  H05K2201/10378 ,  H05K2201/10545 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Provided is a device packaging structure including: an interposer substrate including a substrate, and a plurality of through-hole interconnections formed inside a plurality of through-holes passing through the substrate from a first main surface toward a second main surface, the first main surface being one main surface of the substrate, the second main surface being the other main surface thereof; a first device which includes a plurality of electrodes and is arranged so that these electrodes face the first main surface; and a second device which includes a plurality of electrodes of which an arrangement is different from an arrangement of each of the electrodes of the first device, and is arranged so that these electrodes face the second main surface.

Abstract translation: 本发明提供一种器件封装结构，其特征在于，包括：内插基板，具有基板和形成在从第一主面朝向第二主面的贯穿基板的多个通孔内形成的多个通孔布线，所述第一主面 作为基板的一个主表面，第二主表面是其另一个主表面; 第一装置，其包括多个电极，并且被布置成使得这些电极面对第一主表面; 以及第二装置，其包括多个电极，其布置与第一装置的每个电极的布置不同，并且被布置成使得这些电极面对第二主表面。

公开(公告)号：US20140185259A1

公开(公告)日：2014-07-03

申请号：US14097251

申请日：2013-12-05

Applicant: ZHEN DING TECHNOLOGY CO., LTD.

Inventor： YONG HA WOO ,  E-TUNG CHOU ,  WEN-LUN LO

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H05K1/09

CPC classification number: H01L25/105 ,  H01L21/4853 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49866 ,  H01L24/09 ,  H01L2224/08238 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/01028 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/15738 ,  H01L2924/181 ,  H05K1/09 ,  H05K1/115 ,  H05K3/0017 ,  H05K3/3436 ,  H05K3/4007 ,  H05K2201/0347 ,  H05K2201/0379 ,  H05K2201/09836 ,  H05K2201/10674 ,  H05K2203/0384 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A packaging substrate includes a circuit board, a number of first conductive posts, and a number of second conductive posts. The circuit board includes a first base and a first conductive pattern layer formed on a first surface of the first base. The first conductive posts extend from and are electrically connected to the first conductive pattern layer. The second conductive posts extend from and are electrically connected to the first conductive pattern layer. The height of each of the second conductive posts are larger than that of each of the first conductive posts.

Abstract translation: 封装基板包括电路板，多个第一导电柱和多个第二导电柱。 电路板包括形成在第一基底的第一表面上的第一基底和第一导电图案层。 第一导电柱从第一导电图案层延伸并电连接到第一导电图案层。 第二导电柱从第一导电图案层延伸并与之电连接。 每个第二导电柱的高度大于每个第一导电柱的高度。

公开(公告)号：US20120152607A1

公开(公告)日：2012-06-21

申请号：US12979340

申请日：2010-12-28

Applicant: YUNG-CHIEH CHEN ,  SHOU-KUO HSU

Inventor： YUNG-CHIEH CHEN ,  SHOU-KUO HSU

IPC: H05K1/11

CPC classification number: H05K1/115 ,  H05K1/0245 ,  H05K2201/09836

Abstract: A printed circuit board (PCB) includes first and second signal layers. First and second pairs of signal transmission lines are respectively laid out on the first and second signal layers. The first pair of signal transmission lines includes first positive and negative differential signal transmission lines. The second pair of signal transmission lines includes second positive and negative differential signal transmission lines. The first positive differential signal transmission line is electrically connected to the second negative differential signal transmission line by a first vertical interconnect access (via). The first negative differential signal transmission line is electrically connected to the second positive differential signal transmission line by a second via. An angle between a centerline of each of the first via and second via and a surface of the PCB is an acute angle.

Abstract translation: 印刷电路板（PCB）包括第一和第二信号层。 第一和第二对信号传输线分别布置在第一和第二信号层上。 第一对信号传输线包括第一正和负差分信号传输线。 第二对信号传输线包括第二正和负差分信号传输线。 第一正差分信号传输线通过第一垂直互连接入（via）与第二负差分信号传输线电连接。 第一负差分信号传输线通过第二通孔电连接到第二正差分信号传输线。 第一通孔和第二通孔中的每一个的中心线与PCB的表面之间的角度是锐角。

公开(公告)号：US07915537B1

公开(公告)日：2011-03-29

申请号：US11550753

申请日：2006-10-18

Applicant: Edward Herbert

Inventor： Edward Herbert

IPC: H05K1/03

CPC classification number: H05K1/03 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00 ,  H01L2924/19105 ,  H01L2924/3011 ,  H05K1/0284 ,  H05K1/115 ,  H05K3/4084 ,  H05K3/4611 ,  H05K2201/0355 ,  H05K2201/09118 ,  H05K2201/09636 ,  H05K2201/09836 ,  H05K2201/10378 ,  Y10T29/49126

Abstract: An interposer is made of nested drawn copper shells with insulation between them. The shells are etched using methods of ordinary printed wiring fabrication, but being three dimensional, straight runs from the die to the motherboard can be made optimally short and wide without passing through any vias. Some shells can extend upward for top connections, and vias and crossing landlines can be used as required in the areas away from the die.

Abstract translation: 插入件由嵌套的拉制铜壳制成，它们之间具有绝缘。 使用普通印刷布线制造的方法蚀刻外壳，但是可以在不通过任何通孔的情况下将从模具到主板的三维直线运行最佳地缩短和宽。 一些壳体可以向上延伸用于顶部连接，并且可以根据需要在远离模具的区域中使用通孔和交叉座标线。

公开(公告)号：US07683393B2

公开(公告)日：2010-03-23

申请号：US11294539

申请日：2005-12-06

Applicant: Makoto Nagai ,  Setsuo Yada ,  Atsushi Uchida

Inventor： Makoto Nagai ,  Setsuo Yada ,  Atsushi Uchida

IPC: H01L27/15 ,  H01L33/00

CPC classification number: H05K1/183 ,  H01L33/486 ,  H01L33/60 ,  H01L33/62 ,  H01L2224/32225 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/246 ,  H05K3/4614 ,  H05K3/4629 ,  H05K3/4697 ,  H05K2201/0347 ,  H05K2201/09836 ,  H05K2201/09981 ,  H05K2201/10106 ,  H05K2203/061

Abstract: A wiring substrate for mounting a light emitting element, comprising: a substrate body comprising an insulating material and having a first surface and a back surface; and a cavity being opened into the first surface of said substrate body and having a mounting area for mounting a light emitting element at a bottom face of said cavity, wherein a metalized layer provided along a side face of said cavity and metalized layers provided in said substrate body are provided to continue to each other.

Abstract translation: 一种用于安装发光元件的布线基板，包括：基板主体，包括绝缘材料并具有第一表面和后表面; 并且一个空腔被打开到所述基片主体的第一表面中，并且具有用于将发光元件安装在所述空腔的底面的安装区域，其中沿着所述空腔的侧面设置的金属化层和设置在所述腔中的金属化层 衬底本体被设置成彼此连续。

公开(公告)号：US20090279274A1

公开(公告)日：2009-11-12

申请号：US11794652

申请日：2005-12-22

Applicant: Martin Joseph Agnew ,  Gary David Panaghiston ,  Murray Jerel Niman ,  Nicholas Chandler

Inventor： Martin Joseph Agnew ,  Gary David Panaghiston ,  Murray Jerel Niman ,  Nicholas Chandler

IPC: H05K1/11

CPC classification number: H05K1/0218 ,  H05K1/142 ,  H05K1/144 ,  H05K1/145 ,  H05K3/368 ,  H05K3/403 ,  H05K2201/0397 ,  H05K2201/0715 ,  H05K2201/0919 ,  H05K2201/09836

Abstract: The invention relates to circuit boards and to screening circuits and components on such boards from stray rf interference when they are mounted as arrays or stacks of such circuit boards. The circuit boards (12, 14) are individually screened by conductive screening layers (16, 18) as known in the art and the individual screening layers are coupled together by layered interconnects (34) which connect corresponding screening layers (16, 18) of the individual circuit boards (12, 14) together, instead of by vias.

Abstract translation: 本发明涉及电路板，并且当这些电路板被安装为这种电路板的阵列或叠层时，将这些电路板上的电路和组件从杂散干扰中筛选出来。 电路板（12,14）由本领域已知的导电屏蔽层（16,18）单独地屏蔽，并且各个屏蔽层通过分层互连（34）耦合在一起，分层互连（34）将相应的屏蔽层（16,18） 各个电路板（12,14）组合在一起，而不是通孔。

公开(公告)号：US20090008144A1

公开(公告)日：2009-01-08

申请号：US12211529

申请日：2008-09-16

Applicant: Chin Hui Chong ,  Choon Kuan Lee

Inventor： Chin Hui Chong ,  Choon Kuan Lee

IPC: H05K1/11

CPC classification number: H01R12/526 ,  H05K1/115 ,  H05K3/42 ,  H05K2201/09836 ,  Y10T29/49147 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/4921 ,  Y10T29/49211 ,  Y10T29/4922

Abstract: Circuit boards, microelectronic devices, and other apparatuses having slanted vias are disclosed herein. In one embodiment, an apparatus for interconnecting electronic components includes a dielectric portion having a first surface and a second surface. A first terminal is disposed on the first surface of the dielectric portion for connection to a first electronic component. A second terminal is disposed on the second surface of the dielectric portion for connection to a second electronic component. The apparatus further includes a passage extending through the dielectric portion along a longitudinal axis oriented at an oblique angle relative to the first surface. The passage is at least partially filled with conductive material electrically connecting the first terminal to the second terminal.

Abstract translation: 本文公开了具有倾斜通孔的电路板，微电子器件和其它设备。 在一个实施例中，用于互连电子部件的装置包括具有第一表面和第二表面的电介质部分。 第一端子设置在电介质部分的第一表面上，用于连接到第一电子部件。 第二端子设置在电介质部分的第二表面上，用于连接到第二电子部件。 该装置还包括沿着相对于第一表面以倾斜角定向的纵向轴线延伸通过电介质部分的通道。 该通道至少部分地填充有将第一端子与第二端子电连接的导电材料。

公开(公告)号：US07274105B2

公开(公告)日：2007-09-25

申请号：US11287834

申请日：2005-11-28

Applicant: M. Ray Fairchild ,  Aleksandra Djordjevic ,  Javier Ruiz

Inventor： M. Ray Fairchild ,  Aleksandra Djordjevic ,  Javier Ruiz

IPC: H01L23/48 ,  H01L23/498 ,  H05K1/02 ,  H05K3/34 ,  H05K1/11

CPC classification number: H05K1/0206 ,  H01L23/3677 ,  H01L24/33 ,  H01L2224/32225 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H05K3/0061 ,  H05K2201/09836 ,  H01L2924/00

Abstract: An electronics assembly is provided including a circuit board substrate having a top surface and a bottom surface and a plurality of thermal conductive vias extending from the top surface to the bottom surface. At least one electronics package is mounted to the top surface of the substrate. A heat sink device is in thermal communication with the bottom surface of the substrate. Thermal conductive vias are in thermal communication to pass thermal energy from the at least one electronics package to the heat sink. At least some of the thermal conductive vias are formed extending from the top surface to the bottom surface of the substrate at an angle.

公开(公告)号：US20060240687A1

公开(公告)日：2006-10-26

申请号：US11475479

申请日：2006-06-26

Applicant: Chin Chong ,  Choon Lee

Inventor： Chin Chong ,  Choon Lee

IPC: H01R12/00

CPC classification number: H01R12/526 ,  H05K1/115 ,  H05K3/42 ,  H05K2201/09836 ,  Y10T29/49147 ,  Y10T29/49165 ,  Y10T29/49204 ,  Y10T29/4921 ,  Y10T29/49211 ,  Y10T29/4922

Abstract: Circuit boards, microelectronic devices, and other apparatuses having slanted vias are disclosed herein. In one embodiment, an apparatus for interconnecting electronic components includes a dielectric portion having a first surface and a second surface. A first terminal is disposed on the first surface of the dielectric portion for connection to a first electronic component. A second terminal is disposed on the second surface of the dielectric portion for connection to a second electronic component. The apparatus further includes a passage extending through the dielectric portion along a longitudinal axis oriented at an oblique angle relative to the first surface. The passage is at least partially filled with conductive material electrically connecting the first terminal to the second terminal.