公开(公告)号：US5760469A

公开(公告)日：1998-06-02

申请号：US602421

申请日：1996-02-16

Applicant: Yutaka Higashiguchi ,  Mitsuo Inagaki ,  Toshio Kumai ,  Ryoichi Ochiai ,  Yasuhiro Teshima ,  Mamoru Niishiro ,  Yasushi Kobayashi ,  Hideaki Tamura ,  Hiroshi Iimura ,  Seishi Chiba ,  Yukio Sekiya ,  Shuzo Igarashi ,  Yasuhiro Ichihara

Inventor： Yutaka Higashiguchi ,  Mitsuo Inagaki ,  Toshio Kumai ,  Ryoichi Ochiai ,  Yasuhiro Teshima ,  Mamoru Niishiro ,  Yasushi Kobayashi ,  Hideaki Tamura ,  Hiroshi Iimura ,  Seishi Chiba ,  Yukio Sekiya ,  Shuzo Igarashi ,  Yasuhiro Ichihara

IPC: H01L23/12 ,  H01L23/057 ,  H01L23/31 ,  H01L23/498 ,  H01L23/50 ,  H05K1/02 ,  H05K3/34 ,  H01L23/02 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H05K3/3436 ,  H01L23/057 ,  H01L23/3107 ,  H01L23/49816 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/15153 ,  H01L2924/15159 ,  H01L2924/15165 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/181 ,  H05K1/0271 ,  H05K2201/068 ,  H05K2201/09036 ,  H05K2201/10477 ,  H05K2201/10568 ,  H05K2201/10666 ,  H05K3/3431 ,  Y02P70/613

Abstract: A semiconductor device includes a package having opposing surfaces, a first terminal for an outer connection supported by said package and electronic components supported by said package, and the opposing surfaces of the package having slits so that a shape of the package can be changed in a mounted state. Therefore, stress applied to soldered junctions of the first and second terminals is decreased.

Abstract translation: 半导体器件包括具有相对表面的封装，用于由所述封装支撑的外部连接的第一端子和由所述封装支撑的电子部件，并且封装的相对表面具有狭缝，使得封装的形状可以在 安装状态。 因此，施加到第一端子和第二端子的焊接接头的应力减小。

公开(公告)号：US5640051A

公开(公告)日：1997-06-17

申请号：US353438

申请日：1994-12-09

Applicant: Yoshihiro Tomura ,  Yoshihiro Bessho ,  Yasuhiko Hakotani

Inventor： Yoshihiro Tomura ,  Yoshihiro Bessho ,  Yasuhiko Hakotani

IPC: H01L21/48 ,  H01L21/56 ,  H01L23/485 ,  H01L23/498 ,  H05K1/18 ,  H05K3/24 ,  H05K3/32 ,  H05K3/40 ,  H01L23/02 ,  H01L23/12 ,  H01L23/50

CPC classification number: H05K3/4007 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/13 ,  H05K3/321 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/13 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/351 ,  H05K1/181 ,  H05K2201/0347 ,  H05K2201/0367 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/09845 ,  H05K2201/10568 ,  H05K2201/10719 ,  H05K2201/10984 ,  H05K2203/0577 ,  H05K2203/167 ,  H05K3/243

Abstract: A chip carrier according to the present invention includes: a carrier body including an upper face, a lower face, and an internal conductor; and a plurality of terminal electrodes formed on the upper face of the carrier body, the plurality of terminal electrodes electrically connecting an LSI chip to the internal conductor. A plurality of concave portions for electrically connecting a plurality of electrodes on a circuit substrate to the internal conductor are provided on the lower face of the carrier body, the concave portions being electrically connected to the internal conductor.

Abstract translation: 根据本发明的芯片载体包括：载体，其包括上表面，下表面和内导体; 以及形成在所述载体主体的上表面上的多个端子电极，所述多个端子电极将LSI芯片电连接到所述内部导体。 多个用于将电路基板上的多个电极电连接到内部导体的凹部设置在载体主体的下表面上，凹部电连接到内部导体。

公开(公告)号：US5539153A

公开(公告)日：1996-07-23

申请号：US287453

申请日：1994-08-08

Applicant: Matthew K. Schwiebert ,  Donald T. Campbell ,  Matthew Heydinger ,  Robert E. Kraft ,  Hubert A. Vander Plas

Inventor： Matthew K. Schwiebert ,  Donald T. Campbell ,  Matthew Heydinger ,  Robert E. Kraft ,  Hubert A. Vander Plas

IPC: H01L21/48 ,  H01L21/56 ,  H01L21/60 ,  H01L23/485 ,  H01L23/498 ,  H05K3/12 ,  H05K3/34 ,  H05K1/18

CPC classification number: H01L24/17 ,  H01L21/4853 ,  H01L21/563 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/14 ,  H01L24/16 ,  H01L24/28 ,  H05K3/3436 ,  H05K3/3484 ,  H01L2224/11005 ,  H01L2224/1131 ,  H01L2224/1132 ,  H01L2224/11332 ,  H01L2224/11334 ,  H01L2224/1147 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/17051 ,  H01L2224/29111 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/742 ,  H01L2224/81193 ,  H01L2224/83102 ,  H01L2224/83136 ,  H01L2224/92125 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H05K2201/094 ,  H05K2201/09781 ,  H05K2201/10568 ,  H05K2201/10734 ,  H05K2201/2036 ,  H05K2203/043 ,  H05K2203/0568 ,  H05K2203/0769 ,  H05K3/1216 ,  H05K3/3463 ,  Y02P70/613 ,  Y10T29/4913

Abstract: A solder bump is stenciled into a substrate, providing bumped substrate at pitches below 400 microns. The solder is applied through stencil/mask and paste method; the mask, however, remains attached to the substrate during reflow. Pitches of greater than 400 microns may also be obtained through the invention. The invention further provides for generation of uniform, controllable volume metal balls

Abstract translation: 将焊料凸块模版到基板中，在低于400微米的间距处提供凸起的基板。 通过模板/掩模和糊剂法施加焊料; 然而，掩模在回流期间保持附着于基底。 也可以通过本发明获得大于400微米的间距。 本发明进一步提供均匀的可控体积金属球的产生

公开(公告)号：US5457610A

公开(公告)日：1995-10-10

申请号：US69318

申请日：1993-06-01

Applicant: Lonnie L. Bernardoni ,  Thomas J. Swirbel

Inventor： Lonnie L. Bernardoni ,  Thomas J. Swirbel

IPC: H05K3/30 ,  H05K3/32 ,  H05K9/00 ,  H05K1/14

CPC classification number: H05K3/325 ,  H05K3/303 ,  H05K2201/10371 ,  H05K2201/10568 ,  H05K2201/209 ,  Y02P70/613

Abstract: A substrate (100) includes a surface (102) having a hook and loop fastener area (106). The area (106) is selectively metallized to produce interconnect points (108). The area (106) is used to attach a connector, another substrate, or a flex circuit to the substrate (100) without the use of solder or other conductive adhesives. The area (106) provides for the mechanical coupling. The selectively metallized areas (108) provide for the electrical coupling of the two substrates.

Abstract translation: 衬底（100）包括具有钩和环紧固件区域（106）的表面（102）。 区域（106）被选择性地金属化以产生互连点（108）。 区域（106）用于将连接器，另一衬底或柔性电路连接到衬底（100），而不使用焊料或其它导电粘合剂。 区域（106）提供机械联接。 选择性金属化区域（108）提供两个基板的电耦合。

公开(公告)号：US5451815A

公开(公告)日：1995-09-19

申请号：US215614

申请日：1994-03-22

Applicant: Norio Taniguchi ,  Kazuto Tsuji ,  Junichi Kasai ,  Michio Sono

Inventor： Norio Taniguchi ,  Kazuto Tsuji ,  Junichi Kasai ,  Michio Sono

IPC: H01L23/04 ,  H01L23/12 ,  H01L23/498 ,  H05K3/30 ,  H05K3/34 ,  H01L23/48

CPC classification number: H05K3/303 ,  H01L23/49811 ,  H01L23/49833 ,  H01L23/49838 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K2201/09781 ,  H05K2201/10454 ,  H05K2201/10568 ,  H05K2201/10659 ,  H05K2201/10696 ,  H05K3/3426 ,  Y02P70/613

Abstract: A semiconductor device includes vertical placement part for mounting the semiconductor device on a surface of a circuit board in a vertical position, and a connection part for making electrical connections between the circuit board and a semiconductor element. A stage is provided on which the semiconductor element is placed. The stage has supporting members causing the semiconductor device to vertically stand on the circuit board. Wiring boards, stacked on a side of the stage on which the semiconductor element is placed, have windows in which the semiconductor element is located. The vertical placement part includes wiring lines extending between edges of the wiring boards facing the circuit board and peripheries of the windows. The wiring lines have ends located in the vicinity of the edges of the wiring boards and have a shape enabling the semiconductor device to be mounted on the circuit board.

Abstract translation: 半导体器件包括用于将半导体器件安装在垂直位置的电路​​板的表面上的垂直放置部分和用于在电路板和半导体元件之间进行电连接的连接部分。 提供放置半导体元件的平台。 舞台具有使半导体器件垂直站立在电路板上的支撑构件。 堆叠在其上放置半导体元件的台的一侧的布线板具有半导体元件所在的窗口。 垂直放置部分包括在布线板的面向电路板的边缘和窗口的周边之间延伸的布线。 布线具有位于布线板的边缘附近的端部，并且具有能够将半导体器件安装在电路板上的形状。

公开(公告)号：US5430326A

公开(公告)日：1995-07-04

申请号：US238673

申请日：1994-05-05

Applicant: Shuji Miyashita

Inventor： Shuji Miyashita

IPC: H01L25/07 ,  H01L25/11 ,  H01L25/18 ,  H02M7/00 ,  H02M7/04 ,  H02M7/48 ,  H05K1/18 ,  H05K3/32 ,  H01L25/065 ,  H01L23/48

CPC classification number: H02M7/003 ,  H01L25/115 ,  H05K1/18 ,  H01L2924/0002 ,  H05K2201/10166 ,  H05K2201/10409 ,  H05K2201/10568 ,  H05K2201/10659 ,  H05K3/325

Abstract: A semiconductor device includes at least one semiconductor element contained in a casing, with main terminals and auxiliary terminals drawn from the semiconductor electrodes disposed on the upper face of the casing. The main terminals and the auxiliary terminals are arranged on the same plane at the same height without disposing partitions between the terminals so that the devices can be mounted on a printed wiring board on which the necessary conductor patterns for the main circuit have already been formed. In an alternative embodiment, the main terminals are arranged at a level slightly higher than the auxiliary terminals with the auxiliary terminals being surrounded by a supporting guide.

Abstract translation: 半导体器件包括容纳在壳体中的至少一个半导体元件，其中主端子和辅助端子从设置在壳体的上表面上的半导体电极拉出。 主端子和辅助端子以相同的高度布置在相同的平面上，而不在端子之间设置隔板，使得器件可以安装在已经形成了用于主电路的必要导体图案的印刷线路板上。 在替代实施例中，主端子被布置在略高于辅助端子的水平处，辅助端子被支撑引导件包围。

公开(公告)号：USRE34794E

公开(公告)日：1994-11-22

申请号：US10022

申请日：1993-01-28

Applicant: Warren M. Farnworth

Inventor： Warren M. Farnworth

IPC: H01L23/495 ,  H01L25/10 ,  H05K1/18 ,  H05K3/30 ,  H01L39/02 ,  H01L23/16 ,  H01L23/42 ,  H01L23/44

CPC classification number: H05K1/181 ,  H01L23/49555 ,  H01L25/105 ,  H05K3/303 ,  H01L2225/1029 ,  H01L2225/107 ,  H01L2225/1076 ,  H01L2924/0002 ,  H05K2201/09709 ,  H05K2201/10454 ,  H05K2201/10522 ,  H05K2201/10545 ,  H05K2201/10568 ,  H05K2201/10696 ,  H05K2203/1572 ,  H05K2203/167 ,  Y02P70/611 ,  Y02P70/613

Abstract: A semiconductor package having a gull-wing, zig-zag, inline-lead configuration and end-of-package anchoring devices for rigidly affixing the package to a circuit board such that each lead is in compressibe contact with its associated mounting pad on the board. The anchoring devices of a first embodiment comprise anchoring pins having fish-hook-type barbs which lock against the under side of the board when the pegs are inserted through holes in the board; a second embodiment utilizes anchoring pins which are adhesively bonded in recesses that have been drilled or molded into the board; a third embodiment utilizes anchoring pins, the ends of which can be bonded directly to planar peg-bonding regions on the surface of the board; and a fourth utilizes tapered anchoring ping which may be inserted with an interference fit into holes in the board. The invention eliminates the need for mechanical support of the packages during solder reflow operations used during board assembly and repair.

Abstract translation: 一种半导体封装，具有鸥翼，锯齿形，在线引线配置和封装终端固定装置，用于将封装刚性地固定到电路板上，使得每个引线与板上相关联的安装垫压缩接触 。 第一实施例的锚固装置包括具有鱼钩型倒钩的锚定销，当钉通过板中的孔插入时，锁钩相对于板的下侧锁定; 第二实施例利用粘结在已经钻孔或模制到板中的凹槽中的锚定销; 第三实施例使用锚定销，其端部可以直接地接合到板的表面上的平面钉接合区域; 并且第四种使用锥形锚定平面，其可以以过盈配合插入板中的孔中。 本发明消除了在电路板组装和修理期间使用的焊料回流操作期间对包装的机械支撑的需要。

公开(公告)号：US5264998A

公开(公告)日：1993-11-23

申请号：US900875

申请日：1992-06-18

Applicant: Fransiscus W. M. Bax

Inventor： Fransiscus W. M. Bax

IPC: F21V19/00 ,  H01L33/00 ,  H01R33/09 ,  H05K1/18 ,  H05K3/30 ,  H01R33/00

CPC classification number: H05K3/301 ,  H01R12/58 ,  H01R33/09 ,  H05K2201/10462 ,  H05K2201/10568 ,  H05K2201/10606 ,  H05K2203/167 ,  Y10S362/80

Abstract: An electric lamp having a cap (10) of synthetic resin is suitable for use on a printed circuit board (6). The cap (10) has resilient arms (15) extending parallel to a plane (8) through the axis (2) of the lamp vessel (1). The holder portion (11) of the cap (10) holding the lamp vessel (1), and the arms (15) can clamp a p.c.b. (6) in between them. Means (19, 21) may be present to keep the lamp fixed in an opening (9) in the p.c.b. (6) or at an edge thereof. The lamp requires little space on a p.c.b.

公开(公告)号：US5230638A

公开(公告)日：1993-07-27

申请号：US929087

申请日：1992-08-12

Applicant: Anthony M. DiViesti

Inventor： Anthony M. DiViesti

IPC: H01R12/70 ,  H01R12/71 ,  H01R13/73 ,  H05K1/02 ,  H05K3/30

CPC classification number: H05K3/303 ,  H01R12/7064 ,  H01R12/716 ,  H05K1/0271 ,  H05K2201/068 ,  H05K2201/10189 ,  H05K2201/10568 ,  H05K2201/10598 ,  Y02P70/613 ,  Y10S248/901

Abstract: A mounting peg system is disclosed in an electrical connector adapted for surface mounting on a printed circuit board. The connector includes an elongated insulating housing defining a longitudinal direction and a transverse direction of the connector. At least a pair of mounting pegs are spaced longitudinally of the housing for mounting in a respective pair of mounting holes in the printed circuit board. The mounting peg system includes one of the pair of mounting pegs being configured to be relatively rigid in both the longitudinal and transverse directions of the connector to securely retain the connector on the circuit board. The other of the pair of mounting pegs is configured to be relatively rigid in the transverse direction and relatively compliant in the longitudinal direction to accommodate longitudinal thermal expansion of the housing relative to the circuit board.

公开(公告)号：US5186383A

公开(公告)日：1993-02-16

申请号：US770070

申请日：1991-10-02

Applicant: Cynthia Melton ,  Carl Raleigh ,  Kenneth Cholewczynski ,  Kevin Moore

Inventor： Cynthia Melton ,  Carl Raleigh ,  Kenneth Cholewczynski ,  Kevin Moore

IPC: B23K1/00 ,  H01L21/60 ,  H05K1/18 ,  H05K3/34

CPC classification number: H01L24/81 ,  B23K1/0016 ,  H01L24/17 ,  H05K3/3436 ,  B23K2201/40 ,  H01L2224/10135 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/14505 ,  H01L2224/1703 ,  H01L2224/17051 ,  H01L2224/81136 ,  H01L2224/81139 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H05K2201/09781 ,  H05K2201/10568 ,  H05K2201/2036 ,  H05K2203/0723 ,  H05K3/3473 ,  Y02P70/613 ,  Y10T29/49144

Abstract: A method for attaching an integrated circuit component to a printed circuit board by a plurality of solder bump interconnections utilizes a printed circuit board comprising a solder-plated circuit trace. The trace includes terminals, each including a terminal pad and a runner section. A solder plate formed of a first solder alloy is applied to the terminal to extend continuously between the pad and the runner section. Solder bumps are affixed to the component and are formed of second compositionally distinct solder alloy having a melting temperature greater than the first alloy. The component and board are then assembled so that the bumps rest against the solder-plated terminal pads, and heated to a temperature effective to melt the solder plate but not the bump alloy. Upon cooling to resolidify the solder, the solder plate is fused to the bumps to form the interconnections.

Abstract translation: 通过多个焊料凸块互连将集成电路部件附接到印刷电路板的方法利用包括焊接电镀电路迹线的印刷电路板。 轨迹包括端子，每个端子包括端子垫和流道部分。 将由第一焊料合金形成的焊盘施加到端子上，以在焊盘和流道部分之间连续延伸。 焊料凸起固定在部件上，并且由具有大于第一合金的熔化温度的第二组成不同的焊料合金形成。 然后将组件和板组装成使得凸块抵靠焊料焊接的端子焊盘，并且被加热到有效熔化焊接板而不是凸块合金的温度。 在冷却以重新固化焊料时，焊料板与凸块熔合以形成互连。