公开(公告)号：US20070119911A1

公开(公告)日：2007-05-31

申请号：US11287962

申请日：2005-11-28

Applicant: Su Chan ,  Binghua Pan ,  Cheng Cheok ,  Chih Nah ,  Robert Schofield ,  Mahesh Chengalva

Inventor： Su Chan ,  Binghua Pan ,  Cheng Cheok ,  Chih Nah ,  Robert Schofield ,  Mahesh Chengalva

IPC: B23K31/00 ,  B23K31/02

CPC classification number: H05K3/303 ,  H05K1/0266 ,  H05K3/3452 ,  H05K2201/09909 ,  H05K2201/09936 ,  H05K2201/10727 ,  H05K2201/2036 ,  Y02P70/613

Abstract: A composite standoff is formed on a circuit board during the processing of the circuit board while an array of electrical circuit traces including contact pads are formed, portions of the electrical circuit traces are covered by a solder mask, and legend ink is applied to the circuit board for locating electronic components on the circuit board without any need for an additional step.

Abstract translation: 在电路板的处理期间在电路板上形成复合隔板，同时形成包括接触焊盘的电路迹线阵列，电路迹线的一部分被焊接掩模覆盖，并且传说墨水被施加到电路 用于在电路板上定位电子元件，而无需额外的步骤。

公开(公告)号：US20060219760A1

公开(公告)日：2006-10-05

申请号：US11277867

申请日：2006-03-29

Applicant: Tatsuya Wagoh ,  Toru Mizuno ,  Osamu Shindo

Inventor： Tatsuya Wagoh ,  Toru Mizuno ,  Osamu Shindo

IPC: B23K31/00

CPC classification number: H05K3/3478 ,  B23K1/0056 ,  B23K3/0623 ,  H01L2224/742 ,  H05K3/3442 ,  H05K3/3494 ,  H05K2201/10727 ,  H05K2203/0195 ,  H05K2203/041 ,  H05K2203/082 ,  H05K2203/107

Abstract: Provided is a nozzle unit for use in a bonding device in which bonding between a first member and a second member is effected by providing a bonding member that has been melted by heating at a bonding position where the first member and the second member are to be bonded to each other. The nozzle unit includes: a cylindrical nozzle assembly having an accommodating space accommodating the bonding member, and an opening which allows ejection of the bonding member accommodated in the accommodating space onto the bonding position, which has a diameter larger than the diameter of the bonding member, and which communicates with the accommodating space; and a holding/releasing member for releasably holding the bonding member within the accommodating space.

Abstract translation: 提供一种用于接合装置的喷嘴单元，其中通过在第一构件和第二构件的接合位置处提供通过加热而熔化的接合构件来实现第一构件和第二构件之间的接合 彼此粘合。 喷嘴单元包括：圆柱形喷嘴组件，其具有容纳接合构件的容纳空间，以及允许将容纳在容纳空间中的接合构件弹出到接合位置的开口，该接合位置的直径大于接合构件的直径 并且与容纳空间连通; 以及用于将接合构件可释放地保持在容纳空间内的保持/释放构件。

公开(公告)号：US20060193084A1

公开(公告)日：2006-08-31

申请号：US11355470

申请日：2006-02-15

Applicant: Takuya Satoh ,  Tatsushi Yoshida ,  Tatsumi Tsuchiya ,  Yoshio Uematsu

Inventor： Takuya Satoh ,  Tatsushi Yoshida ,  Tatsumi Tsuchiya ,  Yoshio Uematsu

IPC: G11B5/60

CPC classification number: H05K3/3442 ,  G11B5/4853 ,  H01L2224/742 ,  H01L2924/01327 ,  H05K3/3494 ,  H05K2201/10727 ,  H05K2203/0195 ,  H05K2203/041 ,  H05K2203/043 ,  H05K2203/107 ,  Y02P70/613 ,  Y10T29/4903 ,  Y10T29/49211 ,  H01L2924/00

Abstract: Embodiments of the invention relate to making reconnection when a soldered connection fails in a head/slider used in a magnetic disk drive. In one embodiment, a solder mass deposited on a slider pad of a head/slider is separated from a lead pad and a solder ball connection is yet to be made between the slider pad and the lead pad. A shaping tip is heated to a temperature near a melting point of a solder. The shaping tip is moved in parallel with a surface of the slider pad toward the side of the lead pad to soften the solder mass. The solder mass is thereafter irradiated with a laser beam so as to form a solder fillet, thereby making a soldered connection between the lead pad and the slider pad.

Abstract translation: 本发明的实施例涉及当在磁盘驱动器中使用的头/滑块中的焊接连接失败时重新连接。 在一个实施例中，沉积在头/滑块的滑块上的焊料块与引线焊盘分离，并且在滑块焊盘和引线焊盘之间尚未形成焊球连接。 将成型尖端加热至接近焊料熔点的温度。 成形尖端与滑块的表面平行地移动到铅焊盘的侧面以软化焊料质量。 然后用激光束照射焊料，以形成焊锡圆角，从而在引线焊盘和滑块之间形成焊接连接​​。

公开(公告)号：US20060066416A1

公开(公告)日：2006-03-30

申请号：US10950131

申请日：2004-09-24

Applicant: Dean Nicholson ,  Reto Zingg ,  Keith Howell ,  Eric Ehlers

Inventor： Dean Nicholson ,  Reto Zingg ,  Keith Howell ,  Eric Ehlers

IPC: H03H7/38

CPC classification number: H01L23/66 ,  H01L23/04 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01055 ,  H01L2924/01061 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/30111 ,  H01P1/20 ,  H05K1/0243 ,  H05K2201/10666 ,  H05K2201/10727 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: In one aspect, a signal path is described. The signal path has a nominal impedance over a specified bandwidth and interconnects a port of a microwave circuit package and a microwave component mounted in the microwave circuit package. The signal path includes an inductive transition and first and second capacitive structures. The inductive transition extends from a first point on the signal path to a second point on the signal path and has an excess impedance above the nominal impedance. The first and second capacitive structures respectively shunt the first and second points on the signal path to compensate the excess impedance of the inductive transition. The inductive transition and the first and second capacitive structures approximate a filter having an impedance substantially matching the nominal impedance over the specified bandwidth. In other aspects, a microwave circuit package that incorporates the above-described signal path and an interconnection method that includes forming the above-described signal path are described.

Abstract translation: 在一个方面，描述信号路径。 信号路径具有指定带宽上的标称阻抗，并且互连微波电路封装的端口和安装在微波电路封装中的微波元件。 信号路径包括电感转换和第一和第二电容结构。 电感转换从信号路径上的第一点延伸到信号路径上的第二个点，并具有超过标称阻抗的过量阻抗。 第一和第二电容结构分别分流信号路径上的第一和第二点以补偿电感转变的过量阻抗。 感应跃迁以及第一和第二电容结构近似于具有与指定带宽上的标称阻抗基本匹配的阻抗的滤波器。 在其他方面，描述了结合上述信号路径的微波电路封装以及包括形成上述信号路径的互连方法。

公开(公告)号：US20060001181A1

公开(公告)日：2006-01-05

申请号：US11223260

申请日：2005-09-12

Applicant: Seok Jun

Inventor： Seok Jun

IPC: H01L29/739

CPC classification number: H05K3/3442 ,  H01L23/13 ,  H01L23/49805 ,  H01L23/49827 ,  H01L23/49833 ,  H01L2224/48227 ,  H01L2924/09701 ,  H05K2201/09172 ,  H05K2201/10727 ,  Y02P70/613

Abstract: Disclosed is a terminal structure of a multi-layer substrate and a method for forming the same. In the terminal structure, a plurality of terminals are formed on at least two adjacent substrate layers, each of the terminals being spaced from adjacent ones to a predetermined interval. Openings are formed in at least one of the substrate layers. Each of the openings is formed between each adjacent ones of first terminals in the at least one substrate layer, and spaced from the each first terminals to a predetermined gap, and has a size same as that of the first terminals. The substrate layers are stacked one atop another and compressed together so that second terminals formed on at least one corresponding substrate layer are projected to a plane of an outermost substrate layer on which corresponding terminals are formed. The terminal structure and the method can secure a predetermined interval to a plurality of terminals in a package when the terminals are formed as well as simplify formation thereof.

Abstract translation: 公开了多层基板的端子结构及其形成方法。 在端子结构中，在至少两个相邻的基板层上形成多个端子，每个端子与相邻的基板间隔开至预定间隔。 开口形成在至少一个基板层中。 每个开口形成在至少一个基板层中的每个相邻的第一端子之间，并且与每个第一端子间隔开至预定的间隙，并且具有与第一端子的尺寸相同的尺寸。 将基板层叠在一起并压缩在一起，使形成在至少一个对应基板层上的第二端子突出到形成相应端子的最外层基板层的平面上。 当端子形成时，端子结构和方法可以确保封装中的多个端子的预定间隔，并且简化其形成。

公开(公告)号：US20050247761A1

公开(公告)日：2005-11-10

申请号：US10838897

申请日：2004-05-04

Applicant: Patricia Albanese ,  John Osenbach ,  Thomas Shilling

Inventor： Patricia Albanese ,  John Osenbach ,  Thomas Shilling

IPC: B23K1/00 ,  H05K3/26 ,  H05K3/34 ,  B23K31/00

CPC classification number: B23K1/0016 ,  B23K2101/42 ,  H01L2224/16225 ,  H05K3/26 ,  H05K3/3421 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/0989 ,  H05K2201/09909 ,  H05K2201/10689 ,  H05K2201/10727

Abstract: The specification describes a surface mount method for the manufacture of high device density circuit boards. The stand-off space of the components on the board can be enlarged significantly by selectively omitting, or selectively removing, the soldermask underneath the component package. This improves access of the cleaning fluid to the underside of the component during the cleaning operation.

Abstract translation: 该说明书描述了用于制造高器件密度电路板的表面贴装方法。 通过选择性地省略或选择性地去除组件封装下方的焊接掩模，可以显着增大板上部件的间隔空间。 这在清洁操作期间改善了清洁流体到组件的下侧的访问。

公开(公告)号：US06927490B2

公开(公告)日：2005-08-09

申请号：US10960411

申请日：2004-10-07

Applicant: Paul D. Franzon ,  Stephen E. Mick ,  John M. Wilson

Inventor： Paul D. Franzon ,  Stephen E. Mick ,  John M. Wilson

IPC: H01L23/13 ,  H01L23/48 ,  H01L23/498 ,  H05K1/02 ,  H05K1/16 ,  H05K3/34

CPC classification number: H01L24/73 ,  H01L23/13 ,  H01L23/48 ,  H01L23/49816 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/642 ,  H01L23/645 ,  H01L25/0657 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06531 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19103 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0239 ,  H05K1/0243 ,  H05K1/0263 ,  H05K1/165 ,  H05K3/3436 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/10727 ,  H01L2224/05599

Abstract: Microelectronic packages include a first microelectronic substrate having a first face and a first AC-coupled interconnect element on the first face. A second microelectronic substrate includes a second face and a second AC-coupled interconnect element on the second face. A buried solder bump extends between the first and second faces, and is at least partially buried beneath the first and/or second faces, to maintain the first and second AC-coupled interconnect elements in closely spaced apart relation. The buried solder bump also may couple DC power between the first and second substrates. Other technologies also may be used to maintain the AC-coupled interconnect elements in closely spaced apart relation and to couple DC power between the substrates. The first and second AC-coupled interconnect elements may be first and second capacitor plates, first and second inductors and/or first and second combined inductive and capacitive elements.

公开(公告)号：US06885090B2

公开(公告)日：2005-04-26

申请号：US09997586

申请日：2001-11-28

Applicant: Paul D. Franzon ,  Stephen E. Mick ,  John M. Wilson

Inventor： Paul D. Franzon ,  Stephen E. Mick ,  John M. Wilson

IPC: H01L23/13 ,  H01L23/48 ,  H01L23/498 ,  H05K1/02 ,  H05K1/16 ,  H05K3/34 ,  H01L23/02

CPC classification number: H01L24/73 ,  H01L23/13 ,  H01L23/48 ,  H01L23/49816 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/642 ,  H01L23/645 ,  H01L25/0657 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06531 ,  H01L2225/06593 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19103 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0239 ,  H05K1/0243 ,  H05K1/0263 ,  H05K1/165 ,  H05K3/3436 ,  H05K2201/09036 ,  H05K2201/09472 ,  H05K2201/10727 ,  H01L2224/05599

Abstract: Microelectronic packages include a first microelectronic substrate having a first face and a first AC-coupled interconnect element on the first face. A second microelectronic substrate includes a second face and a second AC-coupled interconnect element on the second face. A buried solder bump extends between the first and second faces, and is at least partially buried beneath the first and/or second faces, to maintain the first and second AC-coupled interconnect elements in closely spaced apart relation. The buried solder bump also may couple DC power between the first and second substrates. Other technologies also may be used to maintain the AC-coupled interconnect elements in closely spaced apart relation and to couple DC power between the substrates. The first and second AC-coupled interconnect elements may be first and second capacitor plates, first and second inductors and/or first and second combined inductive and capacitive elements.

Abstract translation: 微电子封装包括在第一面上具有第一面和第一AC耦合互连元件的第一微电子衬底。 第二微电子衬底包括在第二面上的第二面和第二AC耦合互连元件。 埋入的焊料凸块在第一和第二表面之间延伸，并且至少部分地埋在第一和/或第二表面之下，以将第一和第二AC耦合互连元件保持紧密间隔的关系。 埋入的焊料凸块还可以在第一和第二衬底之间耦合直流电力。 也可以使用其它技术来将交流耦合互连元件保持在紧密间隔的关系中并且在基板之间耦合直流电力。 第一和第二AC耦合互连元件可以是第一和第二电容器板，第一和第二电感器和/或第一和第二组合的电感和电容元件。

公开(公告)号：US06818977B2

公开(公告)日：2004-11-16

申请号：US10197986

申请日：2002-07-17

Applicant: Chia Yong Poo ,  Boon Suan Jeung ,  Chua Swee Kwang ,  Low Siu Waf ,  Chan Min Yu ,  Neo Yong Loo

Inventor： Chia Yong Poo ,  Boon Suan Jeung ,  Chua Swee Kwang ,  Low Siu Waf ,  Chan Min Yu ,  Neo Yong Loo

IPC: H01L2302

CPC classification number: H01L23/13 ,  H01L23/3128 ,  H01L23/49805 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2225/1035 ,  H01L2225/1064 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/15311 ,  H01L2924/19041 ,  H05K1/141 ,  H05K3/3436 ,  H05K3/3442 ,  H05K3/403 ,  H05K2201/045 ,  H05K2201/049 ,  H05K2201/09181 ,  H05K2201/10727

Abstract: A multichip assembly includes semiconductor devices or semiconductor device components with outer connectors on peripheral edges thereof. The outer connectors are formed by creating via holes along boundary lines between adjacent, unsevered semiconductor devices, or semiconductor device components, then plating or filling the holes with conductive material. When adjacent semiconductor devices or semiconductor device components are severed from one another, the conductive material in each via between the semiconductor devices is bisected. The semiconductor devices and components of the multichip assembly may have different sizes, as well as arrays of outer connectors with differing diameters and pitches. Either or both ends of each outer connector may be electrically connected to another aligned outer connector or contact area of another semiconductor device or component. Assembly in this manner provides a low-profile stacked assembly.

Abstract translation: 多芯片组件包括在其外围边缘上具有外部连接器的半导体器件或半导体器件部件。 外部连接器通过沿相邻的未切割半导体器件或半导体器件部件之间的边界线形成通孔而形成，然后用导电材料电镀或填充孔。 当相邻的半导体器件或半导体器件部件彼此切断时，半导体器件之间的每个通孔中的导电材料被二等分。 多芯片组件的半导体器件和组件可以具有不同的尺寸，以及具有不同直径和间距的外部连接器阵列。 每个外部连接器的一端或两端可以电连接到另一个对准的外部连接器或另一个半导体器件或组件的接触区域。 以这种方式组装提供了低调的堆叠组件。

公开(公告)号：US20040218769A1

公开(公告)日：2004-11-04

申请号：US10770763

申请日：2004-02-03

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Keiichi Kami ,  Mitsunori Ishimasa ,  Manabu Sumita

IPC: H04R025/00

CPC classification number: H04R17/00 ,  H05K3/3442 ,  H05K2201/0129 ,  H05K2201/10727 ,  H05K2203/304 ,  Y02P70/613

Abstract: A package of a surface-mountable electronic component to be reflow-soldered to a circuit board at about 250null C. or more includes a case and a cover. The cover has a softening temperature lower than the reflow temperature, and the case has a softening temperature higher than the reflow temperature. In the package, softening the cover compensates for the stress on the bonded surfaces resulting from a difference in thermal expansion between the case and the cover caused during reflow.

Abstract translation: 在大约250℃以上回流焊接到电路板的可表面安装的电子部件的封装包括壳体和盖子。 该软化温度低于回流温度，软化温度高于回流温度。 在封装中，软化盖可以补偿接合表面上的应力，这是由于在回流过程中导致的外壳和盖子之间的热膨胀差异。