公开(公告)号：US12031206B2

公开(公告)日：2024-07-09

申请号：US17812488

申请日：2022-07-14

Applicant: ASM IP Holding, B.V.

Inventor： Maart van Druenen ,  Qi Xie ,  Charles Dezelah ,  Petro Deminskyi ,  Lifu Chen ,  Giuseppe Alessio Verni ,  Ren-Jie Chang

IPC: C23C16/14 ,  C23C16/18 ,  C23C16/44

CPC classification number: C23C16/14 ,  C23C16/18 ,  C23C16/4408

Abstract: Disclosed are methods and systems for depositing layers comprising a transition metal and a group 13 element. The layers are formed onto a surface of a substrate. The deposition process may be a cyclical deposition process. Exemplary structures in which the layers may be incorporated include field effect transistors, VNAND cells, metal-insulator-metal (MIM) structures, and DRAM capacitors.

公开(公告)号：US20240218505A1

公开(公告)日：2024-07-04

申请号：US18396829

申请日：2023-12-27

Applicant: ASM IP Holding B.V.

Inventor： Jiyeon Kim ,  YoungChol Byun ,  Petri Raisanen ,  Sang Ho Yu ,  Sukanya Datta ,  Chiyu Zhu ,  Jan Willem Maes ,  Saima Ali ,  Elina Färm

IPC: C23C16/42 ,  C23C16/04

CPC classification number: C23C16/42 ,  C23C16/04

Abstract: Methods of forming molybdenum silicide are disclosed. Exemplary methods can include selectively forming molybdenum silicide on a first surface relative to a second surface. Additionally or alternatively, exemplary methods can include a cleaning step prior to forming the molybdenum silicide.

公开(公告)号：US20240213022A1

公开(公告)日：2024-06-27

申请号：US18545699

申请日：2023-12-19

Applicant: ASM IP Holding B.V.

Inventor： Brendan Marozas ,  Rami Khazaka ,  Gregory Deye

IPC: H01L21/02 ,  C30B25/16 ,  C30B25/20 ,  C30B29/06 ,  H01L21/3065

CPC classification number: H01L21/0257 ,  C30B25/165 ,  C30B25/205 ,  C30B29/06 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02532 ,  H01L21/30655

Abstract: A method for epitaxially growing a phosphorus doped silicon layer on a substrate is disclosed. Embodiments of the presently described method comprise exposing a substrate to a silicon precursor and to a phosphorus precursor, wherein the exposure of the substrate to the phosphorus precursor is done during an overlapping period with the exposure to the silicon precursor.

公开(公告)号：US20240203733A1

公开(公告)日：2024-06-20

申请号：US18535715

申请日：2023-12-11

Applicant: ASM IP Holding B.V.

Inventor： Omar Elleuch ,  Yanfu Lu ,  Caleb Miskin ,  Alexandros Demos

IPC: H01L21/02 ,  C23C16/52

CPC classification number: H01L21/0262 ,  C23C16/52 ,  H01L21/02532

Abstract: A material layer deposition method includes supporting one and only one substrate in a chamber arrangement, exposing the substrate to a first material layer precursor and a second material layer precursor, and forming a first material layer overlaying the substrate using the first material layer precursor and the second material layer precursor. The first material layer is exposed to the first material layer to the first material layer precursor and a second material layer formed onto the first material layer using the first material layer precursor. The second material layer precursor includes a germanium-containing material layer precursor and the first material layer precursor includes at least one of trisilane (Si3H8) and tetrasilane (Si4H10). Material layer stacks, semiconductor processing systems, and computer program products are also described.

公开(公告)号：US20240200189A1

公开(公告)日：2024-06-20

申请号：US18586902

申请日：2024-02-26

Applicant: ASM IP Holding B.V.

Inventor： Jereld Lee Winkler ,  Eric James Shero ,  Carl Louis White ,  Shankar Swaminathan ,  Bhushan Zope

IPC: C23C16/448 ,  H01L21/02

CPC classification number: C23C16/448 ,  H01L21/02271 ,  H01L21/0262

Abstract: A semiconductor processing device is disclosed. The device can include a reactor and a solid source vessel configured to supply a vaporized solid reactant to the reactor. A process control chamber can be disposed between the solid source vessel and the reactor. The device can include a valve upstream of the process control chamber. A control system can be configured to control operation of the valve based at least in part on feedback of measured pressure in the process control chamber.

公开(公告)号：US20240198366A1

公开(公告)日：2024-06-20

申请号：US18540419

申请日：2023-12-14

Applicant: ASM IP Holding B.V.

Inventor： Dinkar Nandwana ,  Allen D'Ambra ,  Dinh Tran ,  Chen Ni ,  Gary Paulsen ,  Michael Samy Boulos Hanna Elkomos

IPC: B05B1/30 ,  B05B1/00 ,  B05B1/18

CPC classification number: B05B1/3006 ,  B05B1/005 ,  B05B1/185

Abstract: Methods and apparatuses for measuring a flow conductance of a showerhead assembly are described. For example, a showerhead assembly may be seated in a housing. A gas source may be coupled to an intake port of the showerhead assembly and supply gas to the showerhead assembly via the intake port. A pressure controller may be coupled between the gas source and the showerhead assembly. The pressure controller may measure a flow throughput of the gas that passes through the pressure controller. The pressure controller may maintain the gas being supplied to the showerhead assembly at a first pressure value. A pressure transducer coupled to an exhaust port of the showerhead assembly may measure a second pressure value. A controller may determine a flow conductance of the showerhead assembly based on the flow throughput and the first and second pressure values.

公开(公告)号：US20240191351A1

公开(公告)日：2024-06-13

申请号：US18530444

申请日：2023-12-06

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux

IPC: C23C16/44 ,  C23C16/30 ,  C23C16/34 ,  C23C16/455 ,  C23C16/52 ,  H01L21/02

CPC classification number: C23C16/4412 ,  C23C16/308 ,  C23C16/345 ,  C23C16/45527 ,  C23C16/45544 ,  C23C16/52 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/0228

Abstract: A substrate processing system and a method for forming a layer on one or more substrates is disclosed. Embodiments, of the recently described substrate processing system comprise a process chamber, a precursor storage module, a pump, a pump valve and a controller configured to control the provision of the precursor flow to the process chamber.

公开(公告)号：USD1030687S1

公开(公告)日：2024-06-11

申请号：US29840698

申请日：2022-05-31

Applicant: ASM IP Holding B.V.

Designer： Shujin Huang ,  Junwei Su ,  Wentao Wang ,  Xing Lin

Abstract: FIG. 1 is a front perspective view of a susceptor, showing our new design;
FIG. 2 is a bottom perspective view thereof;
FIG. 3 is right side view thereof;
FIG. 4 is a left side view thereof;
FIG. 5 is front view thereof;
FIG. 6 is back view thereof;
FIG. 7 is a top view thereof; and,
FIG. 8 is a bottom view thereof.

公开(公告)号：US20240178021A1

公开(公告)日：2024-05-30

申请号：US18522152

申请日：2023-11-28

Applicant: ASM IP Holding B.V.

Inventor： Senthil Sivaraman ,  Mandar Deshpande ,  Samer Banna

IPC: H01L21/67 ,  H01L21/677

CPC classification number: H01L21/67201 ,  H01L21/67098 ,  H01L21/6719 ,  H01L21/67742

Abstract: A load lock arrangement includes a load lock body having an upper plate member defining an upper accessory seat, an intermediate plate member spaced apart from the upper plate member and defining an intermediate accessory seat, and a lower plate member separated from the upper plate member by the intermediate plate member and defining a lower accessory seat. One of an upper heater and an upper accessory seat blanking plate is fixed to the upper accessory seat; one of an upper chill plate and an intermediate accessory seat blanking plate fixed to the intermediate accessory seat; and one of a lower chill plate, a lower heater, and a lower accessory seat blanking plate fixed to the lower accessory seat. Semiconductor processing systems, methods of making load lock arrangements, and material layer deposition methods are also described.

公开(公告)号：US20240177992A1

公开(公告)日：2024-05-30

申请号：US18519172

申请日：2023-11-27

Applicant: ASM IP Holding B.V.

Inventor： Andrea Illiberi ,  Shaoren Deng ,  Giuseppe Alessio Verni ,  Daria Nevstrueva ,  Marko Tuominen ,  Charles Dezelah ,  Daniele Chiappe ,  Eva Elisabeth Tois ,  Viraj Madhiwala ,  Michael Givens

IPC: H01L21/02

CPC classification number: H01L21/02337 ,  H01L21/02118 ,  H01L21/02205 ,  H01L21/0228

Abstract: The disclosure relates to methods of forming organic polymers comprising polyimide and layers comprising the same and to methods of reducing polyamic acid content of an organic polymer. The embodiments of the disclosure further relate to methods of fabricating semiconductor devices, to selectively depositing a material on a surface of a semiconductor substrate and to semiconductor processing assemblies. The methods are characterized by contacting a polyimide-containing material, such as a layer, with a modifying agent that increases the proportion of polyimide in the organic polymer material.