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    Micromechanical component and suitable method for its manufacture
    71.
    发明授权
    Micromechanical component and suitable method for its manufacture 失效
    微机械部件及其制造方法

    公开(公告)号：US07435691B2

    公开(公告)日：2008-10-14

    申请号：US11221520

    申请日：2005-09-07

    Applicant: Heribert Weber

    Inventor： Heribert Weber

    IPC: H01L21/31 ,  H01L21/469

    CPC classification number: B81C1/00158 ,  B81B2201/0278 ,  B81B2203/0315

    Abstract: A micromechanical component having a silicon substrate; a cavity provided in the substrate; and a diaphragm, provided on the surface of the substrate, which closes the cavity; the diaphragm featuring a silicon-oxide layer having an opening that is formed by silicon-oxide wedges pointing to each other; and the diaphragm having at least one closing layer which closes the opening. Also, a suitable manufacturing method.

    Abstract translation: 具有硅衬底的微机械部件; 设置在所述基板中的空腔; 以及设置在所述基板的表面上的隔膜，其关闭所述空腔; 所述隔膜的特征在于具有通过彼此指向的氧化硅楔形成的开口的氧化硅层; 并且所述隔膜具有封闭所述开口的至少一个封闭层。 另外，合适的制造方法。

    MEMS sensor suite on a chip
    72.
    发明授权
    MEMS sensor suite on a chip 有权
    MEMS传感器套件在芯片上

    公开(公告)号：US07368312B1

    公开(公告)日：2008-05-06

    申请号：US11251740

    申请日：2005-10-17

    Applicant: Michael Scott Kranz ,  Robert Faye Elliott ,  Michael Ray Whitley ,  Marty Ray Williams ,  Philip John Reiner

    Inventor： Michael Scott Kranz ,  Robert Faye Elliott ,  Michael Ray Whitley ,  Marty Ray Williams ,  Philip John Reiner

    IPC: H01L21/00

    CPC classification number: B81C1/00246 ,  B81B2201/0235 ,  B81B2201/0278 ,  B81B2201/0292 ,  G01P2015/082 ,  G01P2015/084 ,  G01P2015/0842

    Abstract: The MEMS Sensor Suite on a Chip provides the capability, monolithically integrated onto one MEMS chip, to sense temperature, humidity, and two axes of acceleration. The device incorporates a MEMS accelerometer, a MEMS humidity sensor, and a MEMS temperature sensor on one chip. These individual devices incorporate proof masses, suspensions, humidity sensitive capacitors, and temperature sensitive resistors (thermistors) all fabricated in a common fabrication process that allows them to be integrated onto one micromachined chip. The device can be fabricated in a simple micromachining process that allows its size to be miniaturized for embedded and portable applications. During operation, the sensor suite chip monitors temperature levels, humidity levels, and acceleration levels in two axes. External circuitry allows sensor readout, range selection, and signal processing.

    Abstract translation: 芯片上的MEMS传感器套件提供单一集成到一个MEMS芯片上的能力，以感测温度，湿度和两个加速轴。 该器件在一个芯片上集成了MEMS加速度计，MEMS湿度传感器和MEMS温度传感器。 这些单独的器件包含所有在通用制造工艺中制造的校准质量，悬浮液，湿度敏感电容器和温度敏感电阻器（热敏电阻器），从而允许它们集成到一个微加工芯片上。 该器件可以在简单的微加工工艺中制造，允许其尺寸被小型化以用于嵌入式和便携式应用。 在运行过程中，传感器套件芯片监测两个轴的温度水平，湿度水平和加速度水平。 外部电路允许传感器读数，范围选择和信号处理。

    Process for a monolithically-integrated micromachined sensor and circuit
    73.
    发明申请
    Process for a monolithically-integrated micromachined sensor and circuit 审中-公开
    单片集成微机械传感器和电路的工艺

    公开(公告)号：US20050064619A1

    公开(公告)日：2005-03-24

    申请号：US10955128

    申请日：2004-09-30

    Applicant: Abhijeet Chavan ,  James Logsdon ,  Dan Chilcott ,  John Christenson ,  Robert Speck

    Inventor： Abhijeet Chavan ,  James Logsdon ,  Dan Chilcott ,  John Christenson ,  Robert Speck

    IPC: H01L27/16 ,  H01L21/00

    CPC classification number: B81B3/0072 ,  B81B2201/0278 ,  B81B2203/0127 ,  G01J5/02 ,  G01J5/024 ,  G01J5/12 ,  H01L27/16 ,  H01L2224/48463

    Abstract: A process using integrated sensor technology in which a micromachined sensing element and signal processing circuit are combined on a single semiconductor substrate to form, for example, an infrared sensor. The process is based on modifying a CMOS process to produce an improved layered micromachined member, such as a diaphragm, after the circuit fabrication process is completed. The process generally entails forming a circuit device on a substrate by processing steps that include forming multiple dielectric layers and at least one conductive layer on the substrate. The dielectric layers comprise an oxide layer on a surface of the substrate and at least two dielectric layers that are in tension, with the conductive layer being located between the two dielectric layers. The surface of the substrate is then dry etched to form a cavity and delineate the diaphragm and a frame surrounding the diaphragm. The dry etching step terminates at the oxide layer, such that the diaphragm comprises the dielectric layers and conductive layer. A special absorber is preferably fabricated on the diaphragm to promote efficient absorption of incoming infrared radiation.

    Abstract translation: 使用集成传感器技术的方法，其中微机械感测元件和信号处理电路组合在单个半导体衬底上以形成例如红外传感器。 该方法基于在电路制造过程完成之后修改CMOS工艺以产生改进的分层微加工构件，例如隔膜。 该方法通常需要通过处理步骤在衬底上形成电路器件，该步骤包括在衬底上形成多个电介质层和至少一个导电层。 电介质层包括在衬底的表面上的氧化物层和处于张力的至少两个电介质层，导电层位于两个电介质层之间。 然后将基板的表面干蚀刻以形成空腔并描绘膜片和围绕隔膜的框架。 干蚀刻步骤终止于氧化物层，使得隔膜包括电介质层和导电层。 优选地在隔膜上制造特殊的吸收体以促进进入的红外辐射的有效吸收。

    Method for producing a semiconductor component and a semiconductor component produced according to this method
    74.
    发明申请
    Method for producing a semiconductor component and a semiconductor component produced according to this method 失效
    根据该方法制造半导体部件和半导体部件的制造方法

    公开(公告)号：US20040147057A1

    公开(公告)日：2004-07-29

    申请号：US10473762

    申请日：2004-03-30

    Inventor： Hubert Benzel ,  Heribert Weber ,  Frank Schaefer

    IPC: H01L021/00

    CPC classification number: B81C1/00047 ,  B81B2201/0278 ,  B81C2201/0115 ,  B81C2201/0139

    Abstract: A method for manufacturing a semiconductor component (100; . . . ; 700), a multilayer semiconductor component in particular, preferably a micromechanical component, such as a heat transfer sensor in particular having a semiconductor substrate (101), in particular made of silicon, and a sensor region (404). For inexpensive manufacture of a thermal insulation between the semiconductor substrate (101) and the sensor region (404) a porous layer (104; 501) is provided in the semiconductor component (100; . . . ; 700).

    Abstract translation: 一种用于制造半导体部件（100 ... ... 700）的方法，特别是多层半导体部件，优选微机械部件，例如特别是具有半导体衬底（101）的传热传感器，特别是由硅 ，和传感器区域（404）。 为了廉价地制造半导体衬底（101）和传感器区域（404）之间的绝热，在半导体部件（100 ... 700）中设置多孔层（104; 501）。

    Process for a monolithically-integrated micromachined sensor and circuit
    75.
    发明申请
    Process for a monolithically-integrated micromachined sensor and circuit 失效
    单片集成微机械传感器和电路的工艺

    公开(公告)号：US20030148620A1

    公开(公告)日：2003-08-07

    申请号：US10065448

    申请日：2002-10-18

    Inventor： Abhijeet V. Chavan ,  James H. Logsdon ,  Dan W. Chilcott ,  John C. Christenson ,  Robert K. Speck

    IPC: H01L021/302

    CPC classification number: B81B3/0072 ,  B81B2201/0278 ,  B81B2203/0127 ,  G01J5/02 ,  G01J5/024 ,  G01J5/12 ,  H01L27/16 ,  H01L2224/48463

    Abstract: A process using integrated sensor technology in which a micromachined sensing element and signal processing circuit are combined on a single semiconductor substrate to form, for example, an infrared sensor. The process is based on modifying a CMOS process to produce an improved layered micromachined member, such as a diaphragm, after the circuit fabrication process is completed. The process generally entails forming a circuit device on a substrate by processing steps that include forming multiple dielectric layers and at least one conductive layer on the substrate. The dielectric layers comprise an oxide layer on a surface of the substrate and at least two dielectric layers that are in tension, with the conductive layer being located between the two dielectric layers. The surface of the substrate is then dry etched to form a cavity and delineate the diaphragm and a frame surrounding the diaphragm. The dry etching step terminates at the oxide layer, such that the diaphragm comprises the dielectric layers and conductive layer. A special absorber is preferably fabricated on the diaphragm to promote efficient absorption of incoming infrared radiation.

    Abstract translation: 使用集成传感器技术的方法，其中微机械感测元件和信号处理电路组合在单个半导体衬底上以形成例如红外传感器。 该方法基于在电路制造过程完成之后修改CMOS工艺以产生改进的分层微加工构件，例如隔膜。 该方法通常需要通过处理步骤在衬底上形成电路器件，该步骤包括在衬底上形成多个电介质层和至少一个导电层。 电介质层包括在衬底的表面上的氧化物层和处于张力的至少两个电介质层，导电层位于两个电介质层之间。 然后将基板的表面干蚀刻以形成空腔并描绘膜片和围绕隔膜的框架。 干蚀刻步骤终止于氧化物层，使得隔膜包括电介质层和导电层。 优选地在隔膜上制造特殊的吸收体以促进进入的红外辐射的有效吸收。

    Thermal isolation using vertical structures
    76.
    发明授权
    Thermal isolation using vertical structures 有权

    公开(公告)号：US06566725B1

    公开(公告)日：2003-05-20

    申请号：US09628201

    申请日：2000-07-28

    Applicant: Kyle Lebouitz

    Inventor： Kyle Lebouitz

    IPC: H01L31058

    CPC classification number: G01J5/40 ,  B81B3/0081 ,  B81B2201/0278 ,  B81B2201/032 ,  B81B2203/0118 ,  G01J5/02 ,  G01J5/0225 ,  G01J5/023 ,  G01J5/06

    Abstract: This invention relates to the construction of microfabricated devices and, in particular, to types of microfabricated devices requiring thermal isolation from the substrates upon which they are built. This invention discloses vertical thermal isolators and methods of fabricating the vertical thermal isolators. Vertical thermal isolators offer an advantage over thermal isolators of the prior art, which were substantially horizontal in nature, in that less wafer real estate is required for the use of the vertical thermal isolators, thereby allowing a greater density per unit area of the microfabricated devices.

    Boron nutride membrane in wafer structure
    78.
    发明授权
    Boron nutride membrane in wafer structure 失效
    硼硅胶膜晶圆结构

    公开(公告)号：US5270125A

    公开(公告)日：1993-12-14

    申请号：US782705

    申请日：1991-10-25

    Applicant: William G. America ,  Richard R. Poole

    Inventor： William G. America ,  Richard R. Poole

    IPC: C23C16/34 ,  G01N25/18 ,  G03F1/22 ,  B32B9/00 ,  G03F9/00

    CPC classification number: B81B3/0021 ,  C23C16/342 ,  G01N25/18 ,  G03F1/22 ,  B81B2201/0214 ,  B81B2201/0278 ,  B81B2201/052 ,  B81B2201/054 ,  B81B2203/0127 ,  B81B2203/0315 ,  Y10T428/24612 ,  Y10T428/24777

    Abstract: A laminated structure includes a wafer member with a membrane attached thereto, the membrane being formed of substantially hydrogen-free boron nitride having a nominal composition B.sub.3 N. The structure may be a component in a mechanical device for effecting a mechanical function, or the membrane may form a masking layer on the wafer. The structure includes a body formed of at least two wafer members laminated together with a cavity formed therebetween, with the boron nitride membrane extending into the cavity so as to provide the structural component such as a support for a heating element or a membrane in a gas valve. In another aspect borom is selectively diffused from the boron nitride into a surface of a silicon wafer. The surface is then exposed to EDP etchant to which the diffusion layer is resistant, thereby forming a channel the wafer member with smooth walls for fluid flow.

    Abstract translation: 叠层结构包括具有膜的膜片构件，膜由具有标称组成B3N的基本上无氢的氮化硼形成。 该结构可以是用于实现机械功能的机械装置中的部件，或者膜可以在晶片上形成掩模层。 该结构包括由至少两个晶片构件形成的主体，所述至少两个晶片构件在其间形成有腔，其中氮化硼膜延伸到空腔中，以便提供结构部件，例如气体中的加热元件或膜的支撑体 阀。 在另一方面，硼化物选择性地从氮化硼扩散到硅晶片的<100>表面。 然后将表面暴露于扩散层所抵抗的EDP蚀刻剂，从而形成具有平滑壁用于流体流动的晶片构件的通道。

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