公开(公告)号：US20100230474A1

公开(公告)日：2010-09-16

申请号：US12787503

申请日：2010-05-26

Applicant: Stephen Leslie Buchwalter ,  Bruce K. Furman ,  Peter A. Gruber ,  Jae-Woong Nah ,  Da-Yuan Shih

Inventor： Stephen Leslie Buchwalter ,  Bruce K. Furman ,  Peter A. Gruber ,  Jae-Woong Nah ,  Da-Yuan Shih

IPC: B23K31/02 ,  B23K1/20

CPC classification number: H01L24/16 ,  H01L21/563 ,  H01L21/6835 ,  H01L24/11 ,  H01L24/12 ,  H01L24/27 ,  H01L24/28 ,  H01L24/31 ,  H01L24/73 ,  H01L24/81 ,  H01L24/94 ,  H01L2221/68377 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/1131 ,  H01L2224/11334 ,  H01L2224/114 ,  H01L2224/116 ,  H01L2224/11822 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/136 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/17051 ,  H01L2224/274 ,  H01L2224/29111 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H05K3/3436 ,  H05K2201/0379 ,  H05K2201/094 ,  H05K2201/10234 ,  H05K2201/10242 ,  H05K2201/10977 ,  Y02P70/613 ,  Y10T29/49165 ,  H01L2224/45111 ,  H01L2924/01047 ,  H01L2224/13099 ,  H01L2924/01083 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: An electrical interconnect forming method. The electrical interconnect includes a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.

Abstract translation: 电互连形成方法。 电互连包括包括第一导电焊盘的第一衬底，包括第二导电焊盘的第二衬底以及将第一导电焊盘电连接和机械地连接到第二导电焊盘的互连结构。 互连结构包括非焊料金属芯结构，第一焊料结构和第二焊料结构。 第一焊料结构将非焊料金属芯结构的第一部分电连接并机械地连接到第一导电焊盘。 第二焊料结构将非焊料金属芯结构的第二部分电连接并机械连接到第二导电焊盘。

公开(公告)号：US20100213591A1

公开(公告)日：2010-08-26

申请号：US12658646

申请日：2010-02-12

Applicant: Dong-Ki Ho ,  Boseong Kim

Inventor： Dong-Ki Ho ,  Boseong Kim

IPC: H01L23/52

CPC classification number: H01L23/49816 ,  H01L23/3128 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H05K3/3436 ,  H05K2201/0379 ,  H05K2201/2081 ,  H05K2203/0435 ,  Y02P70/613

Abstract: A semiconductor package includes a first package and a second package, a connection terminal disposed between the first and second packages and including a first solder ball and a second solder ball that are vertically stacked, a solder passivation layer with which a surface of at least one of the first and second solder balls is coated, and a ring-shaped short prevention part surrounding a coupling portion between the first and second solder balls.

Abstract translation: 半导体封装包括第一封装和第二封装，连接端子设置在第一封装和第二封装之间，并且包括垂直堆叠的第一焊球和第二焊球，焊料钝化层，至少一个 涂覆第一和第二焊球的环形短路防止部分，围绕第一和第二焊球之间的耦合部分。

公开(公告)号：US20100170706A1

公开(公告)日：2010-07-08

申请号：US12452104

申请日：2008-06-06

Applicant: Peter Kimmich ,  Quoc-Dat Nguyen

Inventor： Peter Kimmich ,  Quoc-Dat Nguyen

IPC: H05K1/03 ,  H05K3/36 ,  H05K1/16 ,  H05K1/11

CPC classification number: H05K1/144 ,  H01L23/49531 ,  H01L23/49537 ,  H01L23/49551 ,  H01L25/16 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/0306 ,  H05K3/284 ,  H05K2201/0379 ,  H05K2201/042 ,  H05K2201/1034 ,  H05K2201/10924 ,  H05K2203/1316 ,  Y10T29/49126 ,  Y10T29/49213 ,  H01L2924/00

Abstract: An electronic module includes a first substrate having at least one electronic component, and a housing embedded in the substrate and designed as an injection molded housing or a transfer molded housing, and which includes electrical leads protruding from the housing, connected to the first substrate and designed as a pressed screen. At least one further second substrate provided with second electrical is embedded in the housing, the second leads being designed as a second pressed screen, and the two pressed screens being directly connected to each other in at least one location.

Abstract translation: 电子模块包括具有至少一个电子部件的第一基板和嵌入在该基板中并被设计为注射成型外壳或传递模制外壳的壳体，并且包括从壳体突出的电引线，连接到第一基板和 设计为压屏。 设置有第二电气的至少一个另外的第二基板嵌入壳体中，第二引线被设计为第二压制屏幕，并且两个压制屏幕在至少一个位置中彼此直接连接。

公开(公告)号：US07675601B2

公开(公告)日：2010-03-09

申请号：US11407669

申请日：2006-04-20

Applicant: Ho Min Kang ,  Hee Young Park ,  Jong Sig Hyun ,  Yun Hee Kim

Inventor： Ho Min Kang ,  Hee Young Park ,  Jong Sig Hyun ,  Yun Hee Kim

IPC: G02F1/1345 ,  H01L23/48

CPC classification number: H05K3/323 ,  C09J7/20 ,  C09J9/02 ,  C09J2201/134 ,  C09J2201/36 ,  C09J2201/40 ,  C09J2205/102 ,  G02F1/13452 ,  H01L24/83 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/83192 ,  H01L2224/83851 ,  H01L2924/12044 ,  H05K3/361 ,  H05K2201/0379 ,  H05K2201/10674 ,  H05K2203/0143 ,  H05K2203/0156 ,  H05K2203/1189 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The present invention relates to an anisotropic conductive film with two or more adhesive resins simultaneously formed thereon, such that the two or more adhesive resins are simultaneously formed on a substrate of a flat panel display so as to connect various kinds of devices and flexible circuit boards thereto, thereby reducing the size of a non-display region of the substrate and reducing the number of steps of a manufacturing process. Moreover, with the use of an anisotropic conductive film with two layers of adhesive resins with different conductive particles, an excellent bonding force thereof enables a device or flexible circuit board to be stably mounted on a narrow area.

Abstract translation: 本发明涉及同时形成有两种或更多种粘合剂树脂的各向异性导电膜，使得两个或更多个粘合剂树脂同时形成在平板显示器的基板上，以便连接各种装置和柔性电路板 从而减小了基板的非显示区域的尺寸并减少了制造工艺的步骤数量。 此外，通过使用具有两层具有不同导电粒子的粘合剂树脂的各向异性导电膜，其优异的结合力能够将器件或柔性电路板稳定地安装在狭窄的区域上。

公开(公告)号：US20100038123A1

公开(公告)日：2010-02-18

申请号：US12500585

申请日：2009-07-09

Applicant: Takahiro KITAGAWA

Inventor： Takahiro KITAGAWA

IPC: H01R12/04 ,  B23K31/02

CPC classification number: H05K3/3436 ,  H05K1/0271 ,  H05K2201/0187 ,  H05K2201/0379 ,  H05K2201/068 ,  H05K2201/094 ,  H05K2203/0465 ,  Y02P70/613

Abstract: A board unit includes an electronic component having electrodes; a printed circuit board that has board electrodes each disposed at a position corresponding to a respective one of the electrodes, and that mounts thereon the electronic component; recesses each arranged from the center of a respective one of the board electrodes toward the inside thereof; and joining members that are filled in the respective recesses, and that project from the respective board electrodes upon being heated.

Abstract translation: 板单元包括具有电极的电子部件; 印刷电路板，其具有各自设置在与各个所述电极对应的位置的基板电极，并且安装在所述电子部件上; 每个板电极的中心部分朝向其内部布置的凹槽; 以及填充在各个凹部中的接合构件，并且在加热时从各个板电极突出。

公开(公告)号：US20090243076A1

公开(公告)日：2009-10-01

申请号：US12414502

申请日：2009-03-30

Applicant: Peter C. Salmon

Inventor： Peter C. Salmon

IPC: H01L23/50 ,  H01L23/488 ,  H01L23/522

CPC classification number: H01L24/16 ,  H01L23/49811 ,  H01L23/5386 ,  H01L23/5387 ,  H01L24/25 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16237 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01051 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  H05K1/0289 ,  H05K1/115 ,  H05K3/007 ,  H05K3/3436 ,  H05K3/3484 ,  H05K3/4682 ,  H05K2201/0379 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/10674 ,  H05K2203/016 ,  H05K2203/0568 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/29099 ,  H01L2924/20751 ,  H01L2924/00

Abstract: This specification describes techniques for manufacturing an electronic system module. The module includes flexible multi-layer interconnection circuits with trace widths of 5 microns or less. A glass panel manufacturing facility, similar to those employed for making liquid crystal display, LCD, panels is used to fabricate the interconnection circuits. A polymer base layer is formed on a glass carrier with an intermediate release layer. Alternate layers of metal and dielectric are formed on the base layer, and patterned to create an array of multi-layer interconnection circuits on the glass panel. A thick layer of polymer is deposited on the interconnection circuit, and openings formed at input/output (I/O) pad locations. Solder paste is deposited in the openings to form wells filled with solder. After dicing the glass carrier to form separated interconnection circuits, IC chips are stud bumped and assembled using flip chip bonding, wherein the stud bumps on the components are inserted into corresponding wells on the interconnection circuits. The IC chips are tested and reworked to form tested circuit assemblies. Methods for connecting to testers and to other modules and electronic systems are described. Module packaging layers are provided for hermetic sealing and for electromagnetic shielding. A blade server embodiment is also described.

Abstract translation: 本说明书描述了用于制造电子系统模块的技术。 该模块包括轨迹宽度为5微米或更小的柔性多层互连电路。 用于制造液晶显示器，LCD，面板的玻璃面板制造设备用于制造互连电路。 在具有中间剥离层的玻璃载体上形成聚合物基层。 金属和电介质的交替层形成在基底层上，并被图案化以在玻璃面板上产生多层互连电路阵列。 在互连电路上沉积一层聚合物，并在输入/输出（I / O）焊盘位置形成开口。 将焊膏沉积在开口中以形成填充有焊料的孔。 在切割玻璃载体以形成分离的互连电路之后，使用倒装芯片接合对IC芯片进行螺柱凸起并组装，其中部件上的螺柱凸起插入到互连电路上的对应的孔中。 对IC芯片进行测试和返工以形成测试电路组件。 描述了连接到测试仪和其他模块和电子系统的方法。 提供模块封装层用于密封和电磁屏蔽。 还描述了刀片服务器实施例。

公开(公告)号：US07566961B2

公开(公告)日：2009-07-28

申请号：US11609840

申请日：2006-12-12

Applicant: Yeoung-Jun Cho

Inventor： Yeoung-Jun Cho

IPC: H01L23/02

CPC classification number: H05K3/3436 ,  H01L23/49816 ,  H01L25/105 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/0002 ,  H05K2201/0379 ,  H05K2201/10515 ,  H05K2201/10666 ,  H05K2201/10734 ,  H05K2203/0455 ,  Y02P70/613 ,  H01L2924/00

Abstract: A multi-stacked package includes a first package, a second package and a combining member. The second package supports the first package, and is electrically connected to the first package and has at least one joint hole. The combining member extends from the first package to below the second package to pass through the joint hole so that the combining member is partially exposed to improve the coherence between the first package and the second package.

Abstract translation: 多层堆叠包括第一包装，第二包装和组合部件。 第二包装件支撑第一包装，并且电连接到第一包装并且具有至少一个接合孔。 组合构件从第一包装延伸到第二包装下方以通过接合孔，使得组合构件部分地露出以改善第一包装和第二包装之间的相干性。

公开(公告)号：US07543376B2

公开(公告)日：2009-06-09

申请号：US11622950

申请日：2007-01-12

Applicant: Toyokazu Yoshino ,  Katsuya Okamoto ,  Shigeki Ogata ,  Shinji Morimoto ,  Kouji Nakashima

Inventor： Toyokazu Yoshino ,  Katsuya Okamoto ,  Shigeki Ogata ,  Shinji Morimoto ,  Kouji Nakashima

IPC: H01K3/10

CPC classification number: H05K3/4046 ,  H05K1/0393 ,  H05K3/386 ,  H05K3/4084 ,  H05K3/4614 ,  H05K3/4617 ,  H05K3/462 ,  H05K3/4623 ,  H05K3/4635 ,  H05K2201/0195 ,  H05K2201/0221 ,  H05K2201/0379 ,  H05K2201/043 ,  H05K2201/096 ,  H05K2201/10234 ,  H05K2201/10416 ,  H05K2203/0278 ,  H05K2203/041 ,  H05K2203/082 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T29/49213

Abstract: Provided is an FPC, which comprises an insulating layer 2, wiring layers 3 and 4 laminated above and under the insulating layer 2, and a layer connection for connecting the wiring layers 3 and 4 electrically. The layer connection is constituted to comprise: a conductor press-fit hole 5 of a cone shape extending through the insulating layer 2 and the upper and lower wiring layers 3 and 4 and expanded to the side of one wiring layer 3; and a conductor 6 filled and press-fitted without any clearance in the conductor press-fit hole such that it is jointed to the wiring upper layer 3 deformed into the cone shape of the conductor press-fit hole 5, and is protruded from the other wiring lower layer 4 to have its surface partially coated and jointed. As a result, the contact area between the wiring layers 3 and 4 and the conductor 6 filled in the conductor press-fit hole 5 can be enlarged to retain the contact strength between the wiring layers 3 and 4 and the conductor 6 sufficiently thereby to provide a high connection reliability for the layer connection.

Abstract translation: 提供一种FPC，其包括绝缘层2，层叠在绝缘层2上方和下方的布线层3和4以及用于电连接布线层3和4的层连接。 层连接构成为包括：延伸穿过绝缘层2和上下布线层3和4的锥形导体压入孔5，并扩展到一个布线层3的侧面; 导体6在导体压配合孔内填充并压配合而没有任何间隙，使其接合到变形为导体压配合孔5的锥形的布线上层3，并从另一个突出 布线下层4以使其表面部分涂覆和接合。 结果，可以扩大布线层3和4与填充在导体压入孔5中的导体6之间的接触面积，以充分地保持布线层3和4与导体6之间的接触强度，从而提供 层连接的高连接可靠性。

公开(公告)号：US07529093B2

公开(公告)日：2009-05-05

申请号：US11164522

申请日：2005-11-28

Applicant: Noriaki Sakamoto

Inventor： Noriaki Sakamoto

IPC: H05K7/20

CPC classification number: H05K3/284 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/4334 ,  H01L23/49531 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30107 ,  H05K1/0203 ,  H05K1/056 ,  H05K3/0061 ,  H05K2201/0379 ,  H05K2203/0315 ,  H05K2203/1316 ,  Y10T29/49158 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A first insulating layer is formed on the front surface of a circuit board, and a second insulating layer on the back surface. A conductive pattern is formed on the surface of the first insulating layer. Circuit elements are connected to the conductive pattern. Sealing resin covers the front and side surfaces of the circuit board. Furthermore, the sealing resin also covers the edge region of the back surface of the circuit board. Thus, it is ensured that the circuit board has a dielectric strength while exposing the back surface of the circuit board to the outside.

Abstract translation: 在电路板的前表面上形成第一绝缘层，在后表面上形成第二绝缘层。 在第一绝缘层的表面上形成导电图案。 电路元件连接到导电图案。 密封树脂覆盖电路板的正面和侧面。 此外，密封树脂也覆盖电路板背面的边缘区域。 因此，确保电路板在将电路板的背面暴露于外部时具有介电强度。

公开(公告)号：US20090072407A1

公开(公告)日：2009-03-19

申请号：US11855290

申请日：2007-09-14

Applicant: Bruce K. Furman ,  Jae-Woong Nah

Inventor： Bruce K. Furman ,  Jae-Woong Nah

IPC: H01L23/488

CPC classification number: H01L21/6835 ,  H01L21/563 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L25/50 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05571 ,  H01L2224/05644 ,  H01L2224/11003 ,  H01L2224/11334 ,  H01L2224/13082 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/13611 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/328 ,  H05K2201/0379 ,  H05K2201/10234 ,  H05K2201/10242 ,  H05K2201/10734 ,  H05K2203/0278 ,  H01L2924/00014 ,  H01L2224/13099

Abstract: An electrical structure and method for forming. The electrical structure includes a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure and a first solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. A second portion of the non-solder metallic core structure is thermo-compression bonded to the second electrically conductive pad.

Abstract translation: 一种电气结构和形成方法。 电结构包括第一衬底，其包括第一导电焊盘，第二衬底，其包括第二导电焊盘，以及将第一导电焊盘电连接和机械连接到第二导电焊盘的互连结构。 互连结构包括非焊料金属芯结构和第一焊料结构。 第一焊料结构将非焊料金属芯结构的第一部分电连接并机械地连接到第一导电焊盘。 非焊接金属芯结构的第二部分被热压接合到第二导电焊盘。