公开(公告)号：US08114687B2

公开(公告)日：2012-02-14

申请号：US12929057

申请日：2010-12-27

Applicant: Osamu Mizoguchi

Inventor： Osamu Mizoguchi

IPC: G01R31/26 ,  H01L21/66

CPC classification number: H05K1/113 ,  G01R1/07378 ,  G01R3/00 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/15174 ,  H01L2924/15311 ,  H05K3/244 ,  H05K2201/09436 ,  H05K2201/096 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method of manufacturing a semiconductor device includes preparing two package substrates, electrically coupling a semiconductor wafer to a measuring apparatus, inspecting the wafer, dicing the semiconductor wafer into semiconductor elements and packaging the semiconductor element over the prepared package substrates.

Abstract translation: 制造半导体器件的方法包括制备两个封装衬底，将半导体晶片电耦合到测量装置，检查晶片，将半导体晶片切割成半导体元件并将半导体元件封装在制备的封装衬底上。

公开(公告)号：US20110303450A1

公开(公告)日：2011-12-15

申请号：US13071641

申请日：2011-03-25

Applicant: Toru OKADA ,  Hiroshi KOBAYASHI ,  Satoshi EMOTO ,  Masayuki KITAJIMA

Inventor： Toru OKADA ,  Hiroshi KOBAYASHI ,  Satoshi EMOTO ,  Masayuki KITAJIMA

IPC: H05K1/16 ,  H02G15/00 ,  H02G3/00

CPC classification number: H05K3/3436 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L23/562 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/3512 ,  H05K1/0271 ,  H05K1/111 ,  H05K1/113 ,  H05K2201/09436 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2201/10734 ,  Y02P70/611 ,  Y02P70/613 ,  H01L2924/014

Abstract: Disclosed is a mounting structure for mounting an electronic component on a circuit board. The mounting structure includes an interposer provided between the electronic component and the circuit board; and a plurality of spiral conductors formed in the interposer. The plurality of spiral conductors have one end thereof bonded to corresponding one of external connection terminals of the electronic component and the other end thereof bonded to corresponding one of electrodes of the electronic component.

Abstract translation: 公开了一种用于将电子部件安装在电路板上的安装结构。 安装结构包括设置在电子部件和电路板之间的插入器; 以及形成在插入件中的多个螺旋形导体。 多个螺旋导体的一端接合到电子部件的对应的一个外部连接端子，另一端接合到电子部件的对应的一个电极。

公开(公告)号：US08058568B2

公开(公告)日：2011-11-15

申请号：US12188551

申请日：2008-08-08

Applicant: Chia-Wei Chang

Inventor： Chia-Wei Chang

IPC: H05K1/11 ,  H05K1/00 ,  H05K1/09

CPC classification number: H05K3/4661 ,  H05K3/108 ,  H05K3/243 ,  H05K3/244 ,  H05K3/3452 ,  H05K3/3473 ,  H05K3/386 ,  H05K3/4007 ,  H05K3/4602 ,  H05K2201/0341 ,  H05K2201/0367 ,  H05K2201/09436 ,  H05K2203/0353 ,  H05K2203/043 ,  H05K2203/054 ,  H05K2203/1152 ,  Y10T29/49124

Abstract: A circuit board and a method for fabricating the same are provided. The circuit board includes a core board, a first bonding layer disposed on the core board, and a first wiring layer disposed on the first bonding layer. The first bonding layer enables the first wiring layer to be bonded to the core layer better, thereby preventing delamination and forming a fine-pitch wiring layer.

Abstract translation: 提供一种电路板及其制造方法。 电路板包括芯板，设置在芯板上的第一接合层和设置在第一接合层上的第一布线层。 第一接合层能够使第一布线层更好地与芯层接合，从而防止分层并形成细间距布线层。

公开(公告)号：US07952207B2

公开(公告)日：2011-05-31

申请号：US11950431

申请日：2007-12-05

Applicant: Virendra R. Jadhav ,  Jayshree Shah ,  Kamalesh K. Srivastava

Inventor： Virendra R. Jadhav ,  Jayshree Shah ,  Kamalesh K. Srivastava

IPC: H01L23/52

CPC classification number: H01L23/49816 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13118 ,  H01L2224/1312 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3436 ,  H05K3/3452 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09436 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/00

Abstract: Disclosed are embodiments of a flip-chip assembly and method using lead-free solder. This assembly incorporates mushroom-plated metal layers that fill and overflow solder resist openings on an organic laminate substrate. The lower portion of metal layer provides structural support to its corresponding solder resist opening. The upper portion (i.e., cap) of each metal layer provides a landing spot for a solder joint between an integrated circuit device and the substrate and, thereby, allows for enhanced solder volume control. The additional structural support, in combination with the enhanced solder volume control, minimizes strain on the resulting solder joints. Additionally, the cap further allows the minimum diameter of the solder joint on the substrate-side of the assembly to be larger than the diameter of the solder resist opening. Thus, the invention decouples C4 reliability concerns from laminate design concerns and, thereby, allows for greater design flexibility.

Abstract translation: 公开了使用无铅焊料的倒装芯片组装和方法的实施例。 该组件包括在有机层压基板上填充和溢出阻焊剂开口的蘑菇镀金属层。 金属层的下部为其相应的抗焊剂开口提供结构支撑。 每个金属层的上部（即盖）为集成电路器件和衬底之间的焊接点提供着陆点，从而允许增强的焊料体积控制。 额外的结构支撑与增强的焊料体积控制相结合，最大限度地减少了所得到的焊点的应变。 此外，帽还允许组件的衬底侧上的焊点的最小直径大于阻焊剂开口的直径。 因此，本发明将C4可靠性问题与层压板设计问题分开，从而允许更大的设计灵活性。

公开(公告)号：US20110108315A1

公开(公告)日：2011-05-12

申请号：US12835085

申请日：2010-07-13

Applicant: CHEN-YUEH KUNG ,  Wei-Cheng Chen

Inventor： CHEN-YUEH KUNG ,  Wei-Cheng Chen

IPC: H05K1/11 ,  H01B5/14 ,  B29C35/08

CPC classification number: H05K3/4007 ,  H05K3/0035 ,  H05K3/108 ,  H05K3/421 ,  H05K2201/0367 ,  H05K2201/0376 ,  H05K2201/09436 ,  H05K2201/09545 ,  H05K2203/308 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A process for fabricating a circuit substrate is provided. A patterned conductive layer having an inner pad is provided on a base layer, a dielectric layer is disposed on the base layer and covers the patterned conductive layer, and a covering layer is disposed on the dielectric layer. A part of the covering layer is removed by dry etching to form a first opening. A part of the dielectric layer exposed by the first opening is removed to form a dielectric opening exposing a part of the inner pad. A patterned mask having a second opening to expose a part of the inner pad is formed on the covering layer. A conductive structure including a conductive block filling the dielectric opening, an outer pad filling the first opening and a surplus layer filling the second opening is formed. Finally, the patterned mask, surplus layer and covering layer are removed.

Abstract translation: 提供了一种用于制造电路基板的工艺。 具有内垫的图案化导电层设置在基底层上，电介质层设置在基底层上并覆盖图案化导电层，并且覆盖层设置在电介质层上。 通过干蚀刻去除覆盖层的一部分以形成第一开口。 去除由第一开口暴露的电介质层的一部分，以形成暴露一部分内垫的电介质开口。 在覆盖层上形成具有第二开口以露出内部衬垫的一部分的图案化掩模。 形成包括填充电介质开口的导电块，填充第一开口的外垫和填充第二开口的剩余层的导电结构。 最后，去除图案化掩模，多余层和覆盖层。

公开(公告)号：US20110090656A1

公开(公告)日：2011-04-21

申请号：US12908518

申请日：2010-10-20

Applicant: Toshiji HAMATANI ,  Tomoyuki AOKI ,  Hiroki ADACHI ,  Hiroyuki YAJIMA

Inventor： Toshiji HAMATANI ,  Tomoyuki AOKI ,  Hiroki ADACHI ,  Hiroyuki YAJIMA

IPC: H05K1/16 ,  H01R43/00 ,  H05K1/11

CPC classification number: H05K3/4007 ,  H01L21/6836 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3164 ,  H01L23/3171 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/05001 ,  H01L2224/0554 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2924/0001 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01072 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01076 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/19041 ,  H05K1/095 ,  H05K1/113 ,  H05K3/245 ,  H05K3/281 ,  H05K2201/035 ,  H05K2201/0367 ,  H05K2201/09436 ,  H05K2203/063 ,  Y10T29/49165 ,  Y10T156/10 ,  H01L2924/00

Abstract: A method for manufacturing an electronic device comprising a terminal provided with a conductor which penetrates a cured prepreg is provided. At least one opening is formed in the prepreg. The prepreg is attached to a substrate over which an electronic element is formed so that the conductor included in the terminal overlaps with the opening. A conductive paste is provided in a region of the prepreg where the opening is provided. Part of the conductive paste flows into the opening to be in contact with the conductor included in the terminal. Then, heat treatment is performed so that the conductive paste and the prepreg are cured. In the process for manufacturing the terminal, it is not necessary to perform a step of forming an opening with a laser beam after the prepreg is cured. Thus, an adverse effect of a laser beam on the electronic element can be eliminated.

Abstract translation: 提供一种电子设备的制造方法，其包括设置有穿透固化的预浸料的导体的端子。 在预浸料坯中形成至少一个开口。 预浸料被附着到形成有电子元件的基板上，使得包含在端子中的导体与开口重叠。 在设置有开口部的预浸料坯的区域设置导电性糊剂。 导电膏的一部分流入开口以与终端中包括的导体接触。 然后，进行热处理，使得导电膏和预浸料固化。 在端子的制造方法中，在预浸料固化后，不必进行用激光形成开口的工序。 因此，可以消除激光束对电子元件的不良影响。

公开(公告)号：US20110072656A1

公开(公告)日：2011-03-31

申请号：US12957431

申请日：2010-12-01

Applicant: Timothy Harrison Daubenspeck ,  Jeffrey Peter Gambino ,  Christopher David Muzzy ,  Wolfgang Sauter

Inventor： Timothy Harrison Daubenspeck ,  Jeffrey Peter Gambino ,  Christopher David Muzzy ,  Wolfgang Sauter

IPC: H05K3/10

CPC classification number: H01L24/10 ,  H01L23/49838 ,  H01L23/528 ,  H01L24/12 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05018 ,  H01L2224/05022 ,  H01L2224/05558 ,  H01L2224/13 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/14 ,  H05K1/0265 ,  H05K1/111 ,  H05K1/112 ,  H05K2201/0769 ,  H05K2201/09436 ,  H05K2201/09509 ,  H05K2201/0979 ,  Y02P70/611 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49149 ,  Y10T29/49155 ,  Y10T29/49179 ,  H01L2924/00

Abstract: A method for forming an electrical structure. The electrical structure comprises an interconnect structure and a substrate. The substrate comprises an electrically conductive pad and a plurality of wire traces electrically connected to the electrically conductive pad. The electrically conductive pad is electrically and mechanically connected to the interconnect structure. The plurality of wire traces comprises a first wire trace, a second wire trace, a third wire trace, and a fourth wire trace. The first wire trace and second wire trace are each electrically connected to a first side of the electrically conductive pad. The third wire trace is electrically connected to a second side of the electrically conductive pad. The fourth wire trace is electrically connected to a third side of said first electrically conductive pad. The plurality of wire traces are configured to distribute a current.

Abstract translation: 一种形成电结构的方法。 电结构包括互连结构和衬底。 衬底包括导电焊盘和电连接到导电焊盘的多个导线迹线。 导电焊盘电连接和机械连接到互连结构。 多条导线包括第一线迹线，第二线迹线，第三线迹线和第四线迹线。 第一线迹和第二线迹均电连接到导电垫的第一侧。 第三线迹电连接到导电垫的第二侧。 第四线迹电连接到所述第一导电焊盘的第三侧。 多个导线配置成分布电流。

公开(公告)号：US20110036620A1

公开(公告)日：2011-02-17

申请号：US12563975

申请日：2009-09-21

Applicant: Hsien-Chieh Lin

Inventor： Hsien-Chieh Lin

IPC: H05K1/11 ,  B23K1/20

CPC classification number: H05K3/3457 ,  H05K1/116 ,  H05K3/3452 ,  H05K3/4092 ,  H05K3/4644 ,  H05K2201/0397 ,  H05K2201/092 ,  H05K2201/09436 ,  H05K2201/09781 ,  H05K2203/043

Abstract: The invention provides a printed circuit board and method for fabricating the same. The printed circuit board includes a substrate having an internal circuit structure. An additional circuit structure is disposed on the substrate, electrically connected to the internal circuit structure. A solder mask insulating layer having an opening is disposed on the additional circuit structure. A conductive bump pattern is disposed in the solder mask insulating layer, wherein the conductive bump pattern extends into the opening horizontally, wherein a side, a portion of an upper surface and a portion of a lower surface of the conductive bump pattern are exposed from the opening from the opening. A solder ball is formed in the opening, wherein the solder ball is electrically connected to the additional circuit structure.

Abstract translation: 本发明提供一种印刷电路板及其制造方法。 印刷电路板包括具有内部电路结构的基板。 附加的电路结构设置在基板上，电连接到内部电路结构。 具有开口的焊接掩模绝缘层设置在附加电路结构上。 导电凸块图案设置在焊料掩模绝缘层中，其中导电凸块图案水平地延伸到开口中，其中导电凸块图案的一侧，上表面的一部分和下表面的一部分从 从开幕开幕。 在开口中形成焊球，其中焊球与附加电路结构电连接。

公开(公告)号：US20110005822A1

公开(公告)日：2011-01-13

申请号：US12446342

申请日：2007-10-19

Applicant: Yuuki Momokawa

Inventor： Yuuki Momokawa

IPC: H05K1/18 ,  B23K31/02 ,  B23K1/20

CPC classification number: H05K3/321 ,  H01L21/563 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/498 ,  H01L23/49811 ,  H01L24/16 ,  H01L24/81 ,  H01L24/83 ,  H01L2221/68345 ,  H01L2224/134 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81193 ,  H01L2224/8184 ,  H01L2224/83192 ,  H01L2224/8384 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0102 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19105 ,  H05K1/095 ,  H05K3/284 ,  H05K3/4664 ,  H05K2201/035 ,  H05K2201/0391 ,  H05K2201/09436 ,  H05K2201/10636 ,  H05K2201/10674 ,  H05K2203/1453 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A package structure for an electronic device having an electronic device mounted on a substrate; the electronic device including an external electrode; the substrate including an interconnection and an electrode pad for mounting the electronic device thereon. Part or entire of the interconnection and part or entire of the electrode pad of the substrate are formed of the same material; and the external electrode of the electronic device is joined to the electrode pad of the substrate with a joining part which is the same material as the interconnection and the electrode pad.

Abstract translation: 一种用于电子装置的封装结构，其具有安装在基板上的电子装置; 所述电子设备包括外部电极; 所述基板包括互连件和用于在其上安装所述电子器件的电极焊盘。 部分或全部的互连和基板的电极焊盘的一部分或全部由相同的材料形成; 并且电子器件的外部电极通过与布线和电极焊盘相同的材料的接合部分接合到基板的电极焊盘。

公开(公告)号：US20100052148A1

公开(公告)日：2010-03-04

申请号：US12541253

申请日：2009-08-14

Applicant: Shih-Ping Hsu

Inventor： Shih-Ping Hsu

IPC: H01L23/498

CPC classification number: H05K1/112 ,  H01L21/563 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05111 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05164 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/73203 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/3011 ,  H05K3/3436 ,  H05K2201/094 ,  H05K2201/09436 ,  H05K2201/09472 ,  H05K2201/09509 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00014

Abstract: Provided are a package structure and a package substrate, including: a substrate body having a plurality of matrix-arranged electrical contact pads formed on at least one surface thereof, wherein a solder mask layer is formed on said surface and has a plurality of openings for exposing the electrical contact pads, respectively; a first electroless-plated layer disposed on the electrical contact pads, on the walls of the openings and at the peripheries of the openings; and a second electroless-plated layer disposed on the first electroless-plated layer, the first and second electroless-plated layers constituting a recessed electrical connection structure. By forming the even electroless-plated layers on the electrical contact pads. The invention overcomes drawbacks of the prior art, namely breakage of interfaces between solder bumps and electrical contact pads and even damage of the package structure otherwise caused by excessive differences in stress between the solder bumps.

Abstract translation: 提供一种封装结构和封装基板，包括：基板主体，其具有形成在其至少一个表面上的多个矩阵布置的电接触焊盘，其中在所述表面上形成焊接掩模层，并且具有多个开口， 分别暴露电接触垫; 设置在电接触垫上，开口壁上和开口周边的第一化学镀层; 以及设置在所述第一化学镀层上的第二无电镀层，所述第一和第二无电镀层构成凹陷的电连接结构。 通过在电接触焊盘上形成均匀的无电镀层。 本发明克服了现有技术的缺点，即焊料凸块与电接触焊盘之间的界面的破坏，甚至损坏包装结构，否则由焊料凸块之间的应力过大的差异引起。