Abstract:
A display device is disclosed. In one aspect, the display device includes a flexible display configured to display an image and a flexible adhesive layer formed on a side of the display and configured to adhere the display to an object that is not part of the display device. The adhesive layer includes a base layer and a plurality of adhesive projections extending from an outer surface of the base layer and configured to be adhered to the object.
Abstract:
A hermetic feedthrough for a video endoscope for feeding electrical lines from a first partial space into a second partial space, the hermetic feedthrough including: a partition wall for hermetically sealing the two partial spaces, and a printed circuit board produced by a thin-film technique and in which the electrical lines are embedded in a plastic, is cast with a plastic compound in a mold and post-cured, wherein the plastic compound forms the partition wall.
Abstract:
There is provided a printed circuit substrate and a noise suppression structure capable of minimizing constraint on a component layout on a substrate and suppressing noise. The printed circuit substrate includes conductive patterns of odd numbered layers and conductive patterns of even numbered layers which are alternately arranged in a vertical direction and hold an insulating layer between each layer. Portions excepting predetermined areas for connecting a first through-hole and predetermined areas for insulating from a second through-hole in the conductive patterns of the odd numbered layers have a same shape as portions excepting predetermined areas for connecting the second through-hole and predetermined areas for insulating the first through-hole in the conductive patterns of the even numbered layers, and the portions are laminated on one another at the same position in the vertical direction.
Abstract:
A low profile strip dual in-line memory module (200) includes a passive interposer support structure (90) with patterned openings (91-97) formed between opposing top and bottom surfaces, a plurality of memory chips (D1-D8) attached to the top and bottom surfaces, and vertical solder ball conductors (98) extending through the patterned openings to electrically connect the plurality of memory chips, where each memory chip has an attachment surface facing the passive interposer structure and a patterned array of horizontal conductors (e.g., 82-86) formed on the attachment surface with contact pads electrically connected to the plurality of vertical conductors to define at least one bus conductor that is electrically connected to each memory die in the first and second plurality of memory die.
Abstract:
The present invention provides a high frequency detection device that detects a high frequency voltage signal according to a high frequency voltage generated in a power transmission body. The high frequency detection device includes a substrate and a capacitance conductor fixed to the substrate. The capacitance conductor includes a penetration portion and a capacitor electrode. In the penetration portion, the power transmission body is disposed so as to extend along the penetration portion in a state in which the axial direction of the power transmission body and the substrate are substantially orthogonal. The capacitor electrode is provided to be opposed to the power transmission body.
Abstract:
According to an embodiment, an die for routing signals in a plurality of metal layers of an integrated circuit device is disclosed. The die comprises a first pair of conductive lines (302A and 302B) having a first reference line and a first signal line, the first reference line having traces and crossover segments in a plurality of metal layers; and second pair of conductive lines (304A and 304B) having a second reference line and a second signal line, the second reference line having traces and crossover segments in the plurality of metal layers which are offset from the traces and crossover segments of the first reference lines; wherein a first signal trace (310) of the first signal line in a first metal layer is adjacent to a first reference trace (308) of the first reference line on a first side of the first signal trace and to a second reference trace (314) of the second reference line on a second side of the first signal trace. A method for routing signals in a plurality of metal layers of an integrated circuit device is also disclosed.
Abstract:
A multi-layer Flexible Printed Circuit Board (FPCB) for an electronic device, in which a plurality of components are provided alternately on a top surface and a bottom surface of a base layer and the components are removed from the other region. The multi-layer FPCB includes a base layer, a first circuit pattern provided on a side region on a top surface of the base layer, a first adhesive layer provided in the first circuit pattern, a second circuit pattern provided on a bottom surface of the base layer and in an other-side region opposite to the side region, a second adhesive layer provided in the second circuit pattern, a first insulating/protecting layer provided on a top surface of the first adhesive layer, and a second insulating/protecting layer provided on a bottom surface of the second adhesive layer.
Abstract:
A substrate including a first transmission line arranged to transmit electrical signals and including first and second traces and a first dielectric layer. The first and second traces are separated from each other by the first dielectric layer. A printed circuit board includes a first transmission line arranged to transmit electrical signals and including first, second, and third traces; and a first dielectric layer. The first and second traces are separated from the third trace by the first dielectric layer.
Abstract:
A capacitor includes a dielectric substrate and a large number of filamentous conductors formed to penetrate through the dielectric substrate in a thickness direction thereof. An electrode is connected to only respective one ends of a plurality of filamentous conductors constituting one of groups each composed of a plurality of filamentous conductors. The electrode is disposed in at least one position on each of both surfaces of the dielectric substrate, or in at least two positions on one of the surfaces. Further, an insulating layer is formed on each of both surfaces of the dielectric substrate so as to cover regions between the electrodes, and a conductor layer is formed on the corresponding insulating layer integrally with a desired number of electrodes.
Abstract:
A printed circuit in which, in going from one end to another, a same conductive line is wound successively: around the first winding axis to form at least one half-turn of a first coil, then around the second winding axis to form at least one half-turn of a second coil, then around the first winding axis to form at least one half-turn of a first coil, then around the second winding axis to form at least one half-turn of a second coil.