公开(公告)号：US20070089901A1

公开(公告)日：2007-04-26

申请号：US11521625

申请日：2006-09-14

Applicant: Hiroyuki Yatsu ,  Shuichi Takeda

Inventor： Hiroyuki Yatsu ,  Shuichi Takeda

IPC: H05K1/16

CPC classification number: H05K1/111 ,  H01L23/49838 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/10175 ,  H01L2224/16 ,  H01L2924/00014 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/09781 ,  H05K2201/0989 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2224/05599

Abstract: A circuit board according to the present invention is so formed that an extension pattern not covered with an insulating film is provided at a NC land that does not allow an electric signal to pass therethrough, so as to have a configuration equivalent to that of a pattern not covered with the sulating film and provided at a land that allows the electric signal to pass therethrough. Accordingly, the NC land may have an exposed surface area equivalent to that of the land. Therefore, when a semiconductor component is soldered using solders, bumps of the solders at the NC land and at the land may be evenly formed, thereby providing coplanarity of the solders, and increasing soldering reliability for the semiconductor component.

Abstract translation: 根据本发明的电路板是这样形成的，即在NC面上设置未被绝缘膜覆盖的延伸图案，其不允许电信号通过，以具有与图案相同的构造 没有被隔膜覆盖并设置在允许电信号通过的地面。 因此，NC地面可能具有与土地面相当的暴露表面积。 因此，当使用焊料焊接半导体部件时，可以均匀地形成NC区域和焊盘处的焊料的凸块，从而提供焊料的共面性，并且增加半导体部件的焊接可靠性。

公开(公告)号：US20070086189A1

公开(公告)日：2007-04-19

申请号：US11538790

申请日：2006-10-04

Applicant: Robert Raos ,  Nilesh Desai ,  Steven Flank

Inventor： Robert Raos ,  Nilesh Desai ,  Steven Flank

IPC: F21V21/00 ,  F21V29/00 ,  H01L29/00

CPC classification number: G09F9/33 ,  G09F13/20 ,  H05K1/0209 ,  H05K3/28 ,  H05K2201/064 ,  H05K2201/0989 ,  H05K2201/10106 ,  H05K2201/1056 ,  H05K2203/081 ,  H05K2203/1178

Abstract: A light emitting diode (LED) assembly with a vented printed circuit board is disclosed. A printed circuit board assembly may include a plurality of LED modules disposed in an array with a multilayered substrate and a plurality of vents. The multilayer substrate may include a thermal cooling layer which is in thermal communication with the LED modules for heat dissipation. The multilayer substrate may include one or more electrical power layers in electrical communication with the LED modules for energizing the LEDs. The multilayered substrate may have an external insulating layer that includes a plurality of fluid apertures configured for fluid communication with the thermal cooling layer.

公开(公告)号：US20070062728A1

公开(公告)日：2007-03-22

申请号：US11522940

申请日：2006-09-19

Applicant: Yoshinori Wakihara ,  Kazuhito Yamada

Inventor： Yoshinori Wakihara ,  Kazuhito Yamada

IPC: H05K1/11 ,  H01R12/04

CPC classification number: H05K3/108 ,  H05K1/0269 ,  H05K3/067 ,  H05K3/244 ,  H05K3/3452 ,  H05K3/382 ,  H05K3/384 ,  H05K3/4661 ,  H05K2201/0989 ,  H05K2201/09918 ,  H05K2203/0307 ,  H05K2203/072 ,  Y10S428/901 ,  Y10T29/49002 ,  Y10T29/49156 ,  Y10T29/49167 ,  Y10T156/1056 ,  Y10T428/24917

Abstract: A printed circuit board is by formed by laminating an interlaminar insulating layer on a conductor circuit of a substrate, in which the conductor circuit is comprised of an electroless plated film and an electrolytic plated film and a roughened layer is formed on at least a part of the surface of the conductor circuit.

公开(公告)号：US20070051695A1

公开(公告)日：2007-03-08

申请号：US11522961

申请日：2006-09-19

Applicant: Motoo Asai ,  Yasuji Hiramatsu

Inventor： Motoo Asai ,  Yasuji Hiramatsu

IPC: H01B13/00

CPC classification number: H05K3/108 ,  H05K1/0269 ,  H05K3/067 ,  H05K3/244 ,  H05K3/3452 ,  H05K3/382 ,  H05K3/384 ,  H05K3/4661 ,  H05K2201/0989 ,  H05K2201/09918 ,  H05K2203/0307 ,  H05K2203/072 ,  Y10S428/901 ,  Y10T29/49002 ,  Y10T29/49156 ,  Y10T29/49167 ,  Y10T156/1056 ,  Y10T428/24917

Abstract: A printed circuit board is by formed by laminating an interlaminar insulating layer on a conductor circuit of a substrate, in which the conductor circuit is comprised of an electroless plated film and an electrolytic plated film and a roughened layer is formed on at least a part of the surface of the conductor circuit.

公开(公告)号：US20070051694A1

公开(公告)日：2007-03-08

申请号：US11522960

申请日：2006-09-19

Applicant: Motoo Asai ,  Yasuji Hiramatsu ,  Yoshinori Wakihara ,  Kazuhito Yamada

Inventor： Motoo Asai ,  Yasuji Hiramatsu ,  Yoshinori Wakihara ,  Kazuhito Yamada

IPC: H01B13/00

CPC classification number: H05K3/108 ,  H05K1/0269 ,  H05K3/067 ,  H05K3/244 ,  H05K3/3452 ,  H05K3/382 ,  H05K3/384 ,  H05K3/4661 ,  H05K2201/0989 ,  H05K2201/09918 ,  H05K2203/0307 ,  H05K2203/072 ,  Y10S428/901 ,  Y10T29/49002 ,  Y10T29/49156 ,  Y10T29/49167 ,  Y10T156/1056 ,  Y10T428/24917

Abstract: A printed circuit board is by formed by laminating an interlaminar insulating layer on a conductor circuit of a substrate, in which the conductor circuit is comprised of an electroless plated film and an electrolytic plated film and a roughened layer is formed on at least a part of the surface of the conductor circuit.

公开(公告)号：US20070010141A1

公开(公告)日：2007-01-11

申请号：US11483303

申请日：2006-07-06

Applicant: Toshiro Izuchi ,  Kazuo Ono ,  Kensuke Nakanishi ,  Hiroaki Onishi

Inventor： Toshiro Izuchi ,  Kazuo Ono ,  Kensuke Nakanishi ,  Hiroaki Onishi

IPC: H01R4/02

CPC classification number: H05K3/341 ,  H04R1/06 ,  H04R19/016 ,  H04R31/006 ,  H05K1/0243 ,  H05K3/3452 ,  H05K2201/09809 ,  H05K2201/0989 ,  H05K2201/10083 ,  H05K2201/10583 ,  H05K2203/1178 ,  Y02P70/613

Abstract: To provide a mounting substrate that requires a reduced amount of solder and reduces a thermal effect of solder on the interior of an electronic component, and a microphone to be mounted on the substrate. A mounting substrate according to the present invention includes: a solder part formed on a part of an electrode formed on the mounting substrate; a resist film formed to prevent the solder of the solder part from flowing out of a predetermined range; and a gas-escape groove that is constituted by the absence of the electrode and the resist film and allows gas produced during soldering to escape. In the case where a component having a central terminal and a peripheral terminal is mounted on the mounting substrate, each part of the mounting substrate has the characteristics described below. That is, the electrode formed on the mounting substrate includes a central electrode part that faces the central terminal, a plurality of outer electrode parts that face part of the peripheral terminal, and a linkage electrode part that interconnects the outer electrode parts. The solder part is formed on each of the central electrode part and the outer electrode parts. The gas-escape groove is configured to allow the gas inside the peripheral terminal to escape to the outside.

Abstract translation: 为了提供一种安装基板，其需要减少量的焊料并减少焊料在电子部件内部的热效应，以及要安装在基板上的麦克风。 根据本发明的安装基板包括：形成在形成在安装基板上的电极的一部分上的焊料部分; 形成为防止焊料部分的焊料流出预定范围的抗蚀剂膜; 以及由不存在电极和抗蚀剂膜构成的气体排出槽，能够使焊接时产生的气体逸出。 在具有中心端子和外围端子的部件安装在安装基板上的情况下，安装基板的各部分具有下述特征。 也就是说，形成在安装基板上的电极包括面向中心端子的中心电极部件，与外围端子的一部分相对的多个外部电极部件和互连外部电极部件的连接电极部件。 焊料部分形成在每个中心电极部分和外部电极部分上。 排气槽构造成允许外围端子内的气体逸出到外部。

公开(公告)号：US07145234B2

公开(公告)日：2006-12-05

申请号：US11036111

申请日：2005-01-14

Applicant: Kenny Chang ,  Chi-Hsing Hsu

Inventor： Kenny Chang ,  Chi-Hsing Hsu

IPC: H01L23/48 ,  H01L23/34

CPC classification number: H01L23/49894 ,  H01L23/3128 ,  H01L24/48 ,  H01L25/162 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30107 ,  H05K1/111 ,  H05K3/284 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/062 ,  H05K2201/0969 ,  H05K2201/0989 ,  H05K2201/10636 ,  H05K2203/048 ,  Y02P70/611 ,  Y02P70/613 ,  Y10S257/923 ,  Y10S257/924 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A circuit carrier and a package structure thereof are provided. The circuit carrier comprises a substrate having a surface, a plurality of passive component electrode pads or a plurality of passive component electrode planes on the surface of the substrate for electrically connecting a passive component corresponding to the plurality of passive component electrode pads, and a solder mask layer covering the surface of the substrate and including at least a solder mask opening, that entirely exposing the passive component electrode pads or a portion of the surface of each the passive component electrode plane corresponding to the passive component. Because there is no solder mask layer between the bottom of the passive component and the substrate, the gap between the passive component and the substrate will become wider. Hence, remaining flux can be entirely removed in order to increase the yield rate of the subsequent high temperature process.

Abstract translation: 提供电路载体及其封装结构。 电路载体包括在基板的表面上具有表面的基板，多个无源部件电极焊盘或多个无源部件电极平面，用于电连接对应于多个无源部件电极焊盘的无源部件，以及焊料 掩模层覆盖基板的表面并且至少包括焊接掩模开口，其完全暴露无源部件电极焊盘或与被动部件对应的每个无源部件电极平面的表面的一部分。 由于在无源部件的底部和基板之间没有焊接掩模层，所以无源部件和基板之间的间隙将变宽。 因此，为了提高随后的高温过程的产率，可以完全除去剩余的通量。

公开(公告)号：US20060255473A1

公开(公告)日：2006-11-16

申请号：US11435555

申请日：2006-05-16

Applicant: Rajendra Pendse

Inventor： Rajendra Pendse

IPC: H01L23/48 ,  H01L21/58

CPC classification number: H05K3/3452 ,  H01L21/4846 ,  H01L21/4853 ,  H01L24/10 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/11 ,  H01L2224/11822 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16237 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/0102 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H05K2201/0989 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A solder mask for flip chip interconnection has a common opening that spans a plurality of circuit elements. The solder mask allows confinement of the solder during the remelt stage of interconnection, yet it is within common design rules for solder mask patterning. Also, a substrate for flip chip interconnection includes a substrate having the common opening that spans a plurality of circuit elements. Also, a flip chip package includes a substrate having a common opening that spans a plurality of circuit elements.

Abstract translation: 用于倒装芯片互连的焊接掩模具有跨越多个电路元件的公共开口。 焊接掩模允许在互连的重熔阶段期间焊料的限制，但是在焊接掩模图案化的通用设计规则中。 此外，用于倒装芯片布线的基板包括具有跨越多个电路元件的公共开口的基板。 此外，倒装芯片封装包括具有跨越多个电路元件的公共开口的基板。

公开(公告)号：US07116208B2

公开(公告)日：2006-10-03

申请号：US11062297

申请日：2005-02-17

Applicant: Kohshi Nishimura ,  Satoshi Nakamura ,  Saizou Suzuki

Inventor： Kohshi Nishimura ,  Satoshi Nakamura ,  Saizou Suzuki

IPC: H01H85/08 ,  H01H85/48

CPC classification number: H01H85/046 ,  H01H85/0047 ,  H01H85/0411 ,  H01H85/463 ,  H01H2069/027 ,  H01H2085/0275 ,  H05K1/0272 ,  H05K1/0293 ,  H05K3/28 ,  H05K3/4611 ,  H05K3/4697 ,  H05K2201/0305 ,  H05K2201/0394 ,  H05K2201/062 ,  H05K2201/09063 ,  H05K2201/09727 ,  H05K2201/0989 ,  H05K2201/10037 ,  H05K2201/10181 ,  H05K2203/049

Abstract: A printed wiring board includes a substrate (20) on which a wiring pattern (12) has been formed, and a fuse (6) provided on the substrate (20). One end of the fuse (6) is directly connected to a first pad (12a) of the wiring pattern (12), and the other end of the fuse (6) is directly connected to a second pad (12b) of the wiring pattern (12). The fuse (6) is covered by a protective material (7).

Abstract translation: 印刷布线板包括其上形成有布线图案（12）的基板（20）和设置在基板（20）上的熔丝（6）。 保险丝（6）的一端直接连接到布线图案（12）的第一焊盘（12a），并且熔丝（6）的另一端直接连接到第二焊盘（12b） 布线图案（12）。 保险丝（6）被保护材料（7）覆盖。

公开(公告)号：US07098407B2

公开(公告)日：2006-08-29

申请号：US10850864

申请日：2004-05-21

Applicant: Jin-Ho Kim ,  In-Ku Kang ,  Hee-Kook Choi

Inventor： Jin-Ho Kim ,  In-Ku Kang ,  Hee-Kook Choi

IPC: H05K1/09

CPC classification number: H05K3/3452 ,  H01L2224/10 ,  H05K3/243 ,  H05K2201/0989 ,  H05K2201/10734 ,  H05K2203/0577 ,  H05K2203/058

Abstract: In one embodiment, a pad is formed on a substrate surface. The pad is connected with a connecting pattern. A first mask is formed on the substrate. The first mask has a first opening exposing at least a portion of the pad and a portion of the connecting pattern. A second mask is formed on the first mask. The second mask has a second opening exposing at least a portion of the pad and a portion of the connecting pattern. A boundary surface or sidewall of the first opening is not coplanar with a boundary surface or sidewall of the second opening. Therefore, stresses may be prevented from concentrating on the boundary surface of the first opening, thereby allowing dispersion of the stresses and restraining pattern cracks.

Abstract translation: 在一个实施例中，衬垫形成在衬底表面上。 垫与连接图案连接。 在基板上形成第一掩模。 第一掩模具有暴露焊盘的至少一部分和连接图案的一部分的第一开口。 在第一掩模上形成第二掩模。 第二掩模具有暴露焊盘的至少一部分和连接图案的一部分的第二开口。 第一开口的边界面或侧壁不与第二开口的边界面或侧壁共面。 因此，可以防止应力集中在第一开口的边界面上，从而允许应力分散和约束图案裂纹。